From: Daniel Lezcano Date: Thu, 31 Jul 2025 14:01:35 +0000 (+0200) Subject: arm64: dts: s32g274-rd2: Enable the STM timers X-Git-Tag: v6.18-rc1~147^2~20^2~51 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6aa892c0f180a9a19d407ebe26b66a18a291fc83;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: s32g274-rd2: Enable the STM timers Enable the timers STM0 -> STM3 on the s32g274-rd2 The platform has 4 CPUs, and the Linux STM timer driver is instantiated per CPU. Enable 4 STM timers that can be used as replacements for the ARM architected timers. The remaining STM timers are not useful to the Linux kernel and provide no benefit, so they are left disabled. Signed-off-by: Daniel Lezcano Cc: Ghennadi Procopciuc Cc: Thomas Fossati Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts index b5ba51696f432..505776d19151c 100644 --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts @@ -40,6 +40,22 @@ status = "okay"; }; +&stm0 { + status = "okay"; +}; + +&stm1 { + status = "okay"; +}; + +&stm2 { + status = "okay"; +}; + +&stm3 { + status = "okay"; +}; + &usdhc0 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc0>;