From: Julian Seward Date: Sun, 11 Jul 2004 16:53:24 +0000 (+0000) Subject: More x86toIR cases. X-Git-Tag: svn/VALGRIND_3_0_1^2~1260 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6cf35ae7361d691b585f4dd5d58dbad8ea124b87;p=thirdparty%2Fvalgrind.git More x86toIR cases. Change the type of disAMode so the returned value is assigned to a temporary, which can be used multiple times without duplicating work / risking incorrectness. git-svn-id: svn://svn.valgrind.org/vex/trunk@74 --- diff --git a/VEX/priv/guest-x86/x86toIR.c b/VEX/priv/guest-x86/x86toIR.c index 1fe3ce4448..dc3ff7f175 100644 --- a/VEX/priv/guest-x86/x86toIR.c +++ b/VEX/priv/guest-x86/x86toIR.c @@ -10,17 +10,8 @@ fix jmpkind fields XOR reg with itself CALL pic idiom + is Iop_Neg* used? - CSEing of address computations: - 0x3A972EAA: orl %eax,0xFFFFFE0C(%ebp) - - t10 = LDle:I32(Add32(GET(20,I32),0xFFFFFE0C)) - t9 = GET(0,I32) - t8 = Or32(t10,t9) - PUT(32) = 0x12 - PUT(36) = t9 - PUT(40) = t8 - STle(Add32(GET(20,I32),0xFFFFFE0C)) = t8 */ /* Translates x86 code to IR. */ @@ -582,6 +573,10 @@ static IRExpr* calculate_condition ( Condcode cond ) flag_to_bit0(CC_MASK_C,eflags), flag_to_bit0(CC_MASK_Z,eflags) ); break; + case CondNS: + case CondS: /* SF == 1 */ + e = flag_to_bit0( CC_MASK_S, eflags ); + break; case CondP: /* PF == 1 */ e = flag_to_bit0( CC_MASK_P, eflags ); break; @@ -1109,10 +1104,20 @@ IRExpr* handleSegOverride ( UChar sorb, IRExpr* virtual ) the address mode, are returned. Note that this fn should not be called if the R/M part of the address denotes a register instead of memory. If print_codegen is true, text of the addressing mode is - placed in buf. */ + placed in buf. + + The computed address is stored in a new tempreg, and the + identity of the tempreg is returned. */ + +static IRTemp disAMode_copy2tmp ( IRExpr* addr32 ) +{ + IRTemp tmp = newTemp(Ity_I32); + assign( tmp, addr32 ); + return tmp; +} static -IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) +IRTemp disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) { UChar mod_reg_rm = getIByte(delta); delta++; @@ -1133,7 +1138,8 @@ IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) { UChar rm = mod_reg_rm; DIS(buf, "%s(%s)", sorbTxt(sorb), nameIReg(4,rm)); *len = 1; - return handleSegOverride(sorb, getIReg(4,rm)); + return disAMode_copy2tmp( + handleSegOverride(sorb, getIReg(4,rm))); } /* d8(%eax) ... d8(%edi), not including d8(%esp) @@ -1145,8 +1151,9 @@ IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) UInt d = getSDisp8(delta); DIS(buf, "%s%d(%s)", sorbTxt(sorb), d, nameIReg(4,rm)); *len = 2; - return handleSegOverride(sorb, - binop(Iop_Add32,getIReg(4,rm),mkU32(d))); + return disAMode_copy2tmp( + handleSegOverride(sorb, + binop(Iop_Add32,getIReg(4,rm),mkU32(d)))); } /* d32(%eax) ... d32(%edi), not including d32(%esp) @@ -1158,8 +1165,9 @@ IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) UInt d = getUDisp32(delta); DIS(buf, "%s0x%x(%s)", sorbTxt(sorb), d, nameIReg(4,rm)); *len = 5; - return handleSegOverride(sorb, - binop(Iop_Add32,getIReg(4,rm),mkU32(d))); + return disAMode_copy2tmp( + handleSegOverride(sorb, + binop(Iop_Add32,getIReg(4,rm),mkU32(d)))); } /* a register, %eax .. %edi. This shouldn't happen. */ @@ -1175,7 +1183,8 @@ IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) *len = 5; DIS(buf, "%s(0x%x)", sorbTxt(sorb), d); vpanic("amode 4"); - return handleSegOverride(sorb, mkU32(d)); + return disAMode_copy2tmp( + handleSegOverride(sorb, mkU32(d))); } case 0x04: { @@ -1208,12 +1217,13 @@ IRExpr* disAMode ( Int* len, UChar sorb, UInt delta, UChar* buf ) DIS(buf, "%s(%s,%s,%d)", sorbTxt(sorb), nameIReg(4,base_r), nameIReg(4,index_r), 1<