From: Srinivas Pandruvada Date: Mon, 23 Feb 2026 19:04:20 +0000 (-0800) Subject: thermal: intel: int340x: Read DDR data rate for Nova Lake X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6d3e2ce6f10107c2e5870e9dce7c2e1d03a6be72;p=thirdparty%2Flinux.git thermal: intel: int340x: Read DDR data rate for Nova Lake Add support for reading DDR data rate from PCI config offset. The register details are: CFG Offset : 0xE0 Bits : 11:2 DDR Data rate is in 33.33 MTPS units. Signed-off-by: Srinivas Pandruvada [ rjw: Rearrange code to avoid using goto and make declarations consistent ] Link: https://patch.msgid.link/20260223190420.874853-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki --- diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c index 314fbc1f490f1..1a7e134dfcf8d 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c @@ -402,17 +402,31 @@ static ssize_t rfi_restriction_show(struct device *dev, return sysfs_emit(buf, "%llu\n", resp); } + /* ddr_data_rate */ +static const struct mmio_reg nvl_ddr_data_rate_reg = { 1, 0xE0, 10, 0x3FF, 2}; + +static const struct mmio_reg *ddr_data_rate_reg; + static ssize_t ddr_data_rate_show(struct device *dev, struct device_attribute *attr, char *buf) { - u16 id = 0x0107; u64 resp; - int ret; - ret = processor_thermal_send_mbox_read_cmd(to_pci_dev(dev), id, &resp); - if (ret) - return ret; + if (ddr_data_rate_reg) { + u16 reg_val; + + pci_read_config_word(to_pci_dev(dev), ddr_data_rate_reg->offset, ®_val); + resp = (reg_val >> ddr_data_rate_reg->shift) & ddr_data_rate_reg->mask; + resp = (resp * 3333) / 100; + } else { + const u16 id = 0x0107; + int ret; + + ret = processor_thermal_send_mbox_read_cmd(to_pci_dev(dev), id, &resp); + if (ret) + return ret; + } return sysfs_emit(buf, "%llu\n", resp); } @@ -461,6 +475,7 @@ int proc_thermal_rfim_add(struct pci_dev *pdev, struct proc_thermal_device *proc case PCI_DEVICE_ID_INTEL_NVL_H_THERMAL: case PCI_DEVICE_ID_INTEL_NVL_S_THERMAL: dlvr_mmio_regs_table = nvl_dlvr_mmio_regs; + ddr_data_rate_reg = &nvl_ddr_data_rate_reg; break; default: dlvr_mmio_regs_table = dlvr_mmio_regs;