From: Greg Kroah-Hartman Date: Sat, 27 Jan 2024 01:16:48 +0000 (-0800) Subject: 5.4-stable patches X-Git-Tag: v6.1.76~79 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6ec4c058dba1aa5e91017b706584ff9d12070d0a;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: x86-cpu-amd-fix-disabling-xsaves-on-amd-family-0x17-due-to-erratum.patch --- diff --git a/queue-5.4/series b/queue-5.4/series index 1a07cefd329..2f39ef82192 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -24,3 +24,4 @@ mtd-spinand-macronix-fix-mx35lfxge4ad-page-size.patch fs-add-mode_strip_sgid-helper.patch fs-move-s_isgid-stripping-into-the-vfs_-helpers.patch powerpc-use-always-instead-of-always-y-in-for-crtsavres.o.patch +x86-cpu-amd-fix-disabling-xsaves-on-amd-family-0x17-due-to-erratum.patch diff --git a/queue-5.4/x86-cpu-amd-fix-disabling-xsaves-on-amd-family-0x17-due-to-erratum.patch b/queue-5.4/x86-cpu-amd-fix-disabling-xsaves-on-amd-family-0x17-due-to-erratum.patch new file mode 100644 index 00000000000..b2de0af3887 --- /dev/null +++ b/queue-5.4/x86-cpu-amd-fix-disabling-xsaves-on-amd-family-0x17-due-to-erratum.patch @@ -0,0 +1,63 @@ +From mail@maciej.szmigiero.name Fri Jan 26 17:15:38 2024 +From: "Maciej S. Szmigiero" +Date: Thu, 25 Jan 2024 19:05:02 +0100 +Subject: x86/CPU/AMD: Fix disabling XSAVES on AMD family 0x17 due to erratum +To: stable@vger.kernel.org +Cc: Greg Kroah-Hartman , Andrew Cooper , Borislav Petkov +Message-ID: <148d36e2bb58877fe9e39c383118b76dbde02719.1706204911.git.maciej.szmigiero@oracle.com> + +From: "Maciej S. Szmigiero" + +The stable kernel version backport of the patch disabling XSAVES on AMD +Zen family 0x17 applied this change to the wrong function (init_amd_k6()), +one which isn't called for Zen CPUs. + +Move the erratum to the init_amd_zn() function instead. + +Add an explicit family 0x17 check to the erratum so nothing will break if +someone naively makes this kernel version call init_amd_zn() also for +family 0x19 in the future (as the current upstream code does). + +Fixes: e40c1e9da1ec ("x86/CPU/AMD: Disable XSAVES on AMD family 0x17") +Signed-off-by: Maciej S. Szmigiero +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/cpu/amd.c | 20 +++++++++++--------- + 1 file changed, 11 insertions(+), 9 deletions(-) + +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -277,15 +277,6 @@ static void init_amd_k6(struct cpuinfo_x + return; + } + #endif +- /* +- * Work around Erratum 1386. The XSAVES instruction malfunctions in +- * certain circumstances on Zen1/2 uarch, and not all parts have had +- * updated microcode at the time of writing (March 2023). +- * +- * Affected parts all have no supervisor XSAVE states, meaning that +- * the XSAVEC instruction (which works fine) is equivalent. +- */ +- clear_cpu_cap(c, X86_FEATURE_XSAVES); + } + + static void init_amd_k7(struct cpuinfo_x86 *c) +@@ -989,6 +980,17 @@ static void init_amd_zn(struct cpuinfo_x + if (c->x86 == 0x19 && !cpu_has(c, X86_FEATURE_BTC_NO)) + set_cpu_cap(c, X86_FEATURE_BTC_NO); + } ++ ++ /* ++ * Work around Erratum 1386. The XSAVES instruction malfunctions in ++ * certain circumstances on Zen1/2 uarch, and not all parts have had ++ * updated microcode at the time of writing (March 2023). ++ * ++ * Affected parts all have no supervisor XSAVE states, meaning that ++ * the XSAVEC instruction (which works fine) is equivalent. ++ */ ++ if (c->x86 == 0x17) ++ clear_cpu_cap(c, X86_FEATURE_XSAVES); + } + + static bool cpu_has_zenbleed_microcode(void)