From: Alice Carlotti Date: Tue, 2 Sep 2025 16:14:03 +0000 (+0100) Subject: aarch64: Add missing system registers X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=6fc99d53ba171c677083dadb71eac4b6ae5f7eb9;p=thirdparty%2Fbinutils-gdb.git aarch64: Add missing system registers This adds all of the system registers present in the 2025-03 release of the Architecture Registers spec (DDI0601) that were missing from Binutils. --- diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-11.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-11.d new file mode 100644 index 00000000000..8bfccf82195 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-11.d @@ -0,0 +1,27 @@ +#as: -march=armv9.5-a -I$srcdir/$subdir +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +.*: d51d1020 msr actlr_el12, x0 +.*: d53d1020 mrs x0, actlr_el12 +.*: d51e11a0 msr fgwte3_el3, x0 +.*: d53e11a0 mrs x0, fgwte3_el3 +.*: d51c2380 msr hacdbsbr_el2, x0 +.*: d53c2380 mrs x0, hacdbsbr_el2 +.*: d51c23a0 msr hacdbscons_el2, x0 +.*: d53c23a0 mrs x0, hacdbscons_el2 +.*: d51c2340 msr hdbssbr_el2, x0 +.*: d53c2340 mrs x0, hdbssbr_el2 +.*: d51c2360 msr hdbssprod_el2, x0 +.*: d53c2360 mrs x0, hdbssprod_el2 +.*: d5184320 msr pm, x0 +.*: d5384320 mrs x0, pm +.*: d5159d60 msr spmaccessr_el12, x0 +.*: d5359d60 mrs x0, spmaccessr_el12 +.*: d5189ba0 msr trbmpam_el1, x0 +.*: d5389ba0 mrs x0, trbmpam_el1 + diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-11.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-11.s new file mode 100644 index 00000000000..5213b6b10d0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-11.s @@ -0,0 +1,12 @@ +.include "sysreg-test-utils.inc" + + rw_sys_reg actlr_el12 + rw_sys_reg fgwte3_el3 + rw_sys_reg hacdbsbr_el2 + rw_sys_reg hacdbscons_el2 + rw_sys_reg hdbssbr_el2 + rw_sys_reg hdbssprod_el2 + rw_sys_reg pm + rw_sys_reg spmaccessr_el12 + rw_sys_reg trbmpam_el1 + diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def index 888e7667e6c..7c606013175 100644 --- a/opcodes/aarch64-sys-regs.def +++ b/opcodes/aarch64-sys-regs.def @@ -38,6 +38,7 @@ SYSREG ("accdata_el1", CPENC (3,0,13,0,5), 0, AARCH64_NO_FEATURES) SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, AARCH64_NO_FEATURES) + SYSREG ("actlr_el12", CPENC (3,5,1,0,1), 0, AARCH64_NO_FEATURES) SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, AARCH64_NO_FEATURES) SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, AARCH64_NO_FEATURES) SYSREG ("actlralias_el1", CPENC (3,0,1,4,5), 0, AARCH64_FEATURE (V9_5A)) /* SRMASK */ @@ -429,6 +430,7 @@ SYSREG ("far_el12", CPENC (3,5,6,0,0), 0, AARCH64_FEATURE (V8_1A)) SYSREG ("far_el2", CPENC (3,4,6,0,0), 0, AARCH64_NO_FEATURES) SYSREG ("far_el3", CPENC (3,6,6,0,0), 0, AARCH64_NO_FEATURES) + SYSREG ("fgwte3_el3", CPENC (3,6,1,1,5), 0, AARCH64_FEATURE (V9_4A)) /* FGWTE3 */ SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, AARCH64_NO_FEATURES) SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, AARCH64_NO_FEATURES) SYSREG ("fpmr", CPENC (3,3,4,4,2), 0, AARCH64_FEATURE (FP8)) @@ -448,10 +450,14 @@ SYSREG ("gpcbw_el3", CPENC (3,6,2,1,5), 0, AARCH64_FEATURE (V9_5A)) SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, AARCH64_NO_FEATURES) SYSREG ("gptbr_el3", CPENC (3,6,2,1,4), 0, AARCH64_NO_FEATURES) + SYSREG ("hacdbsbr_el2", CPENC (3,4,2,3,4), 0, AARCH64_FEATURE (V9_4A)) /* HACDBS */ + SYSREG ("hacdbscons_el2", CPENC (3,4,2,3,5), 0, AARCH64_FEATURE (V9_4A)) /* HACDBS */ SYSREG ("hacr_el2", CPENC (3,4,1,1,7), 0, AARCH64_NO_FEATURES) SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), 0, AARCH64_FEATURE (V8_6A)) SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, AARCH64_NO_FEATURES) SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), 0, AARCH64_FEATURE (V8_7A)) + SYSREG ("hdbssbr_el2", CPENC (3,4,2,3,2), 0, AARCH64_FEATURE (V9_4A)) /* HDBSS */ + SYSREG ("hdbssprod_el2", CPENC (3,4,2,3,3), 0, AARCH64_FEATURE (V9_4A)) /* HDBSS */ SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), 0, AARCH64_FEATURE (V8_6A)) SYSREG ("hdfgrtr2_el2", CPENC (3,4,3,1,0), 0, AARCH64_FEATURE (FGT2)) SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), 0, AARCH64_FEATURE (V8_6A)) @@ -645,6 +651,7 @@ SYSREG ("pire0_el1", CPENC (3,0,10,2,2), 0, AARCH64_FEATURE (S1PIE)) SYSREG ("pire0_el12", CPENC (3,5,10,2,2), 0, AARCH64_FEATURE (S1PIE)) SYSREG ("pire0_el2", CPENC (3,4,10,2,2), 0, AARCH64_FEATURE (S1PIE)) + SYSREG ("pm", CPENC (3,0,4,3,1), 0, AARCH64_FEATURE (V9_3A)) /* EBEP */ SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ, AARCH64_FEATURE (PROFILE)) SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), 0, AARCH64_FEATURE (PROFILE)) SYSREG ("pmbmar_el1", CPENC (3,0,9,10,5), 0, AARCH64_FEATURES (2, PROFILE, V9_5A)) @@ -905,6 +912,7 @@ SYSREG ("sp_el1", CPENC (3,4,4,1,0), 0, AARCH64_NO_FEATURES) SYSREG ("sp_el2", CPENC (3,6,4,1,0), 0, AARCH64_NO_FEATURES) SYSREG ("spmaccessr_el1", CPENC (2,0,9,13,3), 0, AARCH64_FEATURE (SPMU)) + SYSREG ("spmaccessr_el12", CPENC (2,5,9,13,3), 0, AARCH64_FEATURE (V8_8A)) /* SPMU */ SYSREG ("spmaccessr_el2", CPENC (2,4,9,13,3), 0, AARCH64_FEATURE (SPMU)) SYSREG ("spmaccessr_el3", CPENC (2,6,9,13,3), 0, AARCH64_FEATURE (SPMU)) SYSREG ("spmcfgr_el1", CPENC (2,0,9,13,7), F_REG_READ, AARCH64_FEATURE (SPMU)) @@ -1034,6 +1042,7 @@ SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0, AARCH64_NO_FEATURES) SYSREG ("trbmar_el1", CPENC (3,0,9,11,4), 0, AARCH64_NO_FEATURES) + SYSREG ("trbmpam_el1", CPENC (3,0,9,11,5), 0, AARCH64_FEATURE (V9_3A)) /* TRBE_MPAM */ SYSREG ("trbptr_el1", CPENC (3,0,9,11,1), 0, AARCH64_NO_FEATURES) SYSREG ("trbsr_el1", CPENC (3,0,9,11,3), 0, AARCH64_NO_FEATURES) SYSREG ("trbsr_el12", CPENC (3,5,9,11,3), 0, AARCH64_FEATURE (V9_5A))