From: Eric Botcazou Date: Sun, 19 Oct 2003 17:53:11 +0000 (+0200) Subject: re PR rtl-optimization/8178 (__builtin_ffs broken with -march=k6) X-Git-Tag: releases/gcc-3.4.0~2902 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=707e58b1a72bcb33fdd7cbd50833599c53f74652;p=thirdparty%2Fgcc.git re PR rtl-optimization/8178 (__builtin_ffs broken with -march=k6) PR optimization/8178 * config/i386/i386.md (*movsi_zero): Delete. (*ffs_no_cmove): Use ix86_expand_clear to zero the third operand. Co-Authored-By: Richard Henderson From-SVN: r72680 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 332704f33480..f82fa3d56904 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2003-10-19 Eric Botcazou + Richard Henderson + + PR optimization/8178 + * config/i386/i386.md (*movsi_zero): Delete. + (*ffs_no_cmove): Use ix86_expand_clear to zero the third operand. + 2003-10-19 Richard Henderson * config/alpha/alpha.c (fix_operator): New. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c79f1ddd5f00..65c5f0d34d80 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1161,15 +1161,6 @@ [(set_attr "type" "alu1") (set_attr "mode" "SI") (set_attr "length_immediate" "0")]) - -(define_insn "*movsi_zero" - [(set (match_operand:SI 0 "register_operand" "=r") - (match_operand:SI 1 "const0_operand" "i")) - (clobber (reg:CC 17))] - "reload_completed && (TARGET_USE_MOV0 && !optimize_size)" - "mov{l}\t{%1, %0|%0, %1}" - [(set_attr "type" "imov") - (set_attr "mode" "SI")]) (define_insn "*movsi_or" [(set (match_operand:SI 0 "register_operand" "=r") @@ -14464,9 +14455,7 @@ "" "#" "reload_completed" - [(parallel [(set (match_dup 2) (const_int 0)) - (clobber (reg:CC 17))]) - (parallel [(set (reg:CCZ 17) (compare:CCZ (match_dup 1) (const_int 0))) + [(parallel [(set (reg:CCZ 17) (compare:CCZ (match_dup 1) (const_int 0))) (set (match_dup 0) (ctz:SI (match_dup 1)))]) (set (strict_low_part (match_dup 3)) (eq:QI (reg:CCZ 17) (const_int 0))) @@ -14478,6 +14467,7 @@ (clobber (reg:CC 17))])] { operands[3] = gen_lowpart (QImode, operands[2]); + ix86_expand_clear (operands[2]); }) (define_insn "*ffssi_1"