From: Mike Marciniszyn (Meta) Date: Thu, 7 May 2026 15:42:03 +0000 (-0400) Subject: net: eth: fbnic: Fix addr validation in pcs write X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=70f764ecca72bd35668b0c17426af4b088f4c88d;p=thirdparty%2Fkernel%2Flinux.git net: eth: fbnic: Fix addr validation in pcs write The DW IP has two distinct PCS address ranges cooresponding to the C45 PCS registers. The shim translates the PCS addr/regno into specific CSR writes into one of those two zero-relative ranges. This patch fixes a one off in the test that could allow an invalid CSR write if an addr == 2 was called. There are is of yet, no real impact for the bug as no PCS writes are present. Signed-off-by: Mike Marciniszyn (Meta) Link: https://patch.msgid.link/20260507154203.3667-1-mike.marciniszyn@gmail.com Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c index 7a8727e8f6f25..fe3a4ce88413c 100644 --- a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c +++ b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c @@ -189,7 +189,7 @@ fbnic_mdio_write_pcs(struct fbnic_dev *fbd, int addr, int regnum, u16 val) addr, regnum, val); /* Allow access to both halves of PCS for 50R2 config */ - if (addr > 2) + if (addr >= 2) return; /* Skip write for reserved registers */