From: Jisheng Zhang <jszhang@marvell.com>
Date: Wed, 31 Dec 2014 08:57:50 +0000 (+0800)
Subject: ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
X-Git-Tag: v3.16.35~3057
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=73a3c145f25517856b87b58e77a2d2d3d861811c;p=thirdparty%2Fkernel%2Fstable.git

ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

commit 96ed6046d3bf1113de3bdbd6dbb7f40e6d0ae0ef upstream.

On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work without this patch due to the "core" clk is gated.

Fixes: 0d859a6a9d14 ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
---

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 635a16a64cb46..39b181dc6fabc 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -82,7 +82,8 @@
 			compatible = "mrvl,pxav3-mmc";
 			reg = <0xab1000 0x200>;
 			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&chip CLKID_SDIO1XIN>;
+			clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
+			clock-names = "io", "core";
 			status = "disabled";
 		};