From: Sasha Levin Date: Sun, 24 Oct 2021 01:28:45 +0000 (-0400) Subject: Fixes for 5.4 X-Git-Tag: v4.4.290~67 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=75f37a4438e42e63521b233fb63bee8304d1c896;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.4 Signed-off-by: Sasha Levin --- diff --git a/queue-5.4/asoc-wm8960-fix-clock-configuration-on-slave-mode.patch b/queue-5.4/asoc-wm8960-fix-clock-configuration-on-slave-mode.patch new file mode 100644 index 00000000000..2599098a12e --- /dev/null +++ b/queue-5.4/asoc-wm8960-fix-clock-configuration-on-slave-mode.patch @@ -0,0 +1,60 @@ +From 89fb0b93291fb51658420a565401468ec45dfbe9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Oct 2021 13:17:04 +0800 +Subject: ASoC: wm8960: Fix clock configuration on slave mode + +From: Shengjiu Wang + +[ Upstream commit 6b9b546dc00797c74bef491668ce5431ff54e1e2 ] + +There is a noise issue for 8kHz sample rate on slave mode. +Compared with master mode, the difference is the DACDIV +setting, after correcting the DACDIV, the noise is gone. + +There is no noise issue for 48kHz sample rate, because +the default value of DACDIV is correct for 48kHz. + +So wm8960_configure_clocking() should be functional for +ADC and DAC function even if it is slave mode. + +In order to be compatible for old use case, just add +condition for checking that sysclk is zero with +slave mode. + +Fixes: 0e50b51aa22f ("ASoC: wm8960: Let wm8960 driver configure its bit clock and frame clock") +Signed-off-by: Shengjiu Wang +Acked-by: Charles Keepax +Link: https://lore.kernel.org/r/1634102224-3922-1-git-send-email-shengjiu.wang@nxp.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wm8960.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c +index 708fc4ed54ed..512f8899dcbb 100644 +--- a/sound/soc/codecs/wm8960.c ++++ b/sound/soc/codecs/wm8960.c +@@ -752,9 +752,16 @@ static int wm8960_configure_clocking(struct snd_soc_component *component) + int i, j, k; + int ret; + +- if (!(iface1 & (1<<6))) { +- dev_dbg(component->dev, +- "Codec is slave mode, no need to configure clock\n"); ++ /* ++ * For Slave mode clocking should still be configured, ++ * so this if statement should be removed, but some platform ++ * may not work if the sysclk is not configured, to avoid such ++ * compatible issue, just add '!wm8960->sysclk' condition in ++ * this if statement. ++ */ ++ if (!(iface1 & (1 << 6)) && !wm8960->sysclk) { ++ dev_warn(component->dev, ++ "slave mode, but proceeding with no clock configuration\n"); + return 0; + } + +-- +2.33.0 + diff --git a/queue-5.4/dma-debug-fix-sg-checks-in-debug_dma_map_sg.patch b/queue-5.4/dma-debug-fix-sg-checks-in-debug_dma_map_sg.patch new file mode 100644 index 00000000000..f562aaa2fcc --- /dev/null +++ b/queue-5.4/dma-debug-fix-sg-checks-in-debug_dma_map_sg.patch @@ -0,0 +1,79 @@ +From 369d984054c1cccf6fe5eb6eedbabee7aa604db2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Oct 2021 22:19:43 +0200 +Subject: dma-debug: fix sg checks in debug_dma_map_sg() + +From: Gerald Schaefer + +[ Upstream commit 293d92cbbd2418ca2ba43fed07f1b92e884d1c77 ] + +The following warning occurred sporadically on s390: +DMA-API: nvme 0006:00:00.0: device driver maps memory from kernel text or rodata [addr=0000000048cc5e2f] [len=131072] +WARNING: CPU: 4 PID: 825 at kernel/dma/debug.c:1083 check_for_illegal_area+0xa8/0x138 + +It is a false-positive warning, due to broken logic in debug_dma_map_sg(). +check_for_illegal_area() checks for overlay of sg elements with kernel text +or rodata. It is called with sg_dma_len(s) instead of s->length as +parameter. After the call to ->map_sg(), sg_dma_len() will contain the +length of possibly combined sg elements in the DMA address space, and not +the individual sg element length, which would be s->length. + +The check will then use the physical start address of an sg element, and +add the DMA length for the overlap check, which could result in the false +warning, because the DMA length can be larger than the actual single sg +element length. + +In addition, the call to check_for_illegal_area() happens in the iteration +over mapped_ents, which will not include all individual sg elements if +any of them were combined in ->map_sg(). + +Fix this by using s->length instead of sg_dma_len(s). Also put the call to +check_for_illegal_area() in a separate loop, iterating over all the +individual sg elements ("nents" instead of "mapped_ents"). + +While at it, as suggested by Robin Murphy, also move check_for_stack() +inside the new loop, as it is similarly concerned with validating the +individual sg elements. + +Link: https://lore.kernel.org/lkml/20210705185252.4074653-1-gerald.schaefer@linux.ibm.com +Fixes: 884d05970bfb ("dma-debug: use sg_dma_len accessor") +Signed-off-by: Gerald Schaefer +Signed-off-by: Christoph Hellwig +Signed-off-by: Sasha Levin +--- + kernel/dma/debug.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/kernel/dma/debug.c b/kernel/dma/debug.c +index 01e893cf9b9f..b28665f4d8c7 100644 +--- a/kernel/dma/debug.c ++++ b/kernel/dma/debug.c +@@ -1354,6 +1354,12 @@ void debug_dma_map_sg(struct device *dev, struct scatterlist *sg, + if (unlikely(dma_debug_disabled())) + return; + ++ for_each_sg(sg, s, nents, i) { ++ check_for_stack(dev, sg_page(s), s->offset); ++ if (!PageHighMem(sg_page(s))) ++ check_for_illegal_area(dev, sg_virt(s), s->length); ++ } ++ + for_each_sg(sg, s, mapped_ents, i) { + entry = dma_entry_alloc(); + if (!entry) +@@ -1369,12 +1375,6 @@ void debug_dma_map_sg(struct device *dev, struct scatterlist *sg, + entry->sg_call_ents = nents; + entry->sg_mapped_ents = mapped_ents; + +- check_for_stack(dev, sg_page(s), s->offset); +- +- if (!PageHighMem(sg_page(s))) { +- check_for_illegal_area(dev, sg_virt(s), sg_dma_len(s)); +- } +- + check_sg_segment(dev, s); + + add_dma_entry(entry); +-- +2.33.0 + diff --git a/queue-5.4/lan78xx-select-crc32.patch b/queue-5.4/lan78xx-select-crc32.patch new file mode 100644 index 00000000000..3af47fe4a70 --- /dev/null +++ b/queue-5.4/lan78xx-select-crc32.patch @@ -0,0 +1,40 @@ +From 5ad24f20b06a7df8e3352d45406018ef181c0b88 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 15 Oct 2021 15:07:54 +0200 +Subject: lan78xx: select CRC32 + +From: Vegard Nossum + +[ Upstream commit 46393d61a328d7c4e3264252dae891921126c674 ] + +Fix the following build/link error by adding a dependency on the CRC32 +routines: + + ld: drivers/net/usb/lan78xx.o: in function `lan78xx_set_multicast': + lan78xx.c:(.text+0x48cf): undefined reference to `crc32_le' + +The actual use of crc32_le() comes indirectly through ether_crc(). + +Fixes: 55d7de9de6c30 ("Microchip's LAN7800 family USB 2/3 to 10/100/1000 Ethernet device driver") +Signed-off-by: Vegard Nossum +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/usb/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig +index ca234d1a0e3b..d7005cc76ce9 100644 +--- a/drivers/net/usb/Kconfig ++++ b/drivers/net/usb/Kconfig +@@ -117,6 +117,7 @@ config USB_LAN78XX + select PHYLIB + select MICROCHIP_PHY + select FIXED_PHY ++ select CRC32 + help + This option adds support for Microchip LAN78XX based USB 2 + & USB 3 10/100/1000 Ethernet adapters. +-- +2.33.0 + diff --git a/queue-5.4/net-dsa-lantiq_gswip-fix-register-definition.patch b/queue-5.4/net-dsa-lantiq_gswip-fix-register-definition.patch new file mode 100644 index 00000000000..937a16cdad6 --- /dev/null +++ b/queue-5.4/net-dsa-lantiq_gswip-fix-register-definition.patch @@ -0,0 +1,38 @@ +From 108af8b7733726f0e08429969c95f5433c303dac Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 16 Oct 2021 00:10:20 +0200 +Subject: net: dsa: lantiq_gswip: fix register definition + +From: Aleksander Jan Bajkowski + +[ Upstream commit 66d262804a2276721eac86cf18fcd61046149193 ] + +I compared the register definitions with the D-Link DWR-966 +GPL sources and found that the PUAFD field definition was +incorrect. This definition is unused and causes no issues. + +Fixes: 14fceff4771e ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") +Signed-off-by: Aleksander Jan Bajkowski +Acked-by: Hauke Mehrtens +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/lantiq_gswip.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c +index 3225de0f655f..60e36f46f8ab 100644 +--- a/drivers/net/dsa/lantiq_gswip.c ++++ b/drivers/net/dsa/lantiq_gswip.c +@@ -229,7 +229,7 @@ + #define GSWIP_SDMA_PCTRLp(p) (0xBC0 + ((p) * 0x6)) + #define GSWIP_SDMA_PCTRL_EN BIT(0) /* SDMA Port Enable */ + #define GSWIP_SDMA_PCTRL_FCEN BIT(1) /* Flow Control Enable */ +-#define GSWIP_SDMA_PCTRL_PAUFWD BIT(1) /* Pause Frame Forwarding */ ++#define GSWIP_SDMA_PCTRL_PAUFWD BIT(3) /* Pause Frame Forwarding */ + + #define GSWIP_TABLE_ACTIVE_VLAN 0x01 + #define GSWIP_TABLE_VLAN_MAPPING 0x02 +-- +2.33.0 + diff --git a/queue-5.4/net-enetc-fix-ethtool-counter-name-for-pm0_terr.patch b/queue-5.4/net-enetc-fix-ethtool-counter-name-for-pm0_terr.patch new file mode 100644 index 00000000000..d20139a5404 --- /dev/null +++ b/queue-5.4/net-enetc-fix-ethtool-counter-name-for-pm0_terr.patch @@ -0,0 +1,39 @@ +From 3a21a3b373acadafc6ea9c538a0453f4091b2ef6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Oct 2021 19:52:06 +0300 +Subject: net: enetc: fix ethtool counter name for PM0_TERR + +From: Vladimir Oltean + +[ Upstream commit fb8dc5fc8cbdfd62ecd16493848aee2f42ed84d9 ] + +There are two counters named "MAC tx frames", one of them is actually +incorrect. The correct name for that counter should be "MAC tx error +frames", which is symmetric to the existing "MAC rx error frames". + +Fixes: 16eb4c85c964 ("enetc: Add ethtool statistics") +Signed-off-by: Vladimir Oltean +Reviewed-by: +Link: https://lore.kernel.org/r/20211020165206.1069889-1-vladimir.oltean@nxp.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/freescale/enetc/enetc_ethtool.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c b/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c +index 89121d7ce3e6..636aa6d81d8f 100644 +--- a/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c +@@ -155,7 +155,7 @@ static const struct { + { ENETC_PM0_TFRM, "MAC tx frames" }, + { ENETC_PM0_TFCS, "MAC tx fcs errors" }, + { ENETC_PM0_TVLAN, "MAC tx VLAN frames" }, +- { ENETC_PM0_TERR, "MAC tx frames" }, ++ { ENETC_PM0_TERR, "MAC tx frame errors" }, + { ENETC_PM0_TUCA, "MAC tx unicast frames" }, + { ENETC_PM0_TMCA, "MAC tx multicast frames" }, + { ENETC_PM0_TBCA, "MAC tx broadcast frames" }, +-- +2.33.0 + diff --git a/queue-5.4/net-hns3-add-limit-ets-dwrr-bandwidth-cannot-be-0.patch b/queue-5.4/net-hns3-add-limit-ets-dwrr-bandwidth-cannot-be-0.patch new file mode 100644 index 00000000000..a86410e8c65 --- /dev/null +++ b/queue-5.4/net-hns3-add-limit-ets-dwrr-bandwidth-cannot-be-0.patch @@ -0,0 +1,46 @@ +From a652d1505707947f2735f8152d8eaf1334f05393 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Oct 2021 22:16:30 +0800 +Subject: net: hns3: add limit ets dwrr bandwidth cannot be 0 + +From: Guangbin Huang + +[ Upstream commit 731797fdffa3d083db536e2fdd07ceb050bb40b1 ] + +If ets dwrr bandwidth of tc is set to 0, the hardware will switch to SP +mode. In this case, this tc may occupy all the tx bandwidth if it has +huge traffic, so it violates the purpose of the user setting. + +To fix this problem, limit the ets dwrr bandwidth must greater than 0. + +Fixes: cacde272dd00 ("net: hns3: Add hclge_dcb module for the support of DCB feature") +Signed-off-by: Guangbin Huang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +index d16488bab86f..9076605403a7 100644 +--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c ++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +@@ -132,6 +132,15 @@ static int hclge_ets_validate(struct hclge_dev *hdev, struct ieee_ets *ets, + *changed = true; + break; + case IEEE_8021QAZ_TSA_ETS: ++ /* The hardware will switch to sp mode if bandwidth is ++ * 0, so limit ets bandwidth must be greater than 0. ++ */ ++ if (!ets->tc_tx_bw[i]) { ++ dev_err(&hdev->pdev->dev, ++ "tc%u ets bw cannot be 0\n", i); ++ return -EINVAL; ++ } ++ + if (hdev->tm_info.tc_info[i].tc_sch_mode != + HCLGE_SCH_MODE_DWRR) + *changed = true; +-- +2.33.0 + diff --git a/queue-5.4/net-hns3-disable-sriov-before-unload-hclge-layer.patch b/queue-5.4/net-hns3-disable-sriov-before-unload-hclge-layer.patch new file mode 100644 index 00000000000..940ccba138a --- /dev/null +++ b/queue-5.4/net-hns3-disable-sriov-before-unload-hclge-layer.patch @@ -0,0 +1,90 @@ +From a88d90380032da0cf4d2ea5c69cbec78811793ef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Oct 2021 22:16:35 +0800 +Subject: net: hns3: disable sriov before unload hclge layer + +From: Peng Li + +[ Upstream commit 0dd8a25f355b4df2d41c08df1716340854c7d4c5 ] + +HNS3 driver includes hns3.ko, hnae3.ko and hclge.ko. +hns3.ko includes network stack and pci_driver, hclge.ko includes +HW device action, algo_ops and timer task, hnae3.ko includes some +register function. + +When SRIOV is enable and hclge.ko is removed, HW device is unloaded +but VF still exists, PF will not reply VF mbx messages, and cause +errors. + +This patch fix it by disable SRIOV before remove hclge.ko. + +Fixes: e2cb1dec9779 ("net: hns3: Add HNS3 VF HCL(Hardware Compatibility Layer) Support") +Signed-off-by: Peng Li +Signed-off-by: Guangbin Huang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/hisilicon/hns3/hnae3.c | 21 +++++++++++++++++++ + drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + + .../hisilicon/hns3/hns3pf/hclge_main.c | 1 + + 3 files changed, 23 insertions(+) + +diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.c b/drivers/net/ethernet/hisilicon/hns3/hnae3.c +index 03ca7d925e8e..2e38c7d214c4 100644 +--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.c ++++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.c +@@ -10,6 +10,27 @@ static LIST_HEAD(hnae3_ae_algo_list); + static LIST_HEAD(hnae3_client_list); + static LIST_HEAD(hnae3_ae_dev_list); + ++void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo) ++{ ++ const struct pci_device_id *pci_id; ++ struct hnae3_ae_dev *ae_dev; ++ ++ if (!ae_algo) ++ return; ++ ++ list_for_each_entry(ae_dev, &hnae3_ae_dev_list, node) { ++ if (!hnae3_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B)) ++ continue; ++ ++ pci_id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev); ++ if (!pci_id) ++ continue; ++ if (IS_ENABLED(CONFIG_PCI_IOV)) ++ pci_disable_sriov(ae_dev->pdev); ++ } ++} ++EXPORT_SYMBOL(hnae3_unregister_ae_algo_prepare); ++ + /* we are keeping things simple and using single lock for all the + * list. This is a non-critical code so other updations, if happen + * in parallel, can wait. +diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h +index 0db835d87d09..6cf849011064 100644 +--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h ++++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h +@@ -666,6 +666,7 @@ struct hnae3_handle { + int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); + void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev); + ++void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo); + void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo); + void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo); + +diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +index f44e8401496b..8ecfabaefa85 100644 +--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c ++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +@@ -10274,6 +10274,7 @@ static int hclge_init(void) + + static void hclge_exit(void) + { ++ hnae3_unregister_ae_algo_prepare(&ae_algo); + hnae3_unregister_ae_algo(&ae_algo); + } + module_init(hclge_init); +-- +2.33.0 + diff --git a/queue-5.4/net-hns3-reset-dwrr-of-unused-tc-to-zero.patch b/queue-5.4/net-hns3-reset-dwrr-of-unused-tc-to-zero.patch new file mode 100644 index 00000000000..46c60c20651 --- /dev/null +++ b/queue-5.4/net-hns3-reset-dwrr-of-unused-tc-to-zero.patch @@ -0,0 +1,63 @@ +From a7ab9d0254b0fc193c8cd38f7c079701ee81dcf9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Oct 2021 22:16:29 +0800 +Subject: net: hns3: reset DWRR of unused tc to zero + +From: Guangbin Huang + +[ Upstream commit b63fcaab959807282e9822e659034edf95fc8bd1 ] + +Currently, DWRR of tc will be initialized to a fixed value when this tc +is enabled, but it is not been reset to 0 when this tc is disabled. It +cause a problem that the DWRR of unused tc is not 0 after using tc tool +to add and delete multi-tc parameters. + +For examples, after enabling 4 TCs and restoring to 1 TC by follow +tc commands: + +$ tc qdisc add dev eth0 root mqprio num_tc 4 map 0 1 2 3 0 1 2 3 queues \ + 8@0 8@8 8@16 8@24 hw 1 mode channel +$ tc qdisc del dev eth0 root + +Now there is just one TC is enabled for eth0, but the tc info querying by +debugfs is shown as follow: + +$ cat /mnt/hns3/0000:7d:00.0/tm/tc_sch_info +enabled tc number: 1 +weight_offset: 14 +TC MODE WEIGHT +0 dwrr 100 +1 dwrr 100 +2 dwrr 100 +3 dwrr 100 +4 dwrr 0 +5 dwrr 0 +6 dwrr 0 +7 dwrr 0 + +This patch fixes it by resetting DWRR of tc to 0 when tc is disabled. + +Fixes: 848440544b41 ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver") +Signed-off-by: Guangbin Huang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +index 62399cc1c5a6..d98f0e2ec7aa 100644 +--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c ++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +@@ -633,6 +633,8 @@ static void hclge_tm_pg_info_init(struct hclge_dev *hdev) + hdev->tm_info.pg_info[i].tc_bit_map = hdev->hw_tc_map; + for (k = 0; k < hdev->tm_info.num_tc; k++) + hdev->tm_info.pg_info[i].tc_dwrr[k] = BW_PERCENT; ++ for (; k < HNAE3_MAX_TC; k++) ++ hdev->tm_info.pg_info[i].tc_dwrr[k] = 0; + } + } + +-- +2.33.0 + diff --git a/queue-5.4/net-stmmac-fix-e2e-delay-mechanism.patch b/queue-5.4/net-stmmac-fix-e2e-delay-mechanism.patch new file mode 100644 index 00000000000..70a4359370b --- /dev/null +++ b/queue-5.4/net-stmmac-fix-e2e-delay-mechanism.patch @@ -0,0 +1,56 @@ +From bfda26a2b78890d3a309fe632e60243d77bbff86 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Oct 2021 09:04:33 +0200 +Subject: net: stmmac: Fix E2E delay mechanism + +From: Kurt Kanzenbach + +[ Upstream commit 3cb958027cb8b78d3ee639ce9af54c2ef1bf964f ] + +When utilizing End to End delay mechanism, the following error messages show up: + +|root@ehl1:~# ptp4l --tx_timestamp_timeout=50 -H -i eno2 -E -m +|ptp4l[950.573]: selected /dev/ptp3 as PTP clock +|ptp4l[950.586]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE +|ptp4l[950.586]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE +|ptp4l[952.879]: port 1: new foreign master 001395.fffe.4897b4-1 +|ptp4l[956.879]: selected best master clock 001395.fffe.4897b4 +|ptp4l[956.879]: port 1: assuming the grand master role +|ptp4l[956.879]: port 1: LISTENING to GRAND_MASTER on RS_GRAND_MASTER +|ptp4l[962.017]: port 1: received DELAY_REQ without timestamp +|ptp4l[962.273]: port 1: received DELAY_REQ without timestamp +|ptp4l[963.090]: port 1: received DELAY_REQ without timestamp + +Commit f2fb6b6275eb ("net: stmmac: enable timestamp snapshot for required PTP +packets in dwmac v5.10a") already addresses this problem for the dwmac +v5.10. However, same holds true for all dwmacs above version v4.10. Correct the +check accordingly. Afterwards everything works as expected. + +Tested on Intel Atom(R) x6414RE Processor. + +Fixes: 14f347334bf2 ("net: stmmac: Correctly take timestamp for PTPv2") +Fixes: f2fb6b6275eb ("net: stmmac: enable timestamp snapshot for required PTP packets in dwmac v5.10a") +Suggested-by: Ong Boon Leong +Signed-off-by: Kurt Kanzenbach +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index 835ac178bc8c..94c652b9a0a8 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -604,7 +604,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) + config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; + ptp_v2 = PTP_TCR_TSVER2ENA; + snap_type_sel = PTP_TCR_SNAPTYPSEL_1; +- if (priv->synopsys_id != DWMAC_CORE_5_10) ++ if (priv->synopsys_id < DWMAC_CORE_4_10) + ts_event_en = PTP_TCR_TSEVNTENA; + ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; + ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; +-- +2.33.0 + diff --git a/queue-5.4/netfilter-ipvs-make-global-sysctl-readonly-in-non-in.patch b/queue-5.4/netfilter-ipvs-make-global-sysctl-readonly-in-non-in.patch new file mode 100644 index 00000000000..d52b86224cb --- /dev/null +++ b/queue-5.4/netfilter-ipvs-make-global-sysctl-readonly-in-non-in.patch @@ -0,0 +1,40 @@ +From 2e78170a056dc7b3c75203ed7ff3a7a80f7c6fdc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Oct 2021 16:54:37 +0200 +Subject: netfilter: ipvs: make global sysctl readonly in non-init netns + +From: Antoine Tenart + +[ Upstream commit 174c376278949c44aad89c514a6b5db6cee8db59 ] + +Because the data pointer of net/ipv4/vs/debug_level is not updated per +netns, it must be marked as read-only in non-init netns. + +Fixes: c6d2d445d8de ("IPVS: netns, final patch enabling network name space.") +Signed-off-by: Antoine Tenart +Acked-by: Julian Anastasov +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/ipvs/ip_vs_ctl.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c +index f93fa0e21097..07242503d74d 100644 +--- a/net/netfilter/ipvs/ip_vs_ctl.c ++++ b/net/netfilter/ipvs/ip_vs_ctl.c +@@ -4047,6 +4047,11 @@ static int __net_init ip_vs_control_net_init_sysctl(struct netns_ipvs *ipvs) + tbl[idx++].data = &ipvs->sysctl_conn_reuse_mode; + tbl[idx++].data = &ipvs->sysctl_schedule_icmp; + tbl[idx++].data = &ipvs->sysctl_ignore_tunneled; ++#ifdef CONFIG_IP_VS_DEBUG ++ /* Global sysctls must be ro in non-init netns */ ++ if (!net_eq(net, &init_net)) ++ tbl[idx++].mode = 0444; ++#endif + + ipvs->sysctl_hdr = register_net_sysctl(net, "net/ipv4/vs", tbl); + if (ipvs->sysctl_hdr == NULL) { +-- +2.33.0 + diff --git a/queue-5.4/nios2-irqflags-rename-a-redefined-register-name.patch b/queue-5.4/nios2-irqflags-rename-a-redefined-register-name.patch new file mode 100644 index 00000000000..7d8ec53316c --- /dev/null +++ b/queue-5.4/nios2-irqflags-rename-a-redefined-register-name.patch @@ -0,0 +1,67 @@ +From af9228306481ce15c7abe7fd262f7f1a226fe6e3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Oct 2021 00:56:06 -0700 +Subject: NIOS2: irqflags: rename a redefined register name + +From: Randy Dunlap + +[ Upstream commit 4cce60f15c04d69eff6ffc539ab09137dbe15070 ] + +Both arch/nios2/ and drivers/mmc/host/tmio_mmc.c define a macro +with the name "CTL_STATUS". Change the one in arch/nios2/ to be +"CTL_FSTATUS" (flags status) to eliminate the build warning. + +In file included from ../drivers/mmc/host/tmio_mmc.c:22: +drivers/mmc/host/tmio_mmc.h:31: warning: "CTL_STATUS" redefined + 31 | #define CTL_STATUS 0x1c +arch/nios2/include/asm/registers.h:14: note: this is the location of the previous definition + 14 | #define CTL_STATUS 0 + +Fixes: b31ebd8055ea ("nios2: Nios2 registers") +Signed-off-by: Randy Dunlap +Cc: Dinh Nguyen +Signed-off-by: Dinh Nguyen +Signed-off-by: Sasha Levin +--- + arch/nios2/include/asm/irqflags.h | 4 ++-- + arch/nios2/include/asm/registers.h | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/nios2/include/asm/irqflags.h b/arch/nios2/include/asm/irqflags.h +index b3ec3e510706..25acf27862f9 100644 +--- a/arch/nios2/include/asm/irqflags.h ++++ b/arch/nios2/include/asm/irqflags.h +@@ -9,7 +9,7 @@ + + static inline unsigned long arch_local_save_flags(void) + { +- return RDCTL(CTL_STATUS); ++ return RDCTL(CTL_FSTATUS); + } + + /* +@@ -18,7 +18,7 @@ static inline unsigned long arch_local_save_flags(void) + */ + static inline void arch_local_irq_restore(unsigned long flags) + { +- WRCTL(CTL_STATUS, flags); ++ WRCTL(CTL_FSTATUS, flags); + } + + static inline void arch_local_irq_disable(void) +diff --git a/arch/nios2/include/asm/registers.h b/arch/nios2/include/asm/registers.h +index 183c720e454d..95b67dd16f81 100644 +--- a/arch/nios2/include/asm/registers.h ++++ b/arch/nios2/include/asm/registers.h +@@ -11,7 +11,7 @@ + #endif + + /* control register numbers */ +-#define CTL_STATUS 0 ++#define CTL_FSTATUS 0 + #define CTL_ESTATUS 1 + #define CTL_BSTATUS 2 + #define CTL_IENABLE 3 +-- +2.33.0 + diff --git a/queue-5.4/series b/queue-5.4/series index b58f5ded911..e7053d54af1 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -5,3 +5,14 @@ arm-dts-at91-sama5d2_som1_ek-disable-isc-node-by-def.patch xtensa-xtfpga-use-config_use_of-instead-of-config_of.patch xtensa-xtfpga-try-software-restart-before-simulating.patch nfsd-keep-existing-listeners-on-portlist-error.patch +dma-debug-fix-sg-checks-in-debug_dma_map_sg.patch +asoc-wm8960-fix-clock-configuration-on-slave-mode.patch +netfilter-ipvs-make-global-sysctl-readonly-in-non-in.patch +lan78xx-select-crc32.patch +net-dsa-lantiq_gswip-fix-register-definition.patch +nios2-irqflags-rename-a-redefined-register-name.patch +net-hns3-reset-dwrr-of-unused-tc-to-zero.patch +net-hns3-add-limit-ets-dwrr-bandwidth-cannot-be-0.patch +net-hns3-disable-sriov-before-unload-hclge-layer.patch +net-stmmac-fix-e2e-delay-mechanism.patch +net-enetc-fix-ethtool-counter-name-for-pm0_terr.patch