From: Carl Love Date: Tue, 6 Oct 2020 16:51:19 +0000 (-0500) Subject: VSX 32-byte storage access operations X-Git-Tag: VALGRIND_3_17_0~141 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=78e7de504c9e311a15c3d081cc2098c568dc8399;p=thirdparty%2Fvalgrind.git VSX 32-byte storage access operations --- diff --git a/none/tests/ppc64/test_isa_3_1_RT.c b/none/tests/ppc64/test_isa_3_1_RT.c index 23586ab5fb..c6f8422ab3 100644 --- a/none/tests/ppc64/test_isa_3_1_RT.c +++ b/none/tests/ppc64/test_isa_3_1_RT.c @@ -58,6 +58,21 @@ static void test_brw (void) { static void test_brd (void) { __asm__ __volatile__ ("brd %0, %1" : "=r" (ra) : "r" (rs) ); } +static void test_plxvp_off0 (void) { + __asm__ __volatile__ ("plxvp 20, 0(%0), 0" :: "r" (ra) ); +} +static void test_plxvp_off8 (void) { + __asm__ __volatile__ ("plxvp 20, 8(%0), 0" :: "r" (ra) ); +} +static void test_plxvp_off16 (void) { + __asm__ __volatile__ ("plxvp 20, 16(%0), 0" :: "r" (ra) ); +} +static void test_plxvp_off24 (void) { + __asm__ __volatile__ ("plxvp 20, 24(%0), 0" :: "r" (ra) ); +} +static void test_plxvp_off32 (void) { + __asm__ __volatile__ ("plxvp 20, 32(%0), 0" :: "r" (ra) ); +} static void test_setbc_0_cr0s (void) { SET_CR(0x00000000); __asm__ __volatile__ ("setbc 26, 0"); @@ -686,6 +701,11 @@ static test_list_t testgroup_generic[] = { { &test_plwz_off16, "plwz off16", "RT,D(RA),R"}, /* bcwp */ { &test_plwz_off32, "plwz off32", "RT,D(RA),R"}, /* bcwp */ { &test_plwz_off64, "plwz off64", "RT,D(RA),R"}, /* bcwp */ + { &test_plxvp_off0, "plxvp off0", "XTp,D(RA),R"}, /* bcwp */ + { &test_plxvp_off8, "plxvp off8", "XTp,D(RA),R"}, /* bcwp */ + { &test_plxvp_off16, "plxvp off16", "XTp,D(RA),R"}, /* bcwp */ + { &test_plxvp_off24, "plxvp off24", "XTp,D(RA),R"}, /* bcwp */ + { &test_plxvp_off32, "plxvp off32", "XTp,D(RA),R"}, /* bcwp */ { &test_pstb_off0, "pstb off0", "RS,D(RA),R"}, /* bcwp */ { &test_pstb_off8, "pstb off8", "RS,D(RA),R"}, /* bcwp */ { &test_pstb_off16, "pstb off16", "RS,D(RA),R"}, /* bcwp */ diff --git a/none/tests/ppc64/test_isa_3_1_RT.stdout.exp b/none/tests/ppc64/test_isa_3_1_RT.stdout.exp index bc7a6e5553..2cfd5cd66a 100644 --- a/none/tests/ppc64/test_isa_3_1_RT.stdout.exp +++ b/none/tests/ppc64/test_isa_3_1_RT.stdout.exp @@ -119,6 +119,16 @@ plwz off32 (&buffer) => 5a07a05 plwz off64 (&buffer) => bbaa7988 +plxvp off0 (&buffer) => 7ff0000000007000 7f0000007f007000 3fe00094e0007359 7ff7020304057607 + +plxvp off8 (&buffer) => 7f0000007f007000 5a05a05a05a07a05 7ff7020304057607 7ff0000000007000 + +plxvp off16 (&buffer) => 5a05a05a05a07a05 0102030405067708 7ff0000000007000 7f0000007f007000 + +plxvp off24 (&buffer) => 0102030405067708 fedcba9876547210 7f0000007f007000 5a05a05a05a07a05 + +plxvp off32 (&buffer) => fedcba9876547210 0123456789ab7def 5a05a05a05a07a05 0102030405067708 + pstb off0 (&buffer) 102030405060708 => [3fe00094e0007308 - - - - - - - ] pstb off8 (&buffer) 102030405060708 => [ - 7ff7020304057608 - - - - - - ] @@ -326,4 +336,4 @@ setnbc 31_creb => [aaaaaaaa] 0 setnbc 31_crob => [55555555] ffffffffffffffff -All done. Tested 144 different instruction groups +All done. Tested 149 different instruction groups diff --git a/none/tests/ppc64/test_isa_3_1_XT.c b/none/tests/ppc64/test_isa_3_1_XT.c index de75953d24..92d896b4e2 100644 --- a/none/tests/ppc64/test_isa_3_1_XT.c +++ b/none/tests/ppc64/test_isa_3_1_XT.c @@ -49,6 +49,45 @@ struct test_list_t current_test; #include "isa_3_1_helpers.h" +static void test_lxvp_32 (void) { + __asm__ __volatile__ ("lxvp 20, 32(%0)" :: "r" (ra) ); +} +static void test_lxvp_16 (void) { + __asm__ __volatile__ ("lxvp 20, 16(%0)" :: "r" (ra) ); +} +static void test_lxvp_0 (void) { + __asm__ __volatile__ ("lxvp 20, 0(%0)" :: "r" (ra) ); +} +static void test_lxvpx (void) { + __asm__ __volatile__ ("lxvpx 20, %0, %1" :: "r" (ra), "r" (rb) ); +} +static void test_stxvp_off0 (void) { + __asm__ __volatile__ ("stxvp 20, 0(%0)" :: "r" (ra) ); +} +static void test_stxvp_off16 (void) { + __asm__ __volatile__ ("stxvp 20, 16(%0)" :: "r" (ra) ); +} +static void test_stxvp_off32 (void) { + __asm__ __volatile__ ("stxvp 20, 32(%0)" :: "r" (ra) ); +} +static void test_stxvp_off48 (void) { + __asm__ __volatile__ ("stxvp 20, 48(%0)" :: "r" (ra) ); +} +static void test_pstxvp_off0 (void) { + __asm__ __volatile__ ("pstxvp 20, 0(%0)" :: "r" (ra) ); +} +static void test_pstxvp_off16 (void) { + __asm__ __volatile__ ("pstxvp 20, 16(%0)" :: "r" (ra) ); +} +static void test_pstxvp_off32 (void) { + __asm__ __volatile__ ("pstxvp 20, 32(%0)" :: "r" (ra) ); +} +static void test_pstxvp_off48 (void) { + __asm__ __volatile__ ("pstxvp 20, 48(%0)" :: "r" (ra) ); +} +static void test_stxvpx (void) { + __asm__ __volatile__ ("stxvpx 20, %0, %1" :: "r" (ra), "r" (rb) ); +} static void test_plfd_64 (void) { __asm__ __volatile__ ("plfd 28, 64(%0), 0" :: "r" (ra) ); } @@ -213,6 +252,10 @@ static void test_pstxv_0 (void) { } static test_list_t testgroup_generic[] = { + { &test_lxvpx, "lxvpx", "XTp,RA,RB"}, /* bcs */ + { &test_lxvp_0, "lxvp 0", "XTp,DQ(RA)"}, /* bcwp */ + { &test_lxvp_16, "lxvp 16", "XTp,DQ(RA)"}, /* bcwp */ + { &test_lxvp_32, "lxvp 32", "XTp,DQ(RA)"}, /* bcwp */ { &test_plfd_0, "plfd 0", "FRT,D(RA),R"}, /* bcwp */ { &test_plfd_4, "plfd 4", "FRT,D(RA),R"}, /* bcwp */ { &test_plfd_8, "plfd 8", "FRT,D(RA),R"}, /* bcwp */ @@ -263,10 +306,19 @@ static test_list_t testgroup_generic[] = { { &test_pstxssp_16, "pstxssp 16", "VRS,D(RA),R"}, /* bcwp */ { &test_pstxssp_32, "pstxssp 32", "VRS,D(RA),R"}, /* bcwp */ { &test_pstxssp_64, "pstxssp 64", "VRS,D(RA),R"}, /* bcwp */ + { &test_pstxvp_off0, "pstxvp off0", "XSp,D(RA),R"}, /* bcwp */ + { &test_pstxvp_off16, "pstxvp off16", "XSp,D(RA),R"}, /* bcwp */ + { &test_pstxvp_off32, "pstxvp off32", "XSp,D(RA),R"}, /* bcwp */ + { &test_pstxvp_off48, "pstxvp off48", "XSp,D(RA),R"}, /* bcwp */ { &test_pstxv_0, "pstxv 0", "XS,D(RA),R"}, /* bcwp */ { &test_pstxv_4, "pstxv 4", "XS,D(RA),R"}, /* bcwp */ { &test_pstxv_8, "pstxv 8", "XS,D(RA),R"}, /* bcwp */ { &test_pstxv_16, "pstxv 16", "XS,D(RA),R"}, /* bcwp */ + { &test_stxvpx, "stxvpx", "XSp,RA,RB"}, /* bcs */ + { &test_stxvp_off0, "stxvp off0", "XSp,DQ(RA)"}, /* bcwp */ + { &test_stxvp_off16, "stxvp off16", "XSp,DQ(RA)"}, /* bcwp */ + { &test_stxvp_off32, "stxvp off32", "XSp,DQ(RA)"}, /* bcwp */ + { &test_stxvp_off48, "stxvp off48", "XSp,DQ(RA)"}, /* bcwp */ { NULL, NULL }, }; diff --git a/none/tests/ppc64/test_isa_3_1_XT.stdout.exp b/none/tests/ppc64/test_isa_3_1_XT.stdout.exp index 2132cf1409..fab9cef020 100644 --- a/none/tests/ppc64/test_isa_3_1_XT.stdout.exp +++ b/none/tests/ppc64/test_isa_3_1_XT.stdout.exp @@ -1,3 +1,16 @@ +lxvpx 0 (&buffer) => 7ff0000000007000 7f0000007f007000 3fe00094e0007359 7ff7020304057607 +lxvpx 8 (&buffer) => 7f0000007f007000 5a05a05a05a07a05 7ff7020304057607 7ff0000000007000 +lxvpx 10 (&buffer) => 5a05a05a05a07a05 0102030405067708 7ff0000000007000 7f0000007f007000 +lxvpx 18 (&buffer) => 0102030405067708 fedcba9876547210 7f0000007f007000 5a05a05a05a07a05 +lxvpx 20 (&buffer) => fedcba9876547210 0123456789ab7def 5a05a05a05a07a05 0102030405067708 +lxvpx 28 (&buffer) => 0123456789ab7def ffeeddccbbaa7988 0102030405067708 fedcba9876547210 + +lxvp 0 (&buffer) => 7ff0000000007000 7f0000007f007000 3fe00094e0007359 7ff7020304057607 + +lxvp 16 (&buffer) => 5a05a05a05a07a05 0102030405067708 7ff0000000007000 7f0000007f007000 + +lxvp 32 (&buffer) => fedcba9876547210 0123456789ab7def 5a05a05a05a07a05 0102030405067708 + plfd 0 (&buffer) => 5.000710e-01 plfd 4 (&buffer) => 2.752739e-289 @@ -108,6 +121,14 @@ pstxssp 32 (&buffer) => [ - - - - 5a05a05a00000000 - - - ] pstxssp 64 (&buffer) => +pstxvp off0 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e - - - - ] + +pstxvp off16 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e - - ] + +pstxvp off32 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - - - ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e] + +pstxvp off48 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - - - - - ff7ffffe7f7ffffe ff8000007f800000] + pstxv 0 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [ff7ffffe7f7ffffe ff8000007f800000 - - - - - - ] pstxv 4 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [7f7ffffee0007359 7f800000ff7ffffe 7ff00000ff800000 - - - - - ] @@ -116,4 +137,19 @@ pstxv 8 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [ - ff7ffffe7f7ffffe ff8 pstxv 16 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [ - - ff7ffffe7f7ffffe ff8000007f800000 - - - - ] -All done. Tested 54 different instruction groups +stxvpx 0 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e - - - - ] +stxvpx 8 (&buffer) 0000111e8000222e 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe => [ - 0080000e8080000e ff7ffffe7f7ffffe 0000111e8000222e 0180055e0180077e - - - ] +stxvpx 10 (&buffer) 7ff0000000000000 0000111e8000222e 0180055e0180077e 0080000e8080000e => [ - - 0180055e0180077e 0080000e8080000e 7ff0000000000000 0000111e8000222e - - ] +stxvpx 18 (&buffer) fff0000000000000 7ff0000000000000 0000111e8000222e 0180055e0180077e => [ - - - 0000111e8000222e 0180055e0180077e fff0000000000000 7ff0000000000000 - ] +stxvpx 20 (&buffer) 2208400000000000 fff0000000000000 7ff0000000000000 0000111e8000222e => [ - - - - 7ff0000000000000 0000111e8000222e 2208400000000000 fff0000000000000] +stxvpx 28 (&buffer) 0000000000000009 2208400000000000 fff0000000000000 7ff0000000000000 => [ - - - - - fff0000000000000 7ff0000000000000 0000000000000009] + +stxvp off0 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e - - - - ] + +stxvp off16 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e - - ] + +stxvp off32 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - - - ff7ffffe7f7ffffe ff8000007f800000 0180055e0180077e 0080000e8080000e] + +stxvp off48 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - - - - - ff7ffffe7f7ffffe ff8000007f800000] + +All done. Tested 67 different instruction groups