From: Harish Chegondi <harish.chegondi@intel.com>
Date: Tue, 10 Feb 2026 21:58:27 +0000 (-0800)
Subject: drm/xe/xe2lpg: Extend Wa_18041344222 to graphics IP 20.04
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=7c9b2de8a95c4b65b6e83c1312d225c6444dfbf7;p=thirdparty%2Fkernel%2Flinux.git

drm/xe/xe2lpg: Extend Wa_18041344222 to graphics IP 20.04

Apply WA 18041344222 to Xe2 LPG graphics IP version 20.04 too.

Bspec: 56024
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/6e66746246439249a278f3d157f06071d83504b6.1770760591.git.harish.chegondi@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 7cb4ef26eca77..76fa6d510aadb 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -579,6 +579,12 @@ static const struct xe_rtp_entry_sr engine_was[] = {
 		       FUNC(xe_rtp_match_first_render_or_compute)),
 	  XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
 	},
+	{ XE_RTP_NAME("18041344222"),
+	  XE_RTP_RULES(GRAPHICS_VERSION(2004),
+		       FUNC(xe_rtp_match_first_render_or_compute),
+		       FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
+	  XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
+	},
 
 	/* Xe2_HPG */