From: Greg Kroah-Hartman Date: Mon, 10 Apr 2017 16:41:46 +0000 (+0200) Subject: delete can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch X-Git-Tag: v4.4.61~14 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=7d60f19ee24ee8d413cf21a0eb13f407c89cddc9;p=thirdparty%2Fkernel%2Fstable-queue.git delete can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch --- diff --git a/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch b/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch deleted file mode 100644 index 2cca2489484..00000000000 --- a/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch +++ /dev/null @@ -1,66 +0,0 @@ -From foo@baz Mon Apr 10 18:08:16 CEST 2017 -From: alexander.levin@verizon.com -Date: Tue, 4 Apr 2017 19:32:39 +0000 -Subject: can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS -To: "gregkh@linuxfoundation.org" -Cc: "stable@vger.kernel.org" -Message-ID: <20170404193158.19041-99-alexander.levin@verizon.com> - -From: Marc Kleine-Budde - -[ Upstream commit 9eb7aa891101a4a09114ff3191f9877ea35eae06 ] - -In order to receive RTR frames in the non HW FIFO mode the RSS and EACEN bits -of the reg_ctrl2 have to be activated. As this has no side effect in the FIFO -mode, we do this unconditionally on cores with the reg_ctrl2. - -Signed-off-by: Marc Kleine-Budde -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - drivers/net/can/flexcan.c | 18 +++++++++++++----- - 1 file changed, 13 insertions(+), 5 deletions(-) - ---- a/drivers/net/can/flexcan.c -+++ b/drivers/net/can/flexcan.c -@@ -189,7 +189,8 @@ - */ - #define FLEXCAN_QUIRK_BROKEN_ERR_STATE BIT(1) /* [TR]WRN_INT not connected */ - #define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */ --#define FLEXCAN_QUIRK_DISABLE_MECR BIT(3) /* Disble Memory error detection */ -+#define FLEXCAN_QUIRK_ENABLE_EACEN_RRS BIT(3) /* Enable EACEN and RRS bit in ctrl2 */ -+#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disble Memory error detection */ - - /* Structure of the message buffer */ - struct flexcan_mb { -@@ -268,12 +269,13 @@ static struct flexcan_devtype_data fsl_p - - static struct flexcan_devtype_data fsl_imx28_devtype_data; - --static struct flexcan_devtype_data fsl_imx6q_devtype_data = { -- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG, -+static const struct flexcan_devtype_data fsl_imx6q_devtype_data = { -+ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS, - }; - --static struct flexcan_devtype_data fsl_vf610_devtype_data = { -- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_DISABLE_MECR, -+static const struct flexcan_devtype_data fsl_vf610_devtype_data = { -+ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | -+ FLEXCAN_QUIRK_DISABLE_MECR, - }; - - static const struct can_bittiming_const flexcan_bittiming_const = { -@@ -883,6 +885,12 @@ static int flexcan_chip_start(struct net - netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); - flexcan_write(reg_ctrl, ®s->ctrl); - -+ if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) { -+ reg_ctrl2 = flexcan_read(®s->ctrl2); -+ reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS; -+ flexcan_write(reg_ctrl2, ®s->ctrl2); -+ } -+ - /* clear and invalidate all mailboxes first */ - for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->mb); i++) { - flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE, diff --git a/queue-4.10/series b/queue-4.10/series index 35b06416e8a..850727df111 100644 --- a/queue-4.10/series +++ b/queue-4.10/series @@ -108,4 +108,3 @@ x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch -can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch diff --git a/queue-4.9/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch b/queue-4.9/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch deleted file mode 100644 index 0b5cde6603a..00000000000 --- a/queue-4.9/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch +++ /dev/null @@ -1,66 +0,0 @@ -From foo@baz Mon Apr 10 17:43:56 CEST 2017 -From: alexander.levin@verizon.com -Date: Tue, 4 Apr 2017 19:32:39 +0000 -Subject: can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS -To: "gregkh@linuxfoundation.org" -Cc: "stable@vger.kernel.org" -Message-ID: <20170404193158.19041-99-alexander.levin@verizon.com> - -From: Marc Kleine-Budde - -[ Upstream commit 9eb7aa891101a4a09114ff3191f9877ea35eae06 ] - -In order to receive RTR frames in the non HW FIFO mode the RSS and EACEN bits -of the reg_ctrl2 have to be activated. As this has no side effect in the FIFO -mode, we do this unconditionally on cores with the reg_ctrl2. - -Signed-off-by: Marc Kleine-Budde -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - drivers/net/can/flexcan.c | 18 +++++++++++++----- - 1 file changed, 13 insertions(+), 5 deletions(-) - ---- a/drivers/net/can/flexcan.c -+++ b/drivers/net/can/flexcan.c -@@ -189,7 +189,8 @@ - */ - #define FLEXCAN_QUIRK_BROKEN_ERR_STATE BIT(1) /* [TR]WRN_INT not connected */ - #define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */ --#define FLEXCAN_QUIRK_DISABLE_MECR BIT(3) /* Disble Memory error detection */ -+#define FLEXCAN_QUIRK_ENABLE_EACEN_RRS BIT(3) /* Enable EACEN and RRS bit in ctrl2 */ -+#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disble Memory error detection */ - - /* Structure of the message buffer */ - struct flexcan_mb { -@@ -268,12 +269,13 @@ static struct flexcan_devtype_data fsl_p - - static struct flexcan_devtype_data fsl_imx28_devtype_data; - --static struct flexcan_devtype_data fsl_imx6q_devtype_data = { -- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG, -+static const struct flexcan_devtype_data fsl_imx6q_devtype_data = { -+ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS, - }; - --static struct flexcan_devtype_data fsl_vf610_devtype_data = { -- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_DISABLE_MECR, -+static const struct flexcan_devtype_data fsl_vf610_devtype_data = { -+ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | -+ FLEXCAN_QUIRK_DISABLE_MECR, - }; - - static const struct can_bittiming_const flexcan_bittiming_const = { -@@ -883,6 +885,12 @@ static int flexcan_chip_start(struct net - netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); - flexcan_write(reg_ctrl, ®s->ctrl); - -+ if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) { -+ reg_ctrl2 = flexcan_read(®s->ctrl2); -+ reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS; -+ flexcan_write(reg_ctrl2, ®s->ctrl2); -+ } -+ - /* clear and invalidate all mailboxes first */ - for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->mb); i++) { - flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE, diff --git a/queue-4.9/series b/queue-4.9/series index 1aa16a3db38..f60bc3affcc 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -150,4 +150,3 @@ x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch -can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch