From: Carl Love Date: Mon, 15 Jun 2020 16:31:16 +0000 (-0500) Subject: Bugzilla 423021 - PPC: Add missing ISA 3.0 documentation link and HWCAPS test. X-Git-Tag: VALGRIND_3_17_0~175 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8151414f0c150a81b06c95a3eaab87a2558521a8;p=thirdparty%2Fvalgrind.git Bugzilla 423021 - PPC: Add missing ISA 3.0 documentation link and HWCAPS test. Add the check for the PPC_FEATURE2_ARCH_3_00 setting in the HWCAP2 string. Add the information on where to find the public IBM ISA 3.0B document. --- diff --git a/NEWS b/NEWS index e23c449166..0ffcb5bf9f 100644 --- a/NEWS +++ b/NEWS @@ -42,6 +42,7 @@ where XXXXXX is the bug number as listed below. 345077 linux syscall execveat support (linux 3.19) n-i-bz helgrind: If hg_cli__realloc fails, return NULL. +423021 PPC: Add missing ISA 3.0 documentation link and HWCAPS test. Release 3.16.1 (?? June 2020) diff --git a/coregrind/m_initimg/initimg-linux.c b/coregrind/m_initimg/initimg-linux.c index bab8aeca0f..e811ff667d 100644 --- a/coregrind/m_initimg/initimg-linux.c +++ b/coregrind/m_initimg/initimg-linux.c @@ -720,6 +720,8 @@ Addr setup_client_stack( void* init_sp, # if defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) case AT_HWCAP2: { Bool auxv_2_07, hw_caps_2_07; + Bool auxv_3_0, hw_caps_3_0; + /* The HWCAP2 field may contain an arch_2_07 entry that indicates * if the processor is compliant with the 2.07 ISA. (i.e. Power 8 * or beyond). The Valgrind vai.hwcaps value @@ -752,7 +754,27 @@ Addr setup_client_stack( void* init_sp, * matches the setting in VEX HWCAPS. */ vg_assert(auxv_2_07 == hw_caps_2_07); - } + + /* Power ISA version 3.0B + March 29, 2017 + https://ibm.ent.box.com/s/1hzcwkwf8rbju5h9iyf44wm94amnlcrv + + https://openpowerfoundation.org/technical/resource-catalog/ + http://openpowerfoundation.org/wp-content/uploads/resources/leabi/leabi-20170510.pdf + 64-bit ELF V2 ABI specification for Power. HWCAP2 bit pattern + for ISA 3.0, page 112. + + */ + /* ISA 3.0 */ + auxv_3_0 = (auxv->u.a_val & 0x00800000ULL) == 0x00800000ULL; + hw_caps_3_0 = (vex_archinfo->hwcaps & VEX_HWCAPS_PPC64_ISA3_0) + == VEX_HWCAPS_PPC64_ISA3_0; + + /* Verify the PPC_FEATURE2_ARCH_3_00 setting in HWCAP2 + * matches the setting in VEX HWCAPS. + */ + vg_assert(auxv_3_0 == hw_caps_3_0); + } break; # endif