From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 27 Mar 2014 09:06:43 +0000 (+0100)
Subject: ARM: zynq: slcr: Fix incorrect commentary
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8213c39e34b84d6e43d7642348884db84e65c0dd;p=thirdparty%2Fu-boot.git

ARM: zynq: slcr: Fix incorrect commentary

Fix c&p error in zynq_slcr_devcfg_enable() commentary
and extending it with description according
to Zynq TRM also in zynq_slcr_devcfg_disable().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c
index 3d474bfc576..71a42d250dd 100644
--- a/arch/arm/cpu/armv7/zynq/slcr.c
+++ b/arch/arm/cpu/armv7/zynq/slcr.c
@@ -189,7 +189,7 @@ void zynq_slcr_devcfg_disable(void)
 {
 	zynq_slcr_unlock();
 
-	/* Disable AXI interface */
+	/* Disable AXI interface by asserting FPGA resets */
 	writel(0xFFFFFFFF, &slcr_base->fpga_rst_ctrl);
 
 	/* Set Level Shifters DT618760 */
@@ -205,7 +205,7 @@ void zynq_slcr_devcfg_enable(void)
 	/* Set Level Shifters DT618760 */
 	writel(0xF, &slcr_base->lvl_shftr_en);
 
-	/* Disable AXI interface */
+	/* Enable AXI interface by de-asserting FPGA resets */
 	writel(0x0, &slcr_base->fpga_rst_ctrl);
 
 	zynq_slcr_lock();