From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Date: Mon, 15 Feb 2016 15:48:58 +0000 (+0530)
Subject: PCI: Xilinx NWL PCIe Bridge: Modifying device tree node
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=826820de173f505584a225697b6e49baf43ae21e;p=thirdparty%2Fu-boot.git

PCI: Xilinx NWL PCIe Bridge: Modifying device tree node

Modifying device tree node to support legacy interrupts.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index d03d066e035..1c88a90c638 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -629,6 +629,16 @@
 			      <0x0 0xe0000000 0x0 0x1000000>;
 			reg-names = "breg", "pcireg", "cfg";
 			ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
+			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
+					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
+					<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
+					<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
+			pcie_intc: legacy-interrupt-controller {
+				interrupt-controller;
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+			};
 		};
 
 		qspi: spi@ff0f0000 {