From: Greg Kroah-Hartman Date: Tue, 7 Apr 2020 16:41:38 +0000 (+0200) Subject: drop serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch X-Git-Tag: v5.4.31~1 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=826f362fafea446914cdcd43b7c991078c7cfd47;p=thirdparty%2Fkernel%2Fstable-queue.git drop serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch --- diff --git a/queue-4.14/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch b/queue-4.14/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch deleted file mode 100644 index 5c0295055bc..00000000000 --- a/queue-4.14/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch +++ /dev/null @@ -1,89 +0,0 @@ -From f6aa5beb45be27968a4df90176ca36dfc4363d37 Mon Sep 17 00:00:00 2001 -From: Marek Vasut -Date: Mon, 3 Sep 2018 02:44:52 +0200 -Subject: serial: 8250: Fix clearing FIFOs in RS485 mode again - -From: Marek Vasut - -commit f6aa5beb45be27968a4df90176ca36dfc4363d37 upstream. - -The 8250 FIFOs indeed need to be cleared after stopping transmission in -RS485 mode without SER_RS485_RX_DURING_TX flag set. But there are two -problems with the approach taken by the previous patch from Fixes tag. - -First, serial8250_clear_fifos() should clear fifos, but what it really -does is it enables the FIFOs unconditionally if present, clears them -and then sets the FCR register to zero, which effectively disables the -FIFOs. In case the FIFO is disabled, enabling it and clearing it makes -no sense and in fact can trigger misbehavior of the 8250 core. Moreover, -the FCR register may contain other FIFO configuration bits which may not -be writable unconditionally and writing them incorrectly can trigger -misbehavior of the 8250 core too. (ie. AM335x UART swallows the first -byte and retransmits the last byte twice because of this FCR write). - -Second, serial8250_clear_and_reinit_fifos() completely reloads the FCR, -but what really has to happen at the end of the RS485 transmission is -clearing of the FIFOs and nothing else. - -This patch repairs serial8250_clear_fifos() so that it really only -clears the FIFOs by operating on FCR[2:1] bits and leaves all the -other bits alone. It also undoes serial8250_clear_and_reinit_fifos() -from __do_stop_tx_rs485() as serial8250_clear_fifos() is sufficient. - -Signed-off-by: Marek Vasut -Fixes: 2bed8a8e7072 ("Clearing FIFOs in RS485 emulation mode causes subsequent transmits to break") -Cc: Daniel Jedrychowski -Cc: Greg Kroah-Hartman -Cc: stable # let it bake a bit before merging -Signed-off-by: Greg Kroah-Hartman - ---- - drivers/tty/serial/8250/8250_port.c | 29 ++++++++++++++++++++++++----- - 1 file changed, 24 insertions(+), 5 deletions(-) - ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -553,11 +553,30 @@ static unsigned int serial_icr_read(stru - */ - static void serial8250_clear_fifos(struct uart_8250_port *p) - { -+ unsigned char fcr; -+ unsigned char clr_mask = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT; -+ - if (p->capabilities & UART_CAP_FIFO) { -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO); -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO | -- UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); -- serial_out(p, UART_FCR, 0); -+ /* -+ * Make sure to avoid changing FCR[7:3] and ENABLE_FIFO bits. -+ * In case ENABLE_FIFO is not set, there is nothing to flush -+ * so just return. Furthermore, on certain implementations of -+ * the 8250 core, the FCR[7:3] bits may only be changed under -+ * specific conditions and changing them if those conditions -+ * are not met can have nasty side effects. One such core is -+ * the 8250-omap present in TI AM335x. -+ */ -+ fcr = serial_in(p, UART_FCR); -+ -+ /* FIFO is not enabled, there's nothing to clear. */ -+ if (!(fcr & UART_FCR_ENABLE_FIFO)) -+ return; -+ -+ fcr |= clr_mask; -+ serial_out(p, UART_FCR, fcr); -+ -+ fcr &= ~clr_mask; -+ serial_out(p, UART_FCR, fcr); - } - } - -@@ -1450,7 +1469,7 @@ static void __do_stop_tx_rs485(struct ua - * Enable previously disabled RX interrupts. - */ - if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { -- serial8250_clear_and_reinit_fifos(p); -+ serial8250_clear_fifos(p); - - p->ier |= UART_IER_RLSI | UART_IER_RDI; - serial_port_out(&p->port, UART_IER, p->ier); diff --git a/queue-4.14/series b/queue-4.14/series index bcf378cfd36..fa82865e853 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -11,5 +11,4 @@ blk-mq-allow-blocking-queue-tag-iter-callbacks.patch misc-pci_endpoint_test-fix-to-support-10-pci-endpoint-test-devices.patch coresight-do-not-use-the-bit-macro-in-the-uapi-header.patch padata-always-acquire-cpu_hotplug_lock-before-pinst-lock.patch -serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch mm-mempolicy-require-at-least-one-nodeid-for-mpol_preferred.patch diff --git a/queue-4.19/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch b/queue-4.19/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch deleted file mode 100644 index d8bc2ee744c..00000000000 --- a/queue-4.19/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch +++ /dev/null @@ -1,89 +0,0 @@ -From f6aa5beb45be27968a4df90176ca36dfc4363d37 Mon Sep 17 00:00:00 2001 -From: Marek Vasut -Date: Mon, 3 Sep 2018 02:44:52 +0200 -Subject: serial: 8250: Fix clearing FIFOs in RS485 mode again - -From: Marek Vasut - -commit f6aa5beb45be27968a4df90176ca36dfc4363d37 upstream. - -The 8250 FIFOs indeed need to be cleared after stopping transmission in -RS485 mode without SER_RS485_RX_DURING_TX flag set. But there are two -problems with the approach taken by the previous patch from Fixes tag. - -First, serial8250_clear_fifos() should clear fifos, but what it really -does is it enables the FIFOs unconditionally if present, clears them -and then sets the FCR register to zero, which effectively disables the -FIFOs. In case the FIFO is disabled, enabling it and clearing it makes -no sense and in fact can trigger misbehavior of the 8250 core. Moreover, -the FCR register may contain other FIFO configuration bits which may not -be writable unconditionally and writing them incorrectly can trigger -misbehavior of the 8250 core too. (ie. AM335x UART swallows the first -byte and retransmits the last byte twice because of this FCR write). - -Second, serial8250_clear_and_reinit_fifos() completely reloads the FCR, -but what really has to happen at the end of the RS485 transmission is -clearing of the FIFOs and nothing else. - -This patch repairs serial8250_clear_fifos() so that it really only -clears the FIFOs by operating on FCR[2:1] bits and leaves all the -other bits alone. It also undoes serial8250_clear_and_reinit_fifos() -from __do_stop_tx_rs485() as serial8250_clear_fifos() is sufficient. - -Signed-off-by: Marek Vasut -Fixes: 2bed8a8e7072 ("Clearing FIFOs in RS485 emulation mode causes subsequent transmits to break") -Cc: Daniel Jedrychowski -Cc: Greg Kroah-Hartman -Cc: stable # let it bake a bit before merging -Signed-off-by: Greg Kroah-Hartman - ---- - drivers/tty/serial/8250/8250_port.c | 29 ++++++++++++++++++++++++----- - 1 file changed, 24 insertions(+), 5 deletions(-) - ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -552,11 +552,30 @@ static unsigned int serial_icr_read(stru - */ - static void serial8250_clear_fifos(struct uart_8250_port *p) - { -+ unsigned char fcr; -+ unsigned char clr_mask = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT; -+ - if (p->capabilities & UART_CAP_FIFO) { -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO); -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO | -- UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); -- serial_out(p, UART_FCR, 0); -+ /* -+ * Make sure to avoid changing FCR[7:3] and ENABLE_FIFO bits. -+ * In case ENABLE_FIFO is not set, there is nothing to flush -+ * so just return. Furthermore, on certain implementations of -+ * the 8250 core, the FCR[7:3] bits may only be changed under -+ * specific conditions and changing them if those conditions -+ * are not met can have nasty side effects. One such core is -+ * the 8250-omap present in TI AM335x. -+ */ -+ fcr = serial_in(p, UART_FCR); -+ -+ /* FIFO is not enabled, there's nothing to clear. */ -+ if (!(fcr & UART_FCR_ENABLE_FIFO)) -+ return; -+ -+ fcr |= clr_mask; -+ serial_out(p, UART_FCR, fcr); -+ -+ fcr &= ~clr_mask; -+ serial_out(p, UART_FCR, fcr); - } - } - -@@ -1448,7 +1467,7 @@ static void __do_stop_tx_rs485(struct ua - * Enable previously disabled RX interrupts. - */ - if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { -- serial8250_clear_and_reinit_fifos(p); -+ serial8250_clear_fifos(p); - - p->ier |= UART_IER_RLSI | UART_IER_RDI; - serial_port_out(&p->port, UART_IER, p->ier); diff --git a/queue-4.19/series b/queue-4.19/series index 372284a70ba..390d05da7c9 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -23,6 +23,5 @@ rxrpc-fix-sendmsg-msg_waitall-handling.patch net-fix-tx-hash-bound-checking.patch padata-always-acquire-cpu_hotplug_lock-before-pinst-lock.patch bitops-protect-variables-in-set_mask_bits-macro.patch -serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch include-linux-notifier.h-srcu-fix-ctags.patch mm-mempolicy-require-at-least-one-nodeid-for-mpol_preferred.patch diff --git a/queue-4.9/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch b/queue-4.9/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch deleted file mode 100644 index 15f32f4ab4f..00000000000 --- a/queue-4.9/serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch +++ /dev/null @@ -1,89 +0,0 @@ -From f6aa5beb45be27968a4df90176ca36dfc4363d37 Mon Sep 17 00:00:00 2001 -From: Marek Vasut -Date: Mon, 3 Sep 2018 02:44:52 +0200 -Subject: serial: 8250: Fix clearing FIFOs in RS485 mode again - -From: Marek Vasut - -commit f6aa5beb45be27968a4df90176ca36dfc4363d37 upstream. - -The 8250 FIFOs indeed need to be cleared after stopping transmission in -RS485 mode without SER_RS485_RX_DURING_TX flag set. But there are two -problems with the approach taken by the previous patch from Fixes tag. - -First, serial8250_clear_fifos() should clear fifos, but what it really -does is it enables the FIFOs unconditionally if present, clears them -and then sets the FCR register to zero, which effectively disables the -FIFOs. In case the FIFO is disabled, enabling it and clearing it makes -no sense and in fact can trigger misbehavior of the 8250 core. Moreover, -the FCR register may contain other FIFO configuration bits which may not -be writable unconditionally and writing them incorrectly can trigger -misbehavior of the 8250 core too. (ie. AM335x UART swallows the first -byte and retransmits the last byte twice because of this FCR write). - -Second, serial8250_clear_and_reinit_fifos() completely reloads the FCR, -but what really has to happen at the end of the RS485 transmission is -clearing of the FIFOs and nothing else. - -This patch repairs serial8250_clear_fifos() so that it really only -clears the FIFOs by operating on FCR[2:1] bits and leaves all the -other bits alone. It also undoes serial8250_clear_and_reinit_fifos() -from __do_stop_tx_rs485() as serial8250_clear_fifos() is sufficient. - -Signed-off-by: Marek Vasut -Fixes: 2bed8a8e7072 ("Clearing FIFOs in RS485 emulation mode causes subsequent transmits to break") -Cc: Daniel Jedrychowski -Cc: Greg Kroah-Hartman -Cc: stable # let it bake a bit before merging -Signed-off-by: Greg Kroah-Hartman - ---- - drivers/tty/serial/8250/8250_port.c | 29 ++++++++++++++++++++++++----- - 1 file changed, 24 insertions(+), 5 deletions(-) - ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -517,11 +517,30 @@ static unsigned int serial_icr_read(stru - */ - static void serial8250_clear_fifos(struct uart_8250_port *p) - { -+ unsigned char fcr; -+ unsigned char clr_mask = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT; -+ - if (p->capabilities & UART_CAP_FIFO) { -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO); -- serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO | -- UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); -- serial_out(p, UART_FCR, 0); -+ /* -+ * Make sure to avoid changing FCR[7:3] and ENABLE_FIFO bits. -+ * In case ENABLE_FIFO is not set, there is nothing to flush -+ * so just return. Furthermore, on certain implementations of -+ * the 8250 core, the FCR[7:3] bits may only be changed under -+ * specific conditions and changing them if those conditions -+ * are not met can have nasty side effects. One such core is -+ * the 8250-omap present in TI AM335x. -+ */ -+ fcr = serial_in(p, UART_FCR); -+ -+ /* FIFO is not enabled, there's nothing to clear. */ -+ if (!(fcr & UART_FCR_ENABLE_FIFO)) -+ return; -+ -+ fcr |= clr_mask; -+ serial_out(p, UART_FCR, fcr); -+ -+ fcr &= ~clr_mask; -+ serial_out(p, UART_FCR, fcr); - } - } - -@@ -1410,7 +1429,7 @@ static void __do_stop_tx_rs485(struct ua - * Enable previously disabled RX interrupts. - */ - if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { -- serial8250_clear_and_reinit_fifos(p); -+ serial8250_clear_fifos(p); - - p->ier |= UART_IER_RLSI | UART_IER_RDI; - serial_port_out(&p->port, UART_IER, p->ier); diff --git a/queue-4.9/series b/queue-4.9/series index 5bbd08e7c63..13e54bf3071 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -11,5 +11,4 @@ blk-mq-allow-blocking-queue-tag-iter-callbacks.patch coresight-do-not-use-the-bit-macro-in-the-uapi-header.patch net-dsa-tag_brcm-fix-skb-fwd_offload_mark-location.patch padata-always-acquire-cpu_hotplug_lock-before-pinst-lock.patch -serial-8250-fix-clearing-fifos-in-rs485-mode-again.patch mm-mempolicy-require-at-least-one-nodeid-for-mpol_preferred.patch