From: Greg Kroah-Hartman Date: Mon, 14 Jul 2014 19:05:46 +0000 (-0700) Subject: 3.15-stable patches X-Git-Tag: v3.4.99~34 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=831ad0ee03e8cfd52273b9dbb45472e95ac327fd;p=thirdparty%2Fkernel%2Fstable-queue.git 3.15-stable patches added patches: drm-i915-acer-c720-and-c720p-have-controllable-backlights.patch drm-i915-don-t-clobber-the-gtt-when-it-s-within-stolen-memory.patch drm-i915-quirk-asserts-controllable-backlight-presence-overriding-vbt.patch drm-i915-toshiba-cb35-has-a-controllable-backlight.patch drm-radeon-dpm-reenabling-ss-on-cayman.patch drm-radeon-fix-typo-in-ci_stop_dpm.patch drm-radeon-fix-typo-in-golden-register-setup-on-evergreen.patch drm-radeon-page-table-bos-are-kernel-allocations.patch drm-radeon-stop-poisoning-the-gart-tlb.patch --- diff --git a/queue-3.15/drm-i915-acer-c720-and-c720p-have-controllable-backlights.patch b/queue-3.15/drm-i915-acer-c720-and-c720p-have-controllable-backlights.patch new file mode 100644 index 00000000000..d4b8feda064 --- /dev/null +++ b/queue-3.15/drm-i915-acer-c720-and-c720p-have-controllable-backlights.patch @@ -0,0 +1,39 @@ +From 2e93a1aa9ca455aa3ad0294bcd6d66f38bf8b758 Mon Sep 17 00:00:00 2001 +From: Scot Doyle +Date: Thu, 3 Jul 2014 23:27:51 +0000 +Subject: drm/i915: Acer C720 and C720P have controllable backlights + +From: Scot Doyle + +commit 2e93a1aa9ca455aa3ad0294bcd6d66f38bf8b758 upstream. + +The Acer C720 and C720P Chromebooks (with Celeron 2955U CPU) have a +controllable backlight although their VBT reports otherwise. Apply quirk +to ignore the backlight presence check during backlight setup. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79813 +Tested-by: James Duley +Tested-by: Michael Mullin +Signed-off-by: Scot Doyle +CC: Jani Nikula +Signed-off-by: Jani Nikula +[danvet: Add cc: stable because the regressing commit is in 3.15.] +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -11245,6 +11245,9 @@ static struct intel_quirk intel_quirks[] + + /* Acer Aspire 5336 */ + { 0x2a42, 0x1025, 0x048a, quirk_invert_brightness }, ++ ++ /* Acer C720 and C720P Chromebooks (Celeron 2955U) have backlights */ ++ { 0x0a06, 0x1025, 0x0a11, quirk_backlight_present }, + }; + + static void intel_init_quirks(struct drm_device *dev) diff --git a/queue-3.15/drm-i915-don-t-clobber-the-gtt-when-it-s-within-stolen-memory.patch b/queue-3.15/drm-i915-don-t-clobber-the-gtt-when-it-s-within-stolen-memory.patch new file mode 100644 index 00000000000..326647cabc7 --- /dev/null +++ b/queue-3.15/drm-i915-don-t-clobber-the-gtt-when-it-s-within-stolen-memory.patch @@ -0,0 +1,95 @@ +From f1e1c2129b79cfdaf07bca37c5a10569fe021abe Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Thu, 5 Jun 2014 20:02:59 +0300 +Subject: drm/i915: Don't clobber the GTT when it's within stolen memory +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit f1e1c2129b79cfdaf07bca37c5a10569fe021abe upstream. + +On most gen2-4 platforms the GTT can be (or maybe always is?) +inside the stolen memory region. If that's the case, reduce the +size of the stolen memory appropriately to make make sure we +don't clobber the GTT. + +v2: Deal with gen4 36 bit physical address + +Signed-off-by: Ville Syrjälä +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80151 +Acked-by: Chris Wilson +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_gem_stolen.c | 44 +++++++++++++++++++++++++++++++++ + drivers/gpu/drm/i915/i915_reg.h | 3 ++ + 2 files changed, 47 insertions(+) + +--- a/drivers/gpu/drm/i915/i915_gem_stolen.c ++++ b/drivers/gpu/drm/i915/i915_gem_stolen.c +@@ -74,6 +74,50 @@ static unsigned long i915_stolen_to_phys + if (base == 0) + return 0; + ++ /* make sure we don't clobber the GTT if it's within stolen memory */ ++ if (INTEL_INFO(dev)->gen <= 4 && !IS_G33(dev) && !IS_G4X(dev)) { ++ struct { ++ u32 start, end; ++ } stolen[2] = { ++ { .start = base, .end = base + dev_priv->gtt.stolen_size, }, ++ { .start = base, .end = base + dev_priv->gtt.stolen_size, }, ++ }; ++ u64 gtt_start, gtt_end; ++ ++ gtt_start = I915_READ(PGTBL_CTL); ++ if (IS_GEN4(dev)) ++ gtt_start = (gtt_start & PGTBL_ADDRESS_LO_MASK) | ++ (gtt_start & PGTBL_ADDRESS_HI_MASK) << 28; ++ else ++ gtt_start &= PGTBL_ADDRESS_LO_MASK; ++ gtt_end = gtt_start + gtt_total_entries(dev_priv->gtt) * 4; ++ ++ if (gtt_start >= stolen[0].start && gtt_start < stolen[0].end) ++ stolen[0].end = gtt_start; ++ if (gtt_end > stolen[1].start && gtt_end <= stolen[1].end) ++ stolen[1].start = gtt_end; ++ ++ /* pick the larger of the two chunks */ ++ if (stolen[0].end - stolen[0].start > ++ stolen[1].end - stolen[1].start) { ++ base = stolen[0].start; ++ dev_priv->gtt.stolen_size = stolen[0].end - stolen[0].start; ++ } else { ++ base = stolen[1].start; ++ dev_priv->gtt.stolen_size = stolen[1].end - stolen[1].start; ++ } ++ ++ if (stolen[0].start != stolen[1].start || ++ stolen[0].end != stolen[1].end) { ++ DRM_DEBUG_KMS("GTT within stolen memory at 0x%llx-0x%llx\n", ++ (unsigned long long) gtt_start, ++ (unsigned long long) gtt_end - 1); ++ DRM_DEBUG_KMS("Stolen memory adjusted to 0x%x-0x%x\n", ++ base, base + (u32) dev_priv->gtt.stolen_size - 1); ++ } ++ } ++ ++ + /* Verify that nothing else uses this physical address. Stolen + * memory should be reserved by the BIOS and hidden from the + * kernel. So if the region is already marked as busy, something +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -659,6 +659,9 @@ enum punit_power_well { + /* + * Instruction and interrupt control regs + */ ++#define PGTBL_CTL 0x02020 ++#define PGTBL_ADDRESS_LO_MASK 0xfffff000 /* bits [31:12] */ ++#define PGTBL_ADDRESS_HI_MASK 0x000000f0 /* bits [35:32] (gen4) */ + #define PGTBL_ER 0x02024 + #define RENDER_RING_BASE 0x02000 + #define BSD_RING_BASE 0x04000 diff --git a/queue-3.15/drm-i915-quirk-asserts-controllable-backlight-presence-overriding-vbt.patch b/queue-3.15/drm-i915-quirk-asserts-controllable-backlight-presence-overriding-vbt.patch new file mode 100644 index 00000000000..df570bbed59 --- /dev/null +++ b/queue-3.15/drm-i915-quirk-asserts-controllable-backlight-presence-overriding-vbt.patch @@ -0,0 +1,79 @@ +From 9c72cc6f00d24711ef585772396dd1ae180881a6 Mon Sep 17 00:00:00 2001 +From: Scot Doyle +Date: Thu, 3 Jul 2014 23:27:50 +0000 +Subject: drm/i915: quirk asserts controllable backlight presence, overriding VBT + +From: Scot Doyle + +commit 9c72cc6f00d24711ef585772396dd1ae180881a6 upstream. + +commit c675949ec58ca50d5a3ae3c757892f1560f6e896 +Author: Jani Nikula +Date: Wed Apr 9 11:31:37 2014 +0300 + + drm/i915: do not setup backlight if not available according to VBT + +caused a regression on machines with a misconfigured VBT. Add a quirk to +assert the presence of a controllable backlight. Use it to ignore the VBT +backlight presence check during backlight setup. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79813 +Tested-by: James Duley +Tested-by: Michael Mullin +Reviewed-by: Jani Nikula +Signed-off-by: Scot Doyle +Signed-off-by: Jani Nikula +[danvet: Add cc: stable because the regressing commit is in 3.15.] +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.h | 1 + + drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ + drivers/gpu/drm/i915/intel_panel.c | 8 ++++++-- + 3 files changed, 15 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -803,6 +803,7 @@ enum intel_sbi_destination { + #define QUIRK_PIPEA_FORCE (1<<0) + #define QUIRK_LVDS_SSC_DISABLE (1<<1) + #define QUIRK_INVERT_BRIGHTNESS (1<<2) ++#define QUIRK_BACKLIGHT_PRESENT (1<<3) + + struct intel_fbdev; + struct intel_fbc_work; +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -11166,6 +11166,14 @@ static void quirk_invert_brightness(stru + DRM_INFO("applying inverted panel brightness quirk\n"); + } + ++/* Some VBT's incorrectly indicate no backlight is present */ ++static void quirk_backlight_present(struct drm_device *dev) ++{ ++ struct drm_i915_private *dev_priv = dev->dev_private; ++ dev_priv->quirks |= QUIRK_BACKLIGHT_PRESENT; ++ DRM_INFO("applying backlight present quirk\n"); ++} ++ + struct intel_quirk { + int device; + int subsystem_vendor; +--- a/drivers/gpu/drm/i915/intel_panel.c ++++ b/drivers/gpu/drm/i915/intel_panel.c +@@ -1065,8 +1065,12 @@ int intel_panel_setup_backlight(struct d + int ret; + + if (!dev_priv->vbt.backlight.present) { +- DRM_DEBUG_KMS("native backlight control not available per VBT\n"); +- return 0; ++ if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { ++ DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); ++ } else { ++ DRM_DEBUG_KMS("no backlight present per VBT\n"); ++ return 0; ++ } + } + + /* set level and max in panel struct */ diff --git a/queue-3.15/drm-i915-toshiba-cb35-has-a-controllable-backlight.patch b/queue-3.15/drm-i915-toshiba-cb35-has-a-controllable-backlight.patch new file mode 100644 index 00000000000..cbd7cf47e9a --- /dev/null +++ b/queue-3.15/drm-i915-toshiba-cb35-has-a-controllable-backlight.patch @@ -0,0 +1,39 @@ +From d4967d8c6d4f52623f2be8eaff0b445dc5863c92 Mon Sep 17 00:00:00 2001 +From: Scot Doyle +Date: Thu, 3 Jul 2014 23:27:52 +0000 +Subject: drm/i915: Toshiba CB35 has a controllable backlight + +From: Scot Doyle + +commit d4967d8c6d4f52623f2be8eaff0b445dc5863c92 upstream. + +The Toshiba CB35 Chromebook (with Celeron 2955U CPU) has a controllable +backlight although its VBT reports otherwise. Apply quirk to ignore the +backlight presence check during backlight setup. + +Patch tested by author on Toshiba CB35. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79813 +Signed-off-by: Scot Doyle +CC: Jani Nikula +Signed-off-by: Jani Nikula +[danvet: Add cc: stable because the regressing commit is in 3.15.] +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -11248,6 +11248,9 @@ static struct intel_quirk intel_quirks[] + + /* Acer C720 and C720P Chromebooks (Celeron 2955U) have backlights */ + { 0x0a06, 0x1025, 0x0a11, quirk_backlight_present }, ++ ++ /* Toshiba CB35 Chromebook (Celeron 2955U) */ ++ { 0x0a06, 0x1179, 0x0a88, quirk_backlight_present }, + }; + + static void intel_init_quirks(struct drm_device *dev) diff --git a/queue-3.15/drm-radeon-dpm-reenabling-ss-on-cayman.patch b/queue-3.15/drm-radeon-dpm-reenabling-ss-on-cayman.patch new file mode 100644 index 00000000000..a9ba2ef727d --- /dev/null +++ b/queue-3.15/drm-radeon-dpm-reenabling-ss-on-cayman.patch @@ -0,0 +1,38 @@ +From 41959341ac7e33dd360c7a881d13566f9eca37b2 Mon Sep 17 00:00:00 2001 +From: Alexandre Demers +Date: Tue, 8 Jul 2014 22:27:36 -0400 +Subject: drm/radeon/dpm: Reenabling SS on Cayman + +From: Alexandre Demers + +commit 41959341ac7e33dd360c7a881d13566f9eca37b2 upstream. + +It reverts commit c745fe611ca42295c9d91d8e305d27983e9132ef now that +Cayman is stable since VDDCI fix. Spread spectrum was not the culprit. + +This depends on b0880e87c1fd038b84498944f52e52c3e86ebe59 +(drm/radeon/dpm: fix vddci setup typo on cayman). + +Signed-off-by: Alexandre Demers +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/rv770_dpm.c | 6 ------ + 1 file changed, 6 deletions(-) + +--- a/drivers/gpu/drm/radeon/rv770_dpm.c ++++ b/drivers/gpu/drm/radeon/rv770_dpm.c +@@ -2329,12 +2329,6 @@ void rv770_get_engine_memory_ss(struct r + pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, + ASIC_INTERNAL_MEMORY_SS, 0); + +- /* disable ss, causes hangs on some cayman boards */ +- if (rdev->family == CHIP_CAYMAN) { +- pi->sclk_ss = false; +- pi->mclk_ss = false; +- } +- + if (pi->sclk_ss || pi->mclk_ss) + pi->dynamic_ss = true; + else diff --git a/queue-3.15/drm-radeon-fix-typo-in-ci_stop_dpm.patch b/queue-3.15/drm-radeon-fix-typo-in-ci_stop_dpm.patch new file mode 100644 index 00000000000..369c50f244a --- /dev/null +++ b/queue-3.15/drm-radeon-fix-typo-in-ci_stop_dpm.patch @@ -0,0 +1,30 @@ +From ed96377132e564d797c48a5490fd46bed01c4273 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 8 Jul 2014 18:25:25 -0400 +Subject: drm/radeon: fix typo in ci_stop_dpm() + +From: Alex Deucher + +commit ed96377132e564d797c48a5490fd46bed01c4273 upstream. + +Need to use the RREG32_SMC() accessor since the register +is an smc indirect index. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/ci_dpm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/radeon/ci_dpm.c ++++ b/drivers/gpu/drm/radeon/ci_dpm.c +@@ -1179,7 +1179,7 @@ static int ci_stop_dpm(struct radeon_dev + tmp &= ~GLOBAL_PWRMGT_EN; + WREG32_SMC(GENERAL_PWRMGT, tmp); + +- tmp = RREG32(SCLK_PWRMGT_CNTL); ++ tmp = RREG32_SMC(SCLK_PWRMGT_CNTL); + tmp &= ~DYNAMIC_PM_EN; + WREG32_SMC(SCLK_PWRMGT_CNTL, tmp); + diff --git a/queue-3.15/drm-radeon-fix-typo-in-golden-register-setup-on-evergreen.patch b/queue-3.15/drm-radeon-fix-typo-in-golden-register-setup-on-evergreen.patch new file mode 100644 index 00000000000..2445f40c787 --- /dev/null +++ b/queue-3.15/drm-radeon-fix-typo-in-golden-register-setup-on-evergreen.patch @@ -0,0 +1,59 @@ +From 6abafb78f9881b4891baf74ab4e9f090ae45230e Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 7 Jul 2014 17:59:37 -0400 +Subject: drm/radeon: fix typo in golden register setup on evergreen + +From: Alex Deucher + +commit 6abafb78f9881b4891baf74ab4e9f090ae45230e upstream. + +Fixes hangs on driver load on some cards. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=76998 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/evergreen.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -189,7 +189,7 @@ static const u32 evergreen_golden_regist + 0x8c1c, 0xffffffff, 0x00001010, + 0x28350, 0xffffffff, 0x00000000, + 0xa008, 0xffffffff, 0x00010000, +- 0x5cc, 0xffffffff, 0x00000001, ++ 0x5c4, 0xffffffff, 0x00000001, + 0x9508, 0xffffffff, 0x00000002, + 0x913c, 0x0000000f, 0x0000000a + }; +@@ -476,7 +476,7 @@ static const u32 cedar_golden_registers[ + 0x8c1c, 0xffffffff, 0x00001010, + 0x28350, 0xffffffff, 0x00000000, + 0xa008, 0xffffffff, 0x00010000, +- 0x5cc, 0xffffffff, 0x00000001, ++ 0x5c4, 0xffffffff, 0x00000001, + 0x9508, 0xffffffff, 0x00000002 + }; + +@@ -635,7 +635,7 @@ static const u32 juniper_mgcg_init[] = + static const u32 supersumo_golden_registers[] = + { + 0x5eb4, 0xffffffff, 0x00000002, +- 0x5cc, 0xffffffff, 0x00000001, ++ 0x5c4, 0xffffffff, 0x00000001, + 0x7030, 0xffffffff, 0x00000011, + 0x7c30, 0xffffffff, 0x00000011, + 0x6104, 0x01000300, 0x00000000, +@@ -719,7 +719,7 @@ static const u32 sumo_golden_registers[] + static const u32 wrestler_golden_registers[] = + { + 0x5eb4, 0xffffffff, 0x00000002, +- 0x5cc, 0xffffffff, 0x00000001, ++ 0x5c4, 0xffffffff, 0x00000001, + 0x7030, 0xffffffff, 0x00000011, + 0x7c30, 0xffffffff, 0x00000011, + 0x6104, 0x01000300, 0x00000000, diff --git a/queue-3.15/drm-radeon-page-table-bos-are-kernel-allocations.patch b/queue-3.15/drm-radeon-page-table-bos-are-kernel-allocations.patch new file mode 100644 index 00000000000..bf6f6b21b72 --- /dev/null +++ b/queue-3.15/drm-radeon-page-table-bos-are-kernel-allocations.patch @@ -0,0 +1,42 @@ +From 7dae77f8809a81b0dc5195debae8fd78cbbcc550 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= +Date: Wed, 2 Jul 2014 21:28:10 +0200 +Subject: drm/radeon: page table BOs are kernel allocations +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Christian König + +commit 7dae77f8809a81b0dc5195debae8fd78cbbcc550 upstream. + +Userspace shouldn't be able to access them. + +Signed-off-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_vm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_vm.c ++++ b/drivers/gpu/drm/radeon/radeon_vm.c +@@ -493,7 +493,7 @@ int radeon_vm_bo_set_addr(struct radeon_ + mutex_unlock(&vm->mutex); + + r = radeon_bo_create(rdev, RADEON_VM_PTE_COUNT * 8, +- RADEON_GPU_PAGE_SIZE, false, ++ RADEON_GPU_PAGE_SIZE, true, + RADEON_GEM_DOMAIN_VRAM, NULL, &pt); + if (r) + return r; +@@ -913,7 +913,7 @@ int radeon_vm_init(struct radeon_device + return -ENOMEM; + } + +- r = radeon_bo_create(rdev, pd_size, RADEON_VM_PTB_ALIGN_SIZE, false, ++ r = radeon_bo_create(rdev, pd_size, RADEON_VM_PTB_ALIGN_SIZE, true, + RADEON_GEM_DOMAIN_VRAM, NULL, + &vm->page_directory); + if (r) diff --git a/queue-3.15/drm-radeon-stop-poisoning-the-gart-tlb.patch b/queue-3.15/drm-radeon-stop-poisoning-the-gart-tlb.patch new file mode 100644 index 00000000000..af7e0a73a30 --- /dev/null +++ b/queue-3.15/drm-radeon-stop-poisoning-the-gart-tlb.patch @@ -0,0 +1,43 @@ +From 0986c1a55ca64b44ee126a2f719a6e9f28cbe0ed Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= +Date: Wed, 4 Jun 2014 15:29:56 +0200 +Subject: drm/radeon: stop poisoning the GART TLB +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Christian König + +commit 0986c1a55ca64b44ee126a2f719a6e9f28cbe0ed upstream. + +When we set the valid bit on invalid GART entries they are +loaded into the TLB when an adjacent entry is loaded. This +poisons the TLB with invalid entries which are sometimes +not correctly removed on TLB flush. + +For stable inclusion the patch probably needs to be modified a bit. + +Signed-off-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + + +--- + drivers/gpu/drm/radeon/rs600.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/rs600.c ++++ b/drivers/gpu/drm/radeon/rs600.c +@@ -646,8 +646,10 @@ int rs600_gart_set_page(struct radeon_de + return -EINVAL; + } + addr = addr & 0xFFFFFFFFFFFFF000ULL; +- addr |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED; +- addr |= R600_PTE_READABLE | R600_PTE_WRITEABLE; ++ if (addr != rdev->dummy_page.addr) ++ addr |= R600_PTE_VALID | R600_PTE_READABLE | ++ R600_PTE_WRITEABLE; ++ addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED; + writeq(addr, ptr + (i * 8)); + return 0; + } diff --git a/queue-3.15/series b/queue-3.15/series index 3ba0e0c510f..669bdc8f9b8 100644 --- a/queue-3.15/series +++ b/queue-3.15/series @@ -52,3 +52,12 @@ ext4-clarify-ext4_error-message-in-ext4_mb_generate_buddy_error.patch ext4-disable-synchronous-transaction-batching-if-max_batch_time-0.patch ext4-revert-commit-which-was-causing-fs-corruption-after-journal-replays.patch ext4-fix-a-potential-deadlock-in-__ext4_es_shrink.patch +drm-radeon-dpm-reenabling-ss-on-cayman.patch +drm-radeon-fix-typo-in-ci_stop_dpm.patch +drm-radeon-fix-typo-in-golden-register-setup-on-evergreen.patch +drm-radeon-page-table-bos-are-kernel-allocations.patch +drm-radeon-stop-poisoning-the-gart-tlb.patch +drm-i915-quirk-asserts-controllable-backlight-presence-overriding-vbt.patch +drm-i915-acer-c720-and-c720p-have-controllable-backlights.patch +drm-i915-toshiba-cb35-has-a-controllable-backlight.patch +drm-i915-don-t-clobber-the-gtt-when-it-s-within-stolen-memory.patch