From: Sasha Levin Date: Mon, 12 Aug 2024 01:09:14 +0000 (-0400) Subject: Fixes for 6.10 X-Git-Tag: v6.1.105~102 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=84860e54777b223f8f2edbde77edf298b22a802f;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.10 Signed-off-by: Sasha Levin --- diff --git a/queue-6.10/alsa-usb-audio-re-add-scratchamp-quirk-entries.patch b/queue-6.10/alsa-usb-audio-re-add-scratchamp-quirk-entries.patch new file mode 100644 index 00000000000..fdf4148d096 --- /dev/null +++ b/queue-6.10/alsa-usb-audio-re-add-scratchamp-quirk-entries.patch @@ -0,0 +1,44 @@ +From 8b09e441f53dae574b7a3e544f436524ed95365d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 8 Aug 2024 10:18:01 +0200 +Subject: ALSA: usb-audio: Re-add ScratchAmp quirk entries + +From: Takashi Iwai + +[ Upstream commit 03898691d42e0170e7d00f07cbe21ce0e9f3a8fa ] + +At the code refactoring of USB-audio quirk handling, I assumed that +the quirk entries of Stanton ScratchAmp devices were only about the +device name, and moved them completely into the rename table. +But it seems that the device requires the quirk entry so that it's +probed by the driver itself. + +This re-adds back the quirk entries of ScratchAmp, but in a +minimalistic manner. + +Fixes: 5436f59bc5bc ("ALSA: usb-audio: Move device rename and profile quirks to an internal table") +Link: https://patch.msgid.link/20240808081803.22300-1-tiwai@suse.de +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + sound/usb/quirks-table.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h +index 73abc38a54006..f13a8d63a019a 100644 +--- a/sound/usb/quirks-table.h ++++ b/sound/usb/quirks-table.h +@@ -2594,6 +2594,10 @@ YAMAHA_DEVICE(0x7010, "UB99"), + } + }, + ++/* Stanton ScratchAmp */ ++{ USB_DEVICE(0x103d, 0x0100) }, ++{ USB_DEVICE(0x103d, 0x0101) }, ++ + /* Novation EMS devices */ + { + USB_DEVICE_VENDOR_SPEC(0x1235, 0x0001), +-- +2.43.0 + diff --git a/queue-6.10/arm64-cputype-add-cortex-a720-definitions.patch b/queue-6.10/arm64-cputype-add-cortex-a720-definitions.patch new file mode 100644 index 00000000000..d657fd82bb3 --- /dev/null +++ b/queue-6.10/arm64-cputype-add-cortex-a720-definitions.patch @@ -0,0 +1,52 @@ +From 4bcfe811e37b27ac86c0bf16f7908f4c9c7dabd1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:14 +0100 +Subject: arm64: cputype: Add Cortex-A720 definitions + +From: Mark Rutland + +[ Upstream commit add332c40328cf06fe35e4b3cde8ec315c4629e5 ] + +Add cputype definitions for Cortex-A720. These will be used for errata +detection in subsequent patches. + +These values can be found in Table A-186 ("MIDR_EL1 bit descriptions") +in issue 0002-05 of the Cortex-A720 TRM, which can be found at: + + https://developer.arm.com/documentation/102530/0002/?lang=en + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240603111812.1514101-3-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index 72fe207403c83..dcbac1ce6c25c 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -88,6 +88,7 @@ + #define ARM_CPU_PART_CORTEX_A78C 0xD4B + #define ARM_CPU_PART_CORTEX_X3 0xD4E + #define ARM_CPU_PART_NEOVERSE_V2 0xD4F ++#define ARM_CPU_PART_CORTEX_A720 0xD81 + #define ARM_CPU_PART_CORTEX_X4 0xD82 + #define ARM_CPU_PART_NEOVERSE_V3 0xD84 + +@@ -165,6 +166,7 @@ + #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) + #define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3) + #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2) ++#define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720) + #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) + #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) + #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) +-- +2.43.0 + diff --git a/queue-6.10/arm64-cputype-add-cortex-a725-definitions.patch b/queue-6.10/arm64-cputype-add-cortex-a725-definitions.patch new file mode 100644 index 00000000000..9fb7dfc4089 --- /dev/null +++ b/queue-6.10/arm64-cputype-add-cortex-a725-definitions.patch @@ -0,0 +1,54 @@ +From 068a38c14e0f5dda0f61939fc51fd3629e21bd84 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:19 +0100 +Subject: arm64: cputype: Add Cortex-A725 definitions + +From: Mark Rutland + +[ Upstream commit 9ef54a384526911095db465e77acc1cb5266b32c ] + +Add cputype definitions for Cortex-A725. These will be used for errata +detection in subsequent patches. + +These values can be found in the Cortex-A725 TRM: + + https://developer.arm.com/documentation/107652/0001/ + +... in table A-247 ("MIDR_EL1 bit descriptions"). + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Reviewed-by: Anshuman Khandual +Link: https://lore.kernel.org/r/20240801101803.1982459-3-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index 5dc68ace305e5..5fd7caea44193 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -93,6 +93,7 @@ + #define ARM_CPU_PART_CORTEX_X4 0xD82 + #define ARM_CPU_PART_NEOVERSE_V3 0xD84 + #define ARM_CPU_PART_CORTEX_X925 0xD85 ++#define ARM_CPU_PART_CORTEX_A725 0xD87 + + #define APM_CPU_PART_XGENE 0x000 + #define APM_CPU_VAR_POTENZA 0x00 +@@ -173,6 +174,7 @@ + #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) + #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) + #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925) ++#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725) + #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) + #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) + #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) +-- +2.43.0 + diff --git a/queue-6.10/arm64-cputype-add-cortex-x1c-definitions.patch b/queue-6.10/arm64-cputype-add-cortex-x1c-definitions.patch new file mode 100644 index 00000000000..afc229b2389 --- /dev/null +++ b/queue-6.10/arm64-cputype-add-cortex-x1c-definitions.patch @@ -0,0 +1,54 @@ +From 0b1745052dfa2838ea916f9b92a923088e481dd7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:18 +0100 +Subject: arm64: cputype: Add Cortex-X1C definitions + +From: Mark Rutland + +[ Upstream commit 58d245e03c324d083a0ec3b9ab8ebd46ec9848d7 ] + +Add cputype definitions for Cortex-X1C. These will be used for errata +detection in subsequent patches. + +These values can be found in the Cortex-X1C TRM: + + https://developer.arm.com/documentation/101968/0002/ + +... in section B2.107 ("MIDR_EL1, Main ID Register, EL1"). + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Reviewed-by: Anshuman Khandual +Link: https://lore.kernel.org/r/20240801101803.1982459-2-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index 1cb0704c6163f..5dc68ace305e5 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -86,6 +86,7 @@ + #define ARM_CPU_PART_CORTEX_X2 0xD48 + #define ARM_CPU_PART_NEOVERSE_N2 0xD49 + #define ARM_CPU_PART_CORTEX_A78C 0xD4B ++#define ARM_CPU_PART_CORTEX_X1C 0xD4C + #define ARM_CPU_PART_CORTEX_X3 0xD4E + #define ARM_CPU_PART_NEOVERSE_V2 0xD4F + #define ARM_CPU_PART_CORTEX_A720 0xD81 +@@ -165,6 +166,7 @@ + #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) + #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) + #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) ++#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C) + #define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3) + #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2) + #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720) +-- +2.43.0 + diff --git a/queue-6.10/arm64-cputype-add-cortex-x3-definitions.patch b/queue-6.10/arm64-cputype-add-cortex-x3-definitions.patch new file mode 100644 index 00000000000..55b4e3cde43 --- /dev/null +++ b/queue-6.10/arm64-cputype-add-cortex-x3-definitions.patch @@ -0,0 +1,52 @@ +From ef481b0eafbbcf51559e435f0079a9e43793b824 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:13 +0100 +Subject: arm64: cputype: Add Cortex-X3 definitions + +From: Mark Rutland + +[ Upstream commit be5a6f238700f38b534456608588723fba96c5ab ] + +Add cputype definitions for Cortex-X3. These will be used for errata +detection in subsequent patches. + +These values can be found in Table A-263 ("MIDR_EL1 bit descriptions") +in issue 07 of the Cortex-X3 TRM, which can be found at: + + https://developer.arm.com/documentation/101593/0102/?lang=en + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240603111812.1514101-2-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index 7b32b99023a21..72fe207403c83 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -86,6 +86,7 @@ + #define ARM_CPU_PART_CORTEX_X2 0xD48 + #define ARM_CPU_PART_NEOVERSE_N2 0xD49 + #define ARM_CPU_PART_CORTEX_A78C 0xD4B ++#define ARM_CPU_PART_CORTEX_X3 0xD4E + #define ARM_CPU_PART_NEOVERSE_V2 0xD4F + #define ARM_CPU_PART_CORTEX_X4 0xD82 + #define ARM_CPU_PART_NEOVERSE_V3 0xD84 +@@ -162,6 +163,7 @@ + #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) + #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) + #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) ++#define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3) + #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2) + #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) + #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) +-- +2.43.0 + diff --git a/queue-6.10/arm64-cputype-add-cortex-x925-definitions.patch b/queue-6.10/arm64-cputype-add-cortex-x925-definitions.patch new file mode 100644 index 00000000000..b7b4ba0553c --- /dev/null +++ b/queue-6.10/arm64-cputype-add-cortex-x925-definitions.patch @@ -0,0 +1,52 @@ +From c84a6b077b2266ab0b4a5c54cc5c0e7326aaee0f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:15 +0100 +Subject: arm64: cputype: Add Cortex-X925 definitions + +From: Mark Rutland + +[ Upstream commit fd2ff5f0b320f418288e7a1f919f648fbc8a0dfc ] + +Add cputype definitions for Cortex-X925. These will be used for errata +detection in subsequent patches. + +These values can be found in Table A-285 ("MIDR_EL1 bit descriptions") +in issue 0001-05 of the Cortex-X925 TRM, which can be found at: + + https://developer.arm.com/documentation/102807/0001/?lang=en + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240603111812.1514101-4-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cputype.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h +index dcbac1ce6c25c..1cb0704c6163f 100644 +--- a/arch/arm64/include/asm/cputype.h ++++ b/arch/arm64/include/asm/cputype.h +@@ -91,6 +91,7 @@ + #define ARM_CPU_PART_CORTEX_A720 0xD81 + #define ARM_CPU_PART_CORTEX_X4 0xD82 + #define ARM_CPU_PART_NEOVERSE_V3 0xD84 ++#define ARM_CPU_PART_CORTEX_X925 0xD85 + + #define APM_CPU_PART_XGENE 0x000 + #define APM_CPU_VAR_POTENZA 0x00 +@@ -169,6 +170,7 @@ + #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720) + #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) + #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) ++#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925) + #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) + #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) + #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) +-- +2.43.0 + diff --git a/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround-agai.patch b/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround-agai.patch new file mode 100644 index 00000000000..0768a1f1d3c --- /dev/null +++ b/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround-agai.patch @@ -0,0 +1,223 @@ +From 36ab3e54665f2c65c2af8446b1f1e90c518aa34b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:20 +0100 +Subject: arm64: errata: Expand speculative SSBS workaround (again) + +From: Mark Rutland + +[ Upstream commit b0672bbe133ebb6f7be21fce1d742d52f25bcdc7 ] + +A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS +special-purpose register does not affect subsequent speculative +instructions, permitting speculative store bypassing for a window of +time. + +We worked around this for a number of CPUs in commits: + +* 7187bb7d0b5c7dfa ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417") +* 75b3c43eab594bfb ("arm64: errata: Expand speculative SSBS workaround") + +Since then, similar errata have been published for a number of other Arm +Ltd CPUs, for which the same mitigation is sufficient. This is described +in their respective Software Developer Errata Notice (SDEN) documents: + +* Cortex-A76 (MP052) SDEN v31.0, erratum 3324349 + https://developer.arm.com/documentation/SDEN-885749/3100/ + +* Cortex-A77 (MP074) SDEN v19.0, erratum 3324348 + https://developer.arm.com/documentation/SDEN-1152370/1900/ + +* Cortex-A78 (MP102) SDEN v21.0, erratum 3324344 + https://developer.arm.com/documentation/SDEN-1401784/2100/ + +* Cortex-A78C (MP138) SDEN v16.0, erratum 3324346 + https://developer.arm.com/documentation/SDEN-1707916/1600/ + +* Cortex-A78C (MP154) SDEN v10.0, erratum 3324347 + https://developer.arm.com/documentation/SDEN-2004089/1000/ + +* Cortex-A725 (MP190) SDEN v5.0, erratum 3456106 + https://developer.arm.com/documentation/SDEN-2832921/0500/ + +* Cortex-X1 (MP077) SDEN v21.0, erratum 3324344 + https://developer.arm.com/documentation/SDEN-1401782/2100/ + +* Cortex-X1C (MP136) SDEN v16.0, erratum 3324346 + https://developer.arm.com/documentation/SDEN-1707914/1600/ + +* Neoverse-N1 (MP050) SDEN v32.0, erratum 3324349 + https://developer.arm.com/documentation/SDEN-885747/3200/ + +* Neoverse-V1 (MP076) SDEN v19.0, erratum 3324341 + https://developer.arm.com/documentation/SDEN-1401781/1900/ + +Note that due to the manner in which Arm develops IP and tracks errata, +some CPUs share a common erratum number and some CPUs have multiple +erratum numbers for the same HW issue. + +On parts without SB, it is necessary to use ISB for the workaround. The +spec_bar() macro used in the mitigation will expand to a "DSB SY; ISB" +sequence in this case, which is sufficient on all affected parts. + +Enable the existing mitigation by adding the relevant MIDRs to +erratum_spec_ssbs_list. The list is sorted alphanumerically (involving +moving Neoverse-V3 after Neoverse-V2) so that this is easy to audit and +potentially extend again in future. The Kconfig text is also updated to +clarify the set of affected parts and the mitigation. + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Reviewed-by: Anshuman Khandual +Acked-by: Will Deacon +Link: https://lore.kernel.org/r/20240801101803.1982459-4-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + Documentation/arch/arm64/silicon-errata.rst | 18 +++++++++++++++++ + arch/arm64/Kconfig | 22 +++++++++++++++------ + arch/arm64/kernel/cpu_errata.c | 11 ++++++++++- + 3 files changed, 44 insertions(+), 7 deletions(-) + +diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst +index bb83c5d8c6755..50327c05be8d1 100644 +--- a/Documentation/arch/arm64/silicon-errata.rst ++++ b/Documentation/arch/arm64/silicon-errata.rst +@@ -122,10 +122,18 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A76 | #1490853 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A77 | #1491015 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 | +@@ -138,8 +146,14 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X1 | #1502854 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 | +@@ -160,6 +174,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 | +@@ -170,6 +186,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V1 | #1619801 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index f580f5af4a51b..11bbdc15c6e5e 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -1068,18 +1068,28 @@ config ARM64_ERRATUM_3117295 + If unsure, say Y. + + config ARM64_ERRATUM_3194386 +- bool "Cortex-{A720,X4,X925}/Neoverse-V3: workaround for MSR SSBS not self-synchronizing" ++ bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing" + default y + help + This option adds the workaround for the following errata: + ++ * ARM Cortex-A76 erratum 3324349 ++ * ARM Cortex-A77 erratum 3324348 ++ * ARM Cortex-A78 erratum 3324344 ++ * ARM Cortex-A78C erratum 3324346 ++ * ARM Cortex-A78C erratum 3324347 + * ARM Cortex-A710 erratam 3324338 + * ARM Cortex-A720 erratum 3456091 ++ * ARM Cortex-A725 erratum 3456106 ++ * ARM Cortex-X1 erratum 3324344 ++ * ARM Cortex-X1C erratum 3324346 + * ARM Cortex-X2 erratum 3324338 + * ARM Cortex-X3 erratum 3324335 + * ARM Cortex-X4 erratum 3194386 + * ARM Cortex-X925 erratum 3324334 ++ * ARM Neoverse-N1 erratum 3324349 + * ARM Neoverse N2 erratum 3324339 ++ * ARM Neoverse-V1 erratum 3324341 + * ARM Neoverse V2 erratum 3324336 + * ARM Neoverse-V3 erratum 3312417 + +@@ -1087,11 +1097,11 @@ config ARM64_ERRATUM_3194386 + subsequent speculative instructions, which may permit unexepected + speculative store bypassing. + +- Work around this problem by placing a speculation barrier after +- kernel changes to SSBS. The presence of the SSBS special-purpose +- register is hidden from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such +- that userspace will use the PR_SPEC_STORE_BYPASS prctl to change +- SSBS. ++ Work around this problem by placing a Speculation Barrier (SB) or ++ Instruction Synchronization Barrier (ISB) after kernel changes to ++ SSBS. The presence of the SSBS special-purpose register is hidden ++ from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such that userspace ++ will use the PR_SPEC_STORE_BYPASS prctl to change SSBS. + + If unsure, say Y. + +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 617424b73f8c3..f6b6b45073571 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -434,15 +434,24 @@ static const struct midr_range erratum_spec_unpriv_load_list[] = { + + #ifdef CONFIG_ARM64_ERRATUM_3194386 + static const struct midr_range erratum_spec_ssbs_list[] = { ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A725), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), +- MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), + {} + }; + #endif +-- +2.43.0 + diff --git a/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround.patch b/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround.patch new file mode 100644 index 00000000000..f883fbdea0b --- /dev/null +++ b/queue-6.10/arm64-errata-expand-speculative-ssbs-workaround.patch @@ -0,0 +1,177 @@ +From e4d4279ff05a9cf60952702fa507ddc91becb4d2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:17 +0100 +Subject: arm64: errata: Expand speculative SSBS workaround + +From: Mark Rutland + +[ Upstream commit 75b3c43eab594bfbd8184ec8ee1a6b820950819a ] + +A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS +special-purpose register does not affect subsequent speculative +instructions, permitting speculative store bypassing for a window of +time. + +We worked around this for Cortex-X4 and Neoverse-V3, in commit: + + 7187bb7d0b5c7dfa ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417") + +... as per their Software Developer Errata Notice (SDEN) documents: + +* Cortex-X4 SDEN v8.0, erratum 3194386: + https://developer.arm.com/documentation/SDEN-2432808/0800/ + +* Neoverse-V3 SDEN v6.0, erratum 3312417: + https://developer.arm.com/documentation/SDEN-2891958/0600/ + +Since then, similar errata have been published for a number of other Arm Ltd +CPUs, for which the mitigation is the same. This is described in their +respective SDEN documents: + +* Cortex-A710 SDEN v19.0, errataum 3324338 + https://developer.arm.com/documentation/SDEN-1775101/1900/?lang=en + +* Cortex-A720 SDEN v11.0, erratum 3456091 + https://developer.arm.com/documentation/SDEN-2439421/1100/?lang=en + +* Cortex-X2 SDEN v19.0, erratum 3324338 + https://developer.arm.com/documentation/SDEN-1775100/1900/?lang=en + +* Cortex-X3 SDEN v14.0, erratum 3324335 + https://developer.arm.com/documentation/SDEN-2055130/1400/?lang=en + +* Cortex-X925 SDEN v8.0, erratum 3324334 + https://developer.arm.com/documentation/109108/800/?lang=en + +* Neoverse-N2 SDEN v17.0, erratum 3324339 + https://developer.arm.com/documentation/SDEN-1982442/1700/?lang=en + +* Neoverse-V2 SDEN v9.0, erratum 3324336 + https://developer.arm.com/documentation/SDEN-2332927/900/?lang=en + +Note that due to shared design lineage, some CPUs share the same erratum +number. + +Add these to the existing mitigation under CONFIG_ARM64_ERRATUM_3194386. +As listing all of the erratum IDs in the runtime description would be +unwieldy, this is reduced to: + + "SSBS not fully self-synchronizing" + +... matching the description of the errata in all of the SDENs. + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240603111812.1514101-6-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + Documentation/arch/arm64/silicon-errata.rst | 14 ++++++++++++++ + arch/arm64/Kconfig | 9 ++++++++- + arch/arm64/kernel/cpu_errata.c | 9 ++++++++- + 3 files changed, 30 insertions(+), 2 deletions(-) + +diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst +index 59ee2832406c2..bb83c5d8c6755 100644 +--- a/Documentation/arch/arm64/silicon-errata.rst ++++ b/Documentation/arch/arm64/silicon-errata.rst +@@ -132,16 +132,26 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X1 | #1502854 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N1 | #1349291 | N/A | +@@ -156,8 +166,12 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-N2 | #2253138 | ARM64_ERRATUM_2253138 | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V1 | #1619801 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 | +++----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | MMU-500 | #841119,826419 | N/A | +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index fb31ff9151b9d..f580f5af4a51b 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -1068,12 +1068,19 @@ config ARM64_ERRATUM_3117295 + If unsure, say Y. + + config ARM64_ERRATUM_3194386 +- bool "Cortex-X4/Neoverse-V3: workaround for MSR SSBS not self-synchronizing" ++ bool "Cortex-{A720,X4,X925}/Neoverse-V3: workaround for MSR SSBS not self-synchronizing" + default y + help + This option adds the workaround for the following errata: + ++ * ARM Cortex-A710 erratam 3324338 ++ * ARM Cortex-A720 erratum 3456091 ++ * ARM Cortex-X2 erratum 3324338 ++ * ARM Cortex-X3 erratum 3324335 + * ARM Cortex-X4 erratum 3194386 ++ * ARM Cortex-X925 erratum 3324334 ++ * ARM Neoverse N2 erratum 3324339 ++ * ARM Neoverse V2 erratum 3324336 + * ARM Neoverse-V3 erratum 3312417 + + On affected cores "MSR SSBS, #0" instructions may not affect +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 5fbe14dc607f0..617424b73f8c3 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -434,8 +434,15 @@ static const struct midr_range erratum_spec_unpriv_load_list[] = { + + #ifdef CONFIG_ARM64_ERRATUM_3194386 + static const struct midr_range erratum_spec_ssbs_list[] = { ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4), ++ MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), ++ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), + {} + }; + #endif +@@ -739,7 +746,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { + #endif + #ifdef CONFIG_ARM64_ERRATUM_3194386 + { +- .desc = "ARM errata 3194386, 3312417", ++ .desc = "SSBS not fully self-synchronizing", + .capability = ARM64_WORKAROUND_SPECULATIVE_SSBS, + ERRATA_MIDR_RANGE_LIST(erratum_spec_ssbs_list), + }, +-- +2.43.0 + diff --git a/queue-6.10/arm64-errata-unify-speculative-ssbs-errata-logic.patch b/queue-6.10/arm64-errata-unify-speculative-ssbs-errata-logic.patch new file mode 100644 index 00000000000..2c4dc740cbd --- /dev/null +++ b/queue-6.10/arm64-errata-unify-speculative-ssbs-errata-logic.patch @@ -0,0 +1,163 @@ +From c415b4a29224e8b3501119ff27b26013a9389974 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 10:51:16 +0100 +Subject: arm64: errata: Unify speculative SSBS errata logic + +From: Mark Rutland + +[ Upstream commit ec768766608092087dfb5c1fc45a16a6f524dee2 ] + +Cortex-X4 erratum 3194386 and Neoverse-V3 erratum 3312417 are identical, +with duplicate Kconfig text and some unsightly ifdeffery. While we try +to share code behind CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS, having +separate options results in a fair amount of boilerplate code, and this +will only get worse as we expand the set of affected CPUs. + +To reduce this boilerplate, unify the two behind a common Kconfig +option. This removes the duplicate text and Kconfig logic, and removes +the need for the intermediate ARM64_WORKAROUND_SPECULATIVE_SSBS option. +The set of affected CPUs is described as a list so that this can easily +be extended. + +I've used ARM64_ERRATUM_3194386 (matching the Neoverse-V3 erratum ID) as +the common option, matching the way we use ARM64_ERRATUM_1319367 to +cover Cortex-A57 erratum 1319537 and Cortex-A72 erratum 1319367. + +Signed-off-by: Mark Rutland +Cc: James Morse +Cc: Will Deacon +Link: https://lore.kernel.org/r/20240603111812.1514101-5-mark.rutland@arm.com +Signed-off-by: Catalin Marinas +[ Mark: trivial backport ] +Signed-off-by: Mark Rutland +Signed-off-by: Sasha Levin +--- + Documentation/arch/arm64/silicon-errata.rst | 2 +- + arch/arm64/Kconfig | 29 +++------------------ + arch/arm64/include/asm/cpucaps.h | 2 +- + arch/arm64/kernel/cpu_errata.c | 8 ++---- + arch/arm64/kernel/proton-pack.c | 2 +- + 5 files changed, 9 insertions(+), 34 deletions(-) + +diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst +index eb8af8032c315..59ee2832406c2 100644 +--- a/Documentation/arch/arm64/silicon-errata.rst ++++ b/Documentation/arch/arm64/silicon-errata.rst +@@ -158,7 +158,7 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | Neoverse-V1 | #1619801 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ +-| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3312417 | ++| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | MMU-500 | #841119,826419 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 5d91259ee7b53..fb31ff9151b9d 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -1067,34 +1067,14 @@ config ARM64_ERRATUM_3117295 + + If unsure, say Y. + +-config ARM64_WORKAROUND_SPECULATIVE_SSBS +- bool +- + config ARM64_ERRATUM_3194386 +- bool "Cortex-X4: 3194386: workaround for MSR SSBS not self-synchronizing" +- select ARM64_WORKAROUND_SPECULATIVE_SSBS ++ bool "Cortex-X4/Neoverse-V3: workaround for MSR SSBS not self-synchronizing" + default y + help +- This option adds the workaround for ARM Cortex-X4 erratum 3194386. ++ This option adds the workaround for the following errata: + +- On affected cores "MSR SSBS, #0" instructions may not affect +- subsequent speculative instructions, which may permit unexepected +- speculative store bypassing. +- +- Work around this problem by placing a speculation barrier after +- kernel changes to SSBS. The presence of the SSBS special-purpose +- register is hidden from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such +- that userspace will use the PR_SPEC_STORE_BYPASS prctl to change +- SSBS. +- +- If unsure, say Y. +- +-config ARM64_ERRATUM_3312417 +- bool "Neoverse-V3: 3312417: workaround for MSR SSBS not self-synchronizing" +- select ARM64_WORKAROUND_SPECULATIVE_SSBS +- default y +- help +- This option adds the workaround for ARM Neoverse-V3 erratum 3312417. ++ * ARM Cortex-X4 erratum 3194386 ++ * ARM Neoverse-V3 erratum 3312417 + + On affected cores "MSR SSBS, #0" instructions may not affect + subsequent speculative instructions, which may permit unexepected +@@ -1108,7 +1088,6 @@ config ARM64_ERRATUM_3312417 + + If unsure, say Y. + +- + config CAVIUM_ERRATUM_22375 + bool "Cavium erratum 22375, 24313" + default y +diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h +index 7529c02639332..a6e5b07b64fd5 100644 +--- a/arch/arm64/include/asm/cpucaps.h ++++ b/arch/arm64/include/asm/cpucaps.h +@@ -59,7 +59,7 @@ cpucap_is_possible(const unsigned int cap) + case ARM64_WORKAROUND_REPEAT_TLBI: + return IS_ENABLED(CONFIG_ARM64_WORKAROUND_REPEAT_TLBI); + case ARM64_WORKAROUND_SPECULATIVE_SSBS: +- return IS_ENABLED(CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS); ++ return IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386); + } + + return true; +diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c +index 828be635e7e1d..5fbe14dc607f0 100644 +--- a/arch/arm64/kernel/cpu_errata.c ++++ b/arch/arm64/kernel/cpu_errata.c +@@ -432,14 +432,10 @@ static const struct midr_range erratum_spec_unpriv_load_list[] = { + }; + #endif + +-#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS +-static const struct midr_range erratum_spec_ssbs_list[] = { + #ifdef CONFIG_ARM64_ERRATUM_3194386 ++static const struct midr_range erratum_spec_ssbs_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4), +-#endif +-#ifdef CONFIG_ARM64_ERRATUM_3312417 + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), +-#endif + {} + }; + #endif +@@ -741,7 +737,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { + MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)), + }, + #endif +-#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS ++#ifdef CONFIG_ARM64_ERRATUM_3194386 + { + .desc = "ARM errata 3194386, 3312417", + .capability = ARM64_WORKAROUND_SPECULATIVE_SSBS, +diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c +index baca47bd443c8..da53722f95d41 100644 +--- a/arch/arm64/kernel/proton-pack.c ++++ b/arch/arm64/kernel/proton-pack.c +@@ -567,7 +567,7 @@ static enum mitigation_state spectre_v4_enable_hw_mitigation(void) + * Mitigate this with an unconditional speculation barrier, as CPUs + * could mis-speculate branches and bypass a conditional barrier. + */ +- if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS)) ++ if (IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386)) + spec_bar(); + + return SPECTRE_MITIGATED; +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wcd938x-sdw-correct-soundwire-ports-mask.patch b/queue-6.10/asoc-codecs-wcd938x-sdw-correct-soundwire-ports-mask.patch new file mode 100644 index 00000000000..b5f74f3123b --- /dev/null +++ b/queue-6.10/asoc-codecs-wcd938x-sdw-correct-soundwire-ports-mask.patch @@ -0,0 +1,51 @@ +From 7faaf745cd07494a898a81a9cfbf91171065a920 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 16:10:42 +0200 +Subject: ASoC: codecs: wcd938x-sdw: Correct Soundwire ports mask + +From: Krzysztof Kozlowski + +[ Upstream commit 3f6fb03dae9c7dfba7670858d29e03c8faaa89fe ] + +Device has up to WCD938X_MAX_SWR_PORTS number of ports and the array +assigned to prop.src_dpn_prop and prop.sink_dpn_prop has +0..WCD938X_MAX_SWR_PORTS-1 elements. On the other hand, GENMASK(high, +low) creates an inclusive mask between , so we need the mask +from 0 up to WCD938X_MAX_SWR_PORTS-1. + +Theoretically, too wide mask could cause an out of bounds read in +sdw_get_slave_dpn_prop() in stream.c, however only in the case of buggy +driver, e.g. adding incorrect number of ports via +sdw_stream_add_slave(). + +Fixes: 16572522aece ("ASoC: codecs: wcd938x-sdw: add SoundWire driver") +Signed-off-by: Krzysztof Kozlowski +Link: https://patch.msgid.link/20240726-asoc-wcd-wsa-swr-ports-genmask-v1-2-d4d7a8b56f05@linaro.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wcd938x-sdw.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/sound/soc/codecs/wcd938x-sdw.c b/sound/soc/codecs/wcd938x-sdw.c +index a1f04010da95f..132c1d24f8f6e 100644 +--- a/sound/soc/codecs/wcd938x-sdw.c ++++ b/sound/soc/codecs/wcd938x-sdw.c +@@ -1252,12 +1252,12 @@ static int wcd9380_probe(struct sdw_slave *pdev, + pdev->prop.lane_control_support = true; + pdev->prop.simple_clk_stop_capable = true; + if (wcd->is_tx) { +- pdev->prop.source_ports = GENMASK(WCD938X_MAX_SWR_PORTS, 0); ++ pdev->prop.source_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0); + pdev->prop.src_dpn_prop = wcd938x_dpn_prop; + wcd->ch_info = &wcd938x_sdw_tx_ch_info[0]; + pdev->prop.wake_capable = true; + } else { +- pdev->prop.sink_ports = GENMASK(WCD938X_MAX_SWR_PORTS, 0); ++ pdev->prop.sink_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0); + pdev->prop.sink_dpn_prop = wcd938x_dpn_prop; + wcd->ch_info = &wcd938x_sdw_rx_ch_info[0]; + } +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wcd939x-sdw-correct-soundwire-ports-mask.patch b/queue-6.10/asoc-codecs-wcd939x-sdw-correct-soundwire-ports-mask.patch new file mode 100644 index 00000000000..8aa48f8ad52 --- /dev/null +++ b/queue-6.10/asoc-codecs-wcd939x-sdw-correct-soundwire-ports-mask.patch @@ -0,0 +1,51 @@ +From d08c3f6d6898612fa87ef117eda62c9b5de33695 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 16:10:43 +0200 +Subject: ASoC: codecs: wcd939x-sdw: Correct Soundwire ports mask + +From: Krzysztof Kozlowski + +[ Upstream commit 74a79977c4e1d09eced33e6e22f875a5bb3fad29 ] + +Device has up to WCD939X_MAX_TX_SWR_PORTS (or WCD939X_MAX_RX_SWR_PORTS +for sink) number of ports and the array assigned to prop.src_dpn_prop +and prop.sink_dpn_prop has 0..WCD939X_MAX_TX_SWR_PORTS-1 elements. On +the other hand, GENMASK(high, low) creates an inclusive mask between +, so we need the mask from 0 up to WCD939X_MAX_TX_SWR_PORTS-1. + +Theoretically, too wide mask could cause an out of bounds read in +sdw_get_slave_dpn_prop() in stream.c, however only in the case of buggy +driver, e.g. adding incorrect number of ports via +sdw_stream_add_slave(). + +Fixes: be2af391cea0 ("ASoC: codecs: Add WCD939x Soundwire devices driver") +Signed-off-by: Krzysztof Kozlowski +Link: https://patch.msgid.link/20240726-asoc-wcd-wsa-swr-ports-genmask-v1-3-d4d7a8b56f05@linaro.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wcd939x-sdw.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/sound/soc/codecs/wcd939x-sdw.c b/sound/soc/codecs/wcd939x-sdw.c +index 8acb5651c5bca..392f4dcab3e09 100644 +--- a/sound/soc/codecs/wcd939x-sdw.c ++++ b/sound/soc/codecs/wcd939x-sdw.c +@@ -1453,12 +1453,12 @@ static int wcd9390_probe(struct sdw_slave *pdev, const struct sdw_device_id *id) + pdev->prop.lane_control_support = true; + pdev->prop.simple_clk_stop_capable = true; + if (wcd->is_tx) { +- pdev->prop.source_ports = GENMASK(WCD939X_MAX_TX_SWR_PORTS, 0); ++ pdev->prop.source_ports = GENMASK(WCD939X_MAX_TX_SWR_PORTS - 1, 0); + pdev->prop.src_dpn_prop = wcd939x_tx_dpn_prop; + wcd->ch_info = &wcd939x_sdw_tx_ch_info[0]; + pdev->prop.wake_capable = true; + } else { +- pdev->prop.sink_ports = GENMASK(WCD939X_MAX_RX_SWR_PORTS, 0); ++ pdev->prop.sink_ports = GENMASK(WCD939X_MAX_RX_SWR_PORTS - 1, 0); + pdev->prop.sink_dpn_prop = wcd939x_rx_dpn_prop; + wcd->ch_info = &wcd939x_sdw_rx_ch_info[0]; + } +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wsa881x-correct-soundwire-ports-mask.patch b/queue-6.10/asoc-codecs-wsa881x-correct-soundwire-ports-mask.patch new file mode 100644 index 00000000000..5ae1ceae5f1 --- /dev/null +++ b/queue-6.10/asoc-codecs-wsa881x-correct-soundwire-ports-mask.patch @@ -0,0 +1,44 @@ +From aa2e72082a422347d8258e82bfbc6806ce8b08dc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 16:10:44 +0200 +Subject: ASoC: codecs: wsa881x: Correct Soundwire ports mask + +From: Krzysztof Kozlowski + +[ Upstream commit eb11c3bb64ad0a05aeacdb01039863aa2aa3614b ] + +Device has up to WSA881X_MAX_SWR_PORTS number of ports and the array +assigned to prop.sink_dpn_prop has 0..WSA881X_MAX_SWR_PORTS-1 elements. +On the other hand, GENMASK(high, low) creates an inclusive mask between +, so we need the mask from 0 up to WSA881X_MAX_SWR_PORTS-1. + +Theoretically, too wide mask could cause an out of bounds read in +sdw_get_slave_dpn_prop() in stream.c, however only in the case of buggy +driver, e.g. adding incorrect number of ports via +sdw_stream_add_slave(). + +Fixes: a0aab9e1404a ("ASoC: codecs: add wsa881x amplifier support") +Signed-off-by: Krzysztof Kozlowski +Link: https://patch.msgid.link/20240726-asoc-wcd-wsa-swr-ports-genmask-v1-4-d4d7a8b56f05@linaro.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wsa881x.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/wsa881x.c b/sound/soc/codecs/wsa881x.c +index 1253695bebd86..53b828f681020 100644 +--- a/sound/soc/codecs/wsa881x.c ++++ b/sound/soc/codecs/wsa881x.c +@@ -1152,7 +1152,7 @@ static int wsa881x_probe(struct sdw_slave *pdev, + wsa881x->sconfig.frame_rate = 48000; + wsa881x->sconfig.direction = SDW_DATA_DIR_RX; + wsa881x->sconfig.type = SDW_STREAM_PDM; +- pdev->prop.sink_ports = GENMASK(WSA881X_MAX_SWR_PORTS, 0); ++ pdev->prop.sink_ports = GENMASK(WSA881X_MAX_SWR_PORTS - 1, 0); + pdev->prop.sink_dpn_prop = wsa_sink_dpn_prop; + pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; + pdev->prop.clk_stop_mode1 = true; +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wsa883x-correct-soundwire-ports-mask.patch b/queue-6.10/asoc-codecs-wsa883x-correct-soundwire-ports-mask.patch new file mode 100644 index 00000000000..5c858b794c7 --- /dev/null +++ b/queue-6.10/asoc-codecs-wsa883x-correct-soundwire-ports-mask.patch @@ -0,0 +1,44 @@ +From fc813df75dd6b4b2aa33d57b51665f0a3b9969f6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 16:10:45 +0200 +Subject: ASoC: codecs: wsa883x: Correct Soundwire ports mask + +From: Krzysztof Kozlowski + +[ Upstream commit 6801ac36f25690e14955f7f9eace1eaa29edbdd0 ] + +Device has up to WSA883X_MAX_SWR_PORTS number of ports and the array +assigned to prop.sink_dpn_prop has 0..WSA883X_MAX_SWR_PORTS-1 elements. +On the other hand, GENMASK(high, low) creates an inclusive mask between +, so we need the mask from 0 up to WSA883X_MAX_SWR_PORTS-1. + +Theoretically, too wide mask could cause an out of bounds read in +sdw_get_slave_dpn_prop() in stream.c, however only in the case of buggy +driver, e.g. adding incorrect number of ports via +sdw_stream_add_slave(). + +Fixes: 43b8c7dc85a1 ("ASoC: codecs: add wsa883x amplifier support") +Signed-off-by: Krzysztof Kozlowski +Link: https://patch.msgid.link/20240726-asoc-wcd-wsa-swr-ports-genmask-v1-5-d4d7a8b56f05@linaro.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wsa883x.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/wsa883x.c b/sound/soc/codecs/wsa883x.c +index 5443a5c4100c0..2169d93989841 100644 +--- a/sound/soc/codecs/wsa883x.c ++++ b/sound/soc/codecs/wsa883x.c +@@ -1407,7 +1407,7 @@ static int wsa883x_probe(struct sdw_slave *pdev, + WSA883X_MAX_SWR_PORTS)) + dev_dbg(dev, "Static Port mapping not specified\n"); + +- pdev->prop.sink_ports = GENMASK(WSA883X_MAX_SWR_PORTS, 0); ++ pdev->prop.sink_ports = GENMASK(WSA883X_MAX_SWR_PORTS - 1, 0); + pdev->prop.simple_clk_stop_capable = true; + pdev->prop.sink_dpn_prop = wsa_sink_dpn_prop; + pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wsa883x-parse-port-mapping-information.patch b/queue-6.10/asoc-codecs-wsa883x-parse-port-mapping-information.patch new file mode 100644 index 00000000000..7210b6bfbff --- /dev/null +++ b/queue-6.10/asoc-codecs-wsa883x-parse-port-mapping-information.patch @@ -0,0 +1,46 @@ +From f9ab7ca374b1bcfc18bc6d26bc821c4ac8997e41 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jun 2024 15:44:39 +0100 +Subject: ASoC: codecs: wsa883x: parse port-mapping information + +From: Srinivas Kandagatla + +[ Upstream commit 1cf3295bd108abbd7f128071ae9775fd18394ca9 ] + +Add support to parse static master port map information from device tree. + +Reviewed-by: Krzysztof Kozlowski +Tested-by: Krzysztof Kozlowski +Tested-by: Neil Armstrong # on SM8650-HDK +Signed-off-by: Srinivas Kandagatla +Reviewed-by: Dmitry Baryshkov +Link: https://patch.msgid.link/20240626-port-map-v2-2-6cc1c5608cdd@linaro.org +Signed-off-by: Mark Brown +Stable-dep-of: 6801ac36f256 ("ASoC: codecs: wsa883x: Correct Soundwire ports mask") +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wsa883x.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/sound/soc/codecs/wsa883x.c b/sound/soc/codecs/wsa883x.c +index a2e86ef7d18f5..5443a5c4100c0 100644 +--- a/sound/soc/codecs/wsa883x.c ++++ b/sound/soc/codecs/wsa883x.c +@@ -1399,6 +1399,14 @@ static int wsa883x_probe(struct sdw_slave *pdev, + wsa883x->sconfig.direction = SDW_DATA_DIR_RX; + wsa883x->sconfig.type = SDW_STREAM_PDM; + ++ /** ++ * Port map index starts with 0, however the data port for this codec ++ * are from index 1 ++ */ ++ if (of_property_read_u32_array(dev->of_node, "qcom,port-mapping", &pdev->m_port_map[1], ++ WSA883X_MAX_SWR_PORTS)) ++ dev_dbg(dev, "Static Port mapping not specified\n"); ++ + pdev->prop.sink_ports = GENMASK(WSA883X_MAX_SWR_PORTS, 0); + pdev->prop.simple_clk_stop_capable = true; + pdev->prop.sink_dpn_prop = wsa_sink_dpn_prop; +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wsa884x-correct-soundwire-ports-mask.patch b/queue-6.10/asoc-codecs-wsa884x-correct-soundwire-ports-mask.patch new file mode 100644 index 00000000000..4f141d62d2b --- /dev/null +++ b/queue-6.10/asoc-codecs-wsa884x-correct-soundwire-ports-mask.patch @@ -0,0 +1,44 @@ +From d99fb7c2d0f8e8a7631453ad09487951427bcd41 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 16:10:46 +0200 +Subject: ASoC: codecs: wsa884x: Correct Soundwire ports mask + +From: Krzysztof Kozlowski + +[ Upstream commit dcb6631d05152930e2ea70fd2abfd811b0e970b5 ] + +Device has up to WSA884X_MAX_SWR_PORTS number of ports and the array +assigned to prop.sink_dpn_prop has 0..WSA884X_MAX_SWR_PORTS-1 elements. +On the other hand, GENMASK(high, low) creates an inclusive mask between +, so we need the mask from 0 up to WSA884X_MAX_SWR_PORTS-1. + +Theoretically, too wide mask could cause an out of bounds read in +sdw_get_slave_dpn_prop() in stream.c, however only in the case of buggy +driver, e.g. adding incorrect number of ports via +sdw_stream_add_slave(). + +Fixes: aa21a7d4f68a ("ASoC: codecs: wsa884x: Add WSA884x family of speakers") +Signed-off-by: Krzysztof Kozlowski +Link: https://patch.msgid.link/20240726-asoc-wcd-wsa-swr-ports-genmask-v1-6-d4d7a8b56f05@linaro.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wsa884x.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/wsa884x.c b/sound/soc/codecs/wsa884x.c +index a6034547b4f36..de4caf61eef9e 100644 +--- a/sound/soc/codecs/wsa884x.c ++++ b/sound/soc/codecs/wsa884x.c +@@ -1895,7 +1895,7 @@ static int wsa884x_probe(struct sdw_slave *pdev, + WSA884X_MAX_SWR_PORTS)) + dev_dbg(dev, "Static Port mapping not specified\n"); + +- pdev->prop.sink_ports = GENMASK(WSA884X_MAX_SWR_PORTS, 0); ++ pdev->prop.sink_ports = GENMASK(WSA884X_MAX_SWR_PORTS - 1, 0); + pdev->prop.simple_clk_stop_capable = true; + pdev->prop.sink_dpn_prop = wsa884x_sink_dpn_prop; + pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; +-- +2.43.0 + diff --git a/queue-6.10/asoc-codecs-wsa884x-parse-port-mapping-information.patch b/queue-6.10/asoc-codecs-wsa884x-parse-port-mapping-information.patch new file mode 100644 index 00000000000..911cf85b8dd --- /dev/null +++ b/queue-6.10/asoc-codecs-wsa884x-parse-port-mapping-information.patch @@ -0,0 +1,49 @@ +From 292c149219fef75212c89e55c8d6cbaf2ad25ef6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jun 2024 15:44:41 +0100 +Subject: ASoC: codecs: wsa884x: parse port-mapping information + +From: Srinivas Kandagatla + +[ Upstream commit e1bc5c324bcca3acdbe817ccbf9aa7992d89479d ] + +Add support to parse static master port map information from device tree. +This is required for correct port mapping between soundwire device and +master ports. + +Reviewed-by: Krzysztof Kozlowski +Tested-by: Krzysztof Kozlowski +Reviewed-by: Neil Armstrong +Tested-by: Neil Armstrong # on SM8650-HDK +Signed-off-by: Srinivas Kandagatla +Reviewed-by: Dmitry Baryshkov +Link: https://patch.msgid.link/20240626-port-map-v2-4-6cc1c5608cdd@linaro.org +Signed-off-by: Mark Brown +Stable-dep-of: dcb6631d0515 ("ASoC: codecs: wsa884x: Correct Soundwire ports mask") +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/wsa884x.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/sound/soc/codecs/wsa884x.c b/sound/soc/codecs/wsa884x.c +index a9767ef0e39d1..a6034547b4f36 100644 +--- a/sound/soc/codecs/wsa884x.c ++++ b/sound/soc/codecs/wsa884x.c +@@ -1887,6 +1887,14 @@ static int wsa884x_probe(struct sdw_slave *pdev, + wsa884x->sconfig.direction = SDW_DATA_DIR_RX; + wsa884x->sconfig.type = SDW_STREAM_PDM; + ++ /** ++ * Port map index starts with 0, however the data port for this codec ++ * are from index 1 ++ */ ++ if (of_property_read_u32_array(dev->of_node, "qcom,port-mapping", &pdev->m_port_map[1], ++ WSA884X_MAX_SWR_PORTS)) ++ dev_dbg(dev, "Static Port mapping not specified\n"); ++ + pdev->prop.sink_ports = GENMASK(WSA884X_MAX_SWR_PORTS, 0); + pdev->prop.simple_clk_stop_capable = true; + pdev->prop.sink_dpn_prop = wsa884x_sink_dpn_prop; +-- +2.43.0 + diff --git a/queue-6.10/asoc-cs-amp-lib-fix-null-pointer-crash-if-efi.get_va.patch b/queue-6.10/asoc-cs-amp-lib-fix-null-pointer-crash-if-efi.get_va.patch new file mode 100644 index 00000000000..35654164572 --- /dev/null +++ b/queue-6.10/asoc-cs-amp-lib-fix-null-pointer-crash-if-efi.get_va.patch @@ -0,0 +1,37 @@ +From 9b46f9a2e7566384788d3c2ca669e65f97cf6c6d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 5 Aug 2024 12:42:22 +0100 +Subject: ASoC: cs-amp-lib: Fix NULL pointer crash if efi.get_variable is NULL + +From: Richard Fitzgerald + +[ Upstream commit dc268085e499666b9f4f0fcb4c5a94e1c0b193b3 ] + +Call efi_rt_services_supported() to check that efi.get_variable exists +before calling it. + +Signed-off-by: Richard Fitzgerald +Fixes: 1cad8725f2b9 ("ASoC: cs-amp-lib: Add helpers for factory calibration data") +Link: https://patch.msgid.link/20240805114222.15722-1-rf@opensource.cirrus.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/cs-amp-lib.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/cs-amp-lib.c b/sound/soc/codecs/cs-amp-lib.c +index 287ac01a38735..605964af8afad 100644 +--- a/sound/soc/codecs/cs-amp-lib.c ++++ b/sound/soc/codecs/cs-amp-lib.c +@@ -108,7 +108,7 @@ static efi_status_t cs_amp_get_efi_variable(efi_char16_t *name, + + KUNIT_STATIC_STUB_REDIRECT(cs_amp_get_efi_variable, name, guid, size, buf); + +- if (IS_ENABLED(CONFIG_EFI)) ++ if (efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE)) + return efi.get_variable(name, guid, &attr, size, buf); + + return EFI_NOT_FOUND; +-- +2.43.0 + diff --git a/queue-6.10/asoc-cs35l56-handle-otp-read-latency-over-soundwire.patch b/queue-6.10/asoc-cs35l56-handle-otp-read-latency-over-soundwire.patch new file mode 100644 index 00000000000..5e84385bb42 --- /dev/null +++ b/queue-6.10/asoc-cs35l56-handle-otp-read-latency-over-soundwire.patch @@ -0,0 +1,144 @@ +From 415cf39277579e9961f5cf05f4b76f1ba0626302 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 5 Aug 2024 15:08:39 +0100 +Subject: ASoC: cs35l56: Handle OTP read latency over SoundWire + +From: Richard Fitzgerald + +[ Upstream commit e42066df07c0fcedebb32ed56f8bc39b4bf86337 ] + +Use the late-read buffer in the CS35L56 SoundWire interface to +read OTP memory. + +The OTP memory has a longer access latency than chip registers +and cannot guarantee to return the data value in the SoundWire +control response if the bus clock is >4.8 MHz. The Cirrus +SoundWire peripheral IP exposes the bridge-to-bus read buffer +and status bits. For a read from OTP the bridge status bits are +polled to wait for the OTP data to be loaded into the read buffer +and the data is then read from there. + +Signed-off-by: Richard Fitzgerald +Fixes: e1830f66f6c6 ("ASoC: cs35l56: Add helper functions for amp calibration") +Link: https://patch.msgid.link/20240805140839.26042-1-rf@opensource.cirrus.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + include/sound/cs35l56.h | 5 +++ + sound/soc/codecs/cs35l56-sdw.c | 77 ++++++++++++++++++++++++++++++++++ + 2 files changed, 82 insertions(+) + +diff --git a/include/sound/cs35l56.h b/include/sound/cs35l56.h +index b0be189bdc000..347959585deb6 100644 +--- a/include/sound/cs35l56.h ++++ b/include/sound/cs35l56.h +@@ -279,6 +279,11 @@ static inline int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_ba + return 0; + } + ++static inline bool cs35l56_is_otp_register(unsigned int reg) ++{ ++ return (reg >> 16) == 3; ++} ++ + extern struct regmap_config cs35l56_regmap_i2c; + extern struct regmap_config cs35l56_regmap_spi; + extern struct regmap_config cs35l56_regmap_sdw; +diff --git a/sound/soc/codecs/cs35l56-sdw.c b/sound/soc/codecs/cs35l56-sdw.c +index 70ff55c1517fe..29a5476af95ae 100644 +--- a/sound/soc/codecs/cs35l56-sdw.c ++++ b/sound/soc/codecs/cs35l56-sdw.c +@@ -23,6 +23,79 @@ + /* Register addresses are offset when sent over SoundWire */ + #define CS35L56_SDW_ADDR_OFFSET 0x8000 + ++/* Cirrus bus bridge registers */ ++#define CS35L56_SDW_MEM_ACCESS_STATUS 0xd0 ++#define CS35L56_SDW_MEM_READ_DATA 0xd8 ++ ++#define CS35L56_SDW_LAST_LATE BIT(3) ++#define CS35L56_SDW_CMD_IN_PROGRESS BIT(2) ++#define CS35L56_SDW_RDATA_RDY BIT(0) ++ ++#define CS35L56_LATE_READ_POLL_US 10 ++#define CS35L56_LATE_READ_TIMEOUT_US 1000 ++ ++static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral, ++ unsigned int mask, ++ unsigned int match) ++{ ++ int ret, val; ++ ++ ret = read_poll_timeout(sdw_read_no_pm, val, ++ (val < 0) || ((val & mask) == match), ++ CS35L56_LATE_READ_POLL_US, CS35L56_LATE_READ_TIMEOUT_US, ++ false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); ++ if (ret < 0) ++ return ret; ++ ++ if (val < 0) ++ return val; ++ ++ return 0; ++} ++ ++static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg, ++ u8 *buf, size_t val_size) ++{ ++ int ret, i; ++ ++ reg += CS35L56_SDW_ADDR_OFFSET; ++ ++ for (i = 0; i < val_size; i += sizeof(u32)) { ++ /* Poll for bus bridge idle */ ++ ret = cs35l56_sdw_poll_mem_status(peripheral, ++ CS35L56_SDW_CMD_IN_PROGRESS, ++ 0); ++ if (ret < 0) { ++ dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret); ++ return ret; ++ } ++ ++ /* Reading LSByte triggers read of register to holding buffer */ ++ sdw_read_no_pm(peripheral, reg + i); ++ ++ /* Wait for data available */ ++ ret = cs35l56_sdw_poll_mem_status(peripheral, ++ CS35L56_SDW_RDATA_RDY, ++ CS35L56_SDW_RDATA_RDY); ++ if (ret < 0) { ++ dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret); ++ return ret; ++ } ++ ++ /* Read data from buffer */ ++ ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA, ++ sizeof(u32), &buf[i]); ++ if (ret) { ++ dev_err(&peripheral->dev, "Late read @%#x failed: %d\n", reg + i, ret); ++ return ret; ++ } ++ ++ swab32s((u32 *)&buf[i]); ++ } ++ ++ return 0; ++} ++ + static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf) + { + int ret; +@@ -48,6 +121,10 @@ static int cs35l56_sdw_read(void *context, const void *reg_buf, + int ret; + + reg = le32_to_cpu(*(const __le32 *)reg_buf); ++ ++ if (cs35l56_is_otp_register(reg)) ++ return cs35l56_sdw_slow_read(peripheral, reg, buf8, val_size); ++ + reg += CS35L56_SDW_ADDR_OFFSET; + + if (val_size == 4) +-- +2.43.0 + diff --git a/queue-6.10/asoc-cs35l56-revert-support-for-dual-ownership-of-as.patch b/queue-6.10/asoc-cs35l56-revert-support-for-dual-ownership-of-as.patch new file mode 100644 index 00000000000..ffb7bea5120 --- /dev/null +++ b/queue-6.10/asoc-cs35l56-revert-support-for-dual-ownership-of-as.patch @@ -0,0 +1,553 @@ +From 02863e4f43aeeae39857b90d1bec8bfe43f3c4c0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Jul 2024 11:44:42 +0100 +Subject: ASoC: cs35l56: Revert support for dual-ownership of ASP registers + +From: Richard Fitzgerald + +[ Upstream commit 5d7e328e20b3d2bd3e1e8bea7a868ab8892aeed1 ] + +This patch reverts a series of commits that allowed for the ASP +registers to be owned by either the driver or the firmware. Nothing +currently depends on the functionality that is being reverted, so +it is safe to remove. + +The commits being reverted are (last 3 are bugfixes to the first 2): +commit 72a77d7631c6 +("ASoC: cs35l56: Fix to ensure ASP1 registers match cache") +commit 07f7d6e7a124 +("ASoC: cs35l56: Fix for initializing ASP1 mixer registers") +commit 4703b014f28b +("ASoC: cs35l56: fix reversed if statement in cs35l56_dspwait_asp1tx_put()") +commit c14f09f010cc +("ASoC: cs35l56: Fix deadlock in ASP1 mixer register initialization") +commit dfd2ffb37399 +("ASoC: cs35l56: Prevent overwriting firmware ASP config") + +These reverts have been squashed into a single commit because there +would be no reason to revert only some of them (which would just +reintroduce bugs). + +The changes introduced by the commits were well-intentioned but +somewhat misguided. ACPI does not provide any information about how +audio hardware is linked together, so that information has to be +hardcoded into drivers. On Windows the firmware is customized to +statically setup appropriate configuration of the audio links, +and the intent of the commits was to re-use this information if the +Linux host drivers aren't taking control of the ASP. This would +avoid having to hardcode the ASP config into the machine driver on +some systems. + +However, this added complexity and race conditions into the driver. +It also complicates implementation of new code. + +The only case where the ASP is used but the host is not taking +ownership is when CS35L56 is used in SoundWire mode with the ASP +as a reference audio interconnect. But even in that case it's not +necessarily required even if the firmware initialized it. Typically +it is used to avoid the host SDCA drivers having to be capable of +aggregating capture paths from multiple SoundWire peripherals. But +the SOF SoundWire support is capable of doing that aggregation. + +Reverting all these commits significantly simplifies the driver. +Let's just use the normal Linux mechanisms of the machine driver and +ALSA controls to set things up instead of trying to use the firmware +to do use-case setup. + +Signed-off-by: Richard Fitzgerald +Link: https://patch.msgid.link/20240701104444.172556-2-rf@opensource.cirrus.com +Signed-off-by: Mark Brown +Stable-dep-of: e42066df07c0 ("ASoC: cs35l56: Handle OTP read latency over SoundWire") +Signed-off-by: Sasha Levin +--- + include/sound/cs35l56.h | 9 +- + sound/soc/codecs/cs35l56-shared.c | 101 ++++----------- + sound/soc/codecs/cs35l56.c | 205 ++---------------------------- + sound/soc/codecs/cs35l56.h | 1 - + 4 files changed, 43 insertions(+), 273 deletions(-) + +diff --git a/include/sound/cs35l56.h b/include/sound/cs35l56.h +index dc627ebf01df8..b0be189bdc000 100644 +--- a/include/sound/cs35l56.h ++++ b/include/sound/cs35l56.h +@@ -267,13 +267,18 @@ struct cs35l56_base { + bool fw_patched; + bool secured; + bool can_hibernate; +- bool fw_owns_asp1; + bool cal_data_valid; + s8 cal_index; + struct cirrus_amp_cal_data cal_data; + struct gpio_desc *reset_gpio; + }; + ++/* Temporary to avoid a build break with the HDA driver */ ++static inline int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base) ++{ ++ return 0; ++} ++ + extern struct regmap_config cs35l56_regmap_i2c; + extern struct regmap_config cs35l56_regmap_spi; + extern struct regmap_config cs35l56_regmap_sdw; +@@ -284,8 +289,6 @@ extern const char * const cs35l56_tx_input_texts[CS35L56_NUM_INPUT_SRC]; + extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC]; + + int cs35l56_set_patch(struct cs35l56_base *cs35l56_base); +-int cs35l56_init_asp1_regs_for_driver_control(struct cs35l56_base *cs35l56_base); +-int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base); + int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command); + int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base); + int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base); +diff --git a/sound/soc/codecs/cs35l56-shared.c b/sound/soc/codecs/cs35l56-shared.c +index f609cade805d7..6d821a793045e 100644 +--- a/sound/soc/codecs/cs35l56-shared.c ++++ b/sound/soc/codecs/cs35l56-shared.c +@@ -20,6 +20,18 @@ static const struct reg_sequence cs35l56_patch[] = { + * Firmware can change these to non-defaults to satisfy SDCA. + * Ensure that they are at known defaults. + */ ++ { CS35L56_ASP1_ENABLES1, 0x00000000 }, ++ { CS35L56_ASP1_CONTROL1, 0x00000028 }, ++ { CS35L56_ASP1_CONTROL2, 0x18180200 }, ++ { CS35L56_ASP1_CONTROL3, 0x00000002 }, ++ { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 }, ++ { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 }, ++ { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 }, ++ { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 }, ++ { CS35L56_ASP1TX1_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX2_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX3_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX4_INPUT, 0x00000000 }, + { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 }, + { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 }, + { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 }, +@@ -41,12 +53,18 @@ EXPORT_SYMBOL_NS_GPL(cs35l56_set_patch, SND_SOC_CS35L56_SHARED); + static const struct reg_default cs35l56_reg_defaults[] = { + /* no defaults for OTP_MEM - first read populates cache */ + +- /* +- * No defaults for ASP1 control or ASP1TX mixer. See +- * cs35l56_populate_asp1_register_defaults() and +- * cs35l56_sync_asp1_mixer_widgets_with_firmware(). +- */ +- ++ { CS35L56_ASP1_ENABLES1, 0x00000000 }, ++ { CS35L56_ASP1_CONTROL1, 0x00000028 }, ++ { CS35L56_ASP1_CONTROL2, 0x18180200 }, ++ { CS35L56_ASP1_CONTROL3, 0x00000002 }, ++ { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 }, ++ { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 }, ++ { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 }, ++ { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 }, ++ { CS35L56_ASP1TX1_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX2_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX3_INPUT, 0x00000000 }, ++ { CS35L56_ASP1TX4_INPUT, 0x00000000 }, + { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 }, + { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 }, + { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 }, +@@ -206,77 +224,6 @@ static bool cs35l56_volatile_reg(struct device *dev, unsigned int reg) + } + } + +-static const struct reg_sequence cs35l56_asp1_defaults[] = { +- REG_SEQ0(CS35L56_ASP1_ENABLES1, 0x00000000), +- REG_SEQ0(CS35L56_ASP1_CONTROL1, 0x00000028), +- REG_SEQ0(CS35L56_ASP1_CONTROL2, 0x18180200), +- REG_SEQ0(CS35L56_ASP1_CONTROL3, 0x00000002), +- REG_SEQ0(CS35L56_ASP1_FRAME_CONTROL1, 0x03020100), +- REG_SEQ0(CS35L56_ASP1_FRAME_CONTROL5, 0x00020100), +- REG_SEQ0(CS35L56_ASP1_DATA_CONTROL1, 0x00000018), +- REG_SEQ0(CS35L56_ASP1_DATA_CONTROL5, 0x00000018), +- REG_SEQ0(CS35L56_ASP1TX1_INPUT, 0x00000000), +- REG_SEQ0(CS35L56_ASP1TX2_INPUT, 0x00000000), +- REG_SEQ0(CS35L56_ASP1TX3_INPUT, 0x00000000), +- REG_SEQ0(CS35L56_ASP1TX4_INPUT, 0x00000000), +-}; +- +-/* +- * The firmware can have control of the ASP so we don't provide regmap +- * with defaults for these registers, to prevent a regcache_sync() from +- * overwriting the firmware settings. But if the machine driver hooks up +- * the ASP it means the driver is taking control of the ASP, so then the +- * registers are populated with the defaults. +- */ +-int cs35l56_init_asp1_regs_for_driver_control(struct cs35l56_base *cs35l56_base) +-{ +- if (!cs35l56_base->fw_owns_asp1) +- return 0; +- +- cs35l56_base->fw_owns_asp1 = false; +- +- return regmap_multi_reg_write(cs35l56_base->regmap, cs35l56_asp1_defaults, +- ARRAY_SIZE(cs35l56_asp1_defaults)); +-} +-EXPORT_SYMBOL_NS_GPL(cs35l56_init_asp1_regs_for_driver_control, SND_SOC_CS35L56_SHARED); +- +-/* +- * The firmware boot sequence can overwrite the ASP1 config registers so that +- * they don't match regmap's view of their values. Rewrite the values from the +- * regmap cache into the hardware registers. +- */ +-int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base) +-{ +- struct reg_sequence asp1_regs[ARRAY_SIZE(cs35l56_asp1_defaults)]; +- int i, ret; +- +- if (cs35l56_base->fw_owns_asp1) +- return 0; +- +- memcpy(asp1_regs, cs35l56_asp1_defaults, sizeof(asp1_regs)); +- +- /* Read current values from regmap cache into the write sequence */ +- for (i = 0; i < ARRAY_SIZE(asp1_regs); ++i) { +- ret = regmap_read(cs35l56_base->regmap, asp1_regs[i].reg, &asp1_regs[i].def); +- if (ret) +- goto err; +- } +- +- /* Write the values cache-bypassed so that they will be written to silicon */ +- ret = regmap_multi_reg_write_bypassed(cs35l56_base->regmap, asp1_regs, +- ARRAY_SIZE(asp1_regs)); +- if (ret) +- goto err; +- +- return 0; +- +-err: +- dev_err(cs35l56_base->dev, "Failed to sync ASP1 registers: %d\n", ret); +- +- return ret; +-} +-EXPORT_SYMBOL_NS_GPL(cs35l56_force_sync_asp1_registers_from_cache, SND_SOC_CS35L56_SHARED); +- + int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command) + { + unsigned int val; +diff --git a/sound/soc/codecs/cs35l56.c b/sound/soc/codecs/cs35l56.c +index 7f2f2f8c13fae..84c34f5b1a516 100644 +--- a/sound/soc/codecs/cs35l56.c ++++ b/sound/soc/codecs/cs35l56.c +@@ -63,131 +63,6 @@ static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, + return snd_soc_put_volsw(kcontrol, ucontrol); + } + +-static const unsigned short cs35l56_asp1_mixer_regs[] = { +- CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT, +- CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT, +-}; +- +-static const char * const cs35l56_asp1_mux_control_names[] = { +- "ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source" +-}; +- +-static int cs35l56_sync_asp1_mixer_widgets_with_firmware(struct cs35l56_private *cs35l56) +-{ +- struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component); +- const char *prefix = cs35l56->component->name_prefix; +- char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; +- const char *name; +- struct snd_kcontrol *kcontrol; +- struct soc_enum *e; +- unsigned int val[4]; +- int i, item, ret; +- +- if (cs35l56->asp1_mixer_widgets_initialized) +- return 0; +- +- /* +- * Resume so we can read the registers from silicon if the regmap +- * cache has not yet been populated. +- */ +- ret = pm_runtime_resume_and_get(cs35l56->base.dev); +- if (ret < 0) +- return ret; +- +- /* Wait for firmware download and reboot */ +- cs35l56_wait_dsp_ready(cs35l56); +- +- ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, +- val, ARRAY_SIZE(val)); +- +- pm_runtime_mark_last_busy(cs35l56->base.dev); +- pm_runtime_put_autosuspend(cs35l56->base.dev); +- +- if (ret) { +- dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret); +- return ret; +- } +- +- for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) { +- name = cs35l56_asp1_mux_control_names[i]; +- +- if (prefix) { +- snprintf(full_name, sizeof(full_name), "%s %s", prefix, name); +- name = full_name; +- } +- +- kcontrol = snd_soc_card_get_kcontrol_locked(dapm->card, name); +- if (!kcontrol) { +- dev_warn(cs35l56->base.dev, "Could not find control %s\n", name); +- continue; +- } +- +- e = (struct soc_enum *)kcontrol->private_value; +- item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK); +- snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); +- } +- +- cs35l56->asp1_mixer_widgets_initialized = true; +- +- return 0; +-} +- +-static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); +- struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); +- struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- int index = e->shift_l; +- unsigned int addr, val; +- int ret; +- +- ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56); +- if (ret) +- return ret; +- +- addr = cs35l56_asp1_mixer_regs[index]; +- ret = regmap_read(cs35l56->base.regmap, addr, &val); +- if (ret) +- return ret; +- +- val &= CS35L56_ASP_TXn_SRC_MASK; +- ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val); +- +- return 0; +-} +- +-static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); +- struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); +- struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); +- struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- int item = ucontrol->value.enumerated.item[0]; +- int index = e->shift_l; +- unsigned int addr, val; +- bool changed; +- int ret; +- +- ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56); +- if (ret) +- return ret; +- +- addr = cs35l56_asp1_mixer_regs[index]; +- val = snd_soc_enum_item_to_val(e, item); +- +- ret = regmap_update_bits_check(cs35l56->base.regmap, addr, +- CS35L56_ASP_TXn_SRC_MASK, val, &changed); +- if (ret) +- return ret; +- +- if (changed) +- snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL); +- +- return changed; +-} +- + static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0); + + static const struct snd_kcontrol_new cs35l56_controls[] = { +@@ -210,44 +85,40 @@ static const struct snd_kcontrol_new cs35l56_controls[] = { + }; + + static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum, +- SND_SOC_NOPM, +- 0, 0, ++ CS35L56_ASP1TX1_INPUT, ++ 0, CS35L56_ASP_TXn_SRC_MASK, + cs35l56_tx_input_texts, + cs35l56_tx_input_values); + + static const struct snd_kcontrol_new asp1_tx1_mux = +- SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum, +- cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); ++ SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum); + + static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum, +- SND_SOC_NOPM, +- 1, 0, ++ CS35L56_ASP1TX2_INPUT, ++ 0, CS35L56_ASP_TXn_SRC_MASK, + cs35l56_tx_input_texts, + cs35l56_tx_input_values); + + static const struct snd_kcontrol_new asp1_tx2_mux = +- SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum, +- cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); ++ SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum); + + static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum, +- SND_SOC_NOPM, +- 2, 0, ++ CS35L56_ASP1TX3_INPUT, ++ 0, CS35L56_ASP_TXn_SRC_MASK, + cs35l56_tx_input_texts, + cs35l56_tx_input_values); + + static const struct snd_kcontrol_new asp1_tx3_mux = +- SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum, +- cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); ++ SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum); + + static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum, +- SND_SOC_NOPM, +- 3, 0, ++ CS35L56_ASP1TX4_INPUT, ++ 0, CS35L56_ASP_TXn_SRC_MASK, + cs35l56_tx_input_texts, + cs35l56_tx_input_values); + + static const struct snd_kcontrol_new asp1_tx4_mux = +- SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum, +- cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put); ++ SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum); + + static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum, + CS35L56_SWIRE_DP3_CH1_INPUT, +@@ -285,21 +156,6 @@ static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum, + static const struct snd_kcontrol_new sdw1_tx4_mux = + SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum); + +-static int cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget *w, +- struct snd_kcontrol *kcontrol, int event) +-{ +- struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); +- struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component); +- +- switch (event) { +- case SND_SOC_DAPM_PRE_PMU: +- /* Override register values set by firmware boot */ +- return cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base); +- default: +- return 0; +- } +-} +- + static int cs35l56_play_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) + { +@@ -336,9 +192,6 @@ static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { + SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0), + SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0), + +- SND_SOC_DAPM_SUPPLY("ASP1 CFG", SND_SOC_NOPM, 0, 0, cs35l56_asp1_cfg_event, +- SND_SOC_DAPM_PRE_PMU), +- + SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + +@@ -406,9 +259,6 @@ static const struct snd_soc_dapm_route cs35l56_audio_map[] = { + { "AMP", NULL, "VDD_B" }, + { "AMP", NULL, "VDD_AMP" }, + +- { "ASP1 Playback", NULL, "ASP1 CFG" }, +- { "ASP1 Capture", NULL, "ASP1 CFG" }, +- + { "ASP1 Playback", NULL, "PLAY" }, + { "SDW1 Playback", NULL, "PLAY" }, + +@@ -459,14 +309,9 @@ static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int f + { + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component); + unsigned int val; +- int ret; + + dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt); + +- ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base); +- if (ret) +- return ret; +- + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { + case SND_SOC_DAIFMT_CBC_CFC: + break; +@@ -540,11 +385,6 @@ static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx + unsigned int rx_mask, int slots, int slot_width) + { + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); +- int ret; +- +- ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base); +- if (ret) +- return ret; + + if ((slots == 0) || (slot_width == 0)) { + dev_dbg(cs35l56->base.dev, "tdm config cleared\n"); +@@ -593,11 +433,6 @@ static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream, + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); + unsigned int rate = params_rate(params); + u8 asp_width, asp_wl; +- int ret; +- +- ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base); +- if (ret) +- return ret; + + asp_wl = params_width(params); + if (cs35l56->asp_slot_width) +@@ -654,11 +489,7 @@ static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) + { + struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component); +- int freq_id, ret; +- +- ret = cs35l56_init_asp1_regs_for_driver_control(&cs35l56->base); +- if (ret) +- return ret; ++ int freq_id; + + if (freq == 0) { + cs35l56->sysclk_set = false; +@@ -1039,13 +870,6 @@ static int cs35l56_component_probe(struct snd_soc_component *component) + debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate); + debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched); + +- /* +- * The widgets for the ASP1TX mixer can't be initialized +- * until the firmware has been downloaded and rebooted. +- */ +- regcache_drop_region(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX4_INPUT); +- cs35l56->asp1_mixer_widgets_initialized = false; +- + queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work); + + return 0; +@@ -1436,9 +1260,6 @@ int cs35l56_common_probe(struct cs35l56_private *cs35l56) + cs35l56->base.cal_index = -1; + cs35l56->speaker_id = -ENOENT; + +- /* Assume that the firmware owns ASP1 until we know different */ +- cs35l56->base.fw_owns_asp1 = true; +- + dev_set_drvdata(cs35l56->base.dev, cs35l56); + + cs35l56_fill_supply_names(cs35l56->supplies); +diff --git a/sound/soc/codecs/cs35l56.h b/sound/soc/codecs/cs35l56.h +index b000e7365e406..200f695efca3d 100644 +--- a/sound/soc/codecs/cs35l56.h ++++ b/sound/soc/codecs/cs35l56.h +@@ -51,7 +51,6 @@ struct cs35l56_private { + u8 asp_slot_count; + bool tdm_mode; + bool sysclk_set; +- bool asp1_mixer_widgets_initialized; + u8 old_sdw_clock_scale; + }; + +-- +2.43.0 + diff --git a/queue-6.10/asoc-meson-axg-fifo-fix-irq-scheduling-issue-with-pr.patch b/queue-6.10/asoc-meson-axg-fifo-fix-irq-scheduling-issue-with-pr.patch new file mode 100644 index 00000000000..493391105ad --- /dev/null +++ b/queue-6.10/asoc-meson-axg-fifo-fix-irq-scheduling-issue-with-pr.patch @@ -0,0 +1,86 @@ +From 11a327e432cf70e132415ecb2abcab41092fb4e2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 7 Aug 2024 18:27:03 +0200 +Subject: ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT + +From: Jerome Brunet + +[ Upstream commit 5003d0ce5c7da3a02c0aff771f516f99731e7390 ] + +With PREEMPT_RT enabled a spinlock_t becomes a sleeping lock. + +This is usually not a problem with spinlocks used in IRQ context since +IRQ handlers get threaded. However, if IRQF_ONESHOT is set, the primary +handler won't be force-threaded and runs always in hardirq context. This is +a problem because spinlock_t requires a preemptible context on PREEMPT_RT. + +In this particular instance, regmap mmio uses spinlock_t to protect the +register access and IRQF_ONESHOT is set on the IRQ. In this case, it is +actually better to do everything in threaded handler and it solves the +problem with PREEMPT_RT. + +Reported-by: Arseniy Krasnov +Closes: https://lore.kernel.org/linux-amlogic/20240729131652.3012327-1-avkrasnov@salutedevices.com +Suggested-by: Sebastian Andrzej Siewior +Fixes: b11d26660dff ("ASoC: meson: axg-fifo: use threaded irq to check periods") +Signed-off-by: Jerome Brunet +Reviewed-by: Sebastian Andrzej Siewior +Link: https://patch.msgid.link/20240807162705.4024136-1-jbrunet@baylibre.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/meson/axg-fifo.c | 26 ++++++++++---------------- + 1 file changed, 10 insertions(+), 16 deletions(-) + +diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c +index 59abe0b3c59fb..486c56a84552d 100644 +--- a/sound/soc/meson/axg-fifo.c ++++ b/sound/soc/meson/axg-fifo.c +@@ -207,25 +207,18 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id) + status = FIELD_GET(STATUS1_INT_STS, status); + axg_fifo_ack_irq(fifo, status); + +- /* Use the thread to call period elapsed on nonatomic links */ +- if (status & FIFO_INT_COUNT_REPEAT) +- return IRQ_WAKE_THREAD; ++ if (status & ~FIFO_INT_COUNT_REPEAT) ++ dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n", ++ status); + +- dev_dbg(axg_fifo_dev(ss), "unexpected irq - STS 0x%02x\n", +- status); ++ if (status & FIFO_INT_COUNT_REPEAT) { ++ snd_pcm_period_elapsed(ss); ++ return IRQ_HANDLED; ++ } + + return IRQ_NONE; + } + +-static irqreturn_t axg_fifo_pcm_irq_block_thread(int irq, void *dev_id) +-{ +- struct snd_pcm_substream *ss = dev_id; +- +- snd_pcm_period_elapsed(ss); +- +- return IRQ_HANDLED; +-} +- + int axg_fifo_pcm_open(struct snd_soc_component *component, + struct snd_pcm_substream *ss) + { +@@ -251,8 +244,9 @@ int axg_fifo_pcm_open(struct snd_soc_component *component, + if (ret) + return ret; + +- ret = request_threaded_irq(fifo->irq, axg_fifo_pcm_irq_block, +- axg_fifo_pcm_irq_block_thread, ++ /* Use the threaded irq handler only with non-atomic links */ ++ ret = request_threaded_irq(fifo->irq, NULL, ++ axg_fifo_pcm_irq_block, + IRQF_ONESHOT, dev_name(dev), ss); + if (ret) + return ret; +-- +2.43.0 + diff --git a/queue-6.10/asoc-sof-remove-libraries-from-topology-lookups.patch b/queue-6.10/asoc-sof-remove-libraries-from-topology-lookups.patch new file mode 100644 index 00000000000..9c38a39ff5e --- /dev/null +++ b/queue-6.10/asoc-sof-remove-libraries-from-topology-lookups.patch @@ -0,0 +1,42 @@ +From 4fe0da0e6a26ccb5cd6068ea1597ef652cac1fe5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 31 Jul 2024 14:21:44 -0700 +Subject: ASoC: SOF: Remove libraries from topology lookups + +From: Curtis Malainey + +[ Upstream commit 7354eb7f1558466e92e926802d36e69e42938ea9 ] + +Default firmware shipped in open source are not licensed for 3P +libraries, therefore topologies should not reference them. + +If a OS wants to use 3P (that they have licensed) then they should use +the appropriate topology override mechanisms. + +Fixes: 8a7d5d85ed2161 ("ASoC: SOF: mediatek: mt8195: Add devicetree support to select topologies") +Signed-off-by: Curtis Malainey +Cc: Wojciech Macek +Reviewed-by: AngeloGioacchino Del Regno +Link: https://patch.msgid.link/20240731212153.921327-1-cujomalainey@chromium.org +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/sof/mediatek/mt8195/mt8195.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c +index 31dc98d1b1d8b..8d3fc167cd810 100644 +--- a/sound/soc/sof/mediatek/mt8195/mt8195.c ++++ b/sound/soc/sof/mediatek/mt8195/mt8195.c +@@ -573,7 +573,7 @@ static const struct snd_sof_dsp_ops sof_mt8195_ops = { + static struct snd_sof_of_mach sof_mt8195_machs[] = { + { + .compatible = "google,tomato", +- .sof_tplg_filename = "sof-mt8195-mt6359-rt1019-rt5682-dts.tplg" ++ .sof_tplg_filename = "sof-mt8195-mt6359-rt1019-rt5682.tplg" + }, { + .compatible = "mediatek,mt8195", + .sof_tplg_filename = "sof-mt8195.tplg" +-- +2.43.0 + diff --git a/queue-6.10/asoc-sti-add-missing-probe-entry-for-player-and-read.patch b/queue-6.10/asoc-sti-add-missing-probe-entry-for-player-and-read.patch new file mode 100644 index 00000000000..d3a42df3f96 --- /dev/null +++ b/queue-6.10/asoc-sti-add-missing-probe-entry-for-player-and-read.patch @@ -0,0 +1,85 @@ +From b993b7f35c037ff4343a61dab135eac918478998 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 27 Jul 2024 15:40:15 +0200 +Subject: ASoC: sti: add missing probe entry for player and reader + +From: Jerome Audu + +[ Upstream commit 6b99068d5ea0aa295f15f30afc98db74d056ec7b ] + +This patch addresses a regression in the ASoC STI drivers that was +introduced in Linux version 6.6.y. The issue originated from a series of +patches (see https://lore.kernel.org/all/87wmy5b0wt.wl-kuninori.morimoto.gx@renesas.com/) +that unintentionally omitted necessary probe functions for the player +and reader components. + +Probe function in `sound/soc/sti/sti_uniperif.c:415` is being replaced +by another probe function located at `sound/soc/sti/sti_uniperif.c:453`, +which should instead be derived from the player and reader components. +This patch correctly reinserts the missing probe entries, +restoring the intended functionality. + +Fixes: 9f625f5e6cf9 ("ASoC: sti: merge DAI call back functions into ops") +Signed-off-by: Jerome Audu +Link: https://patch.msgid.link/20240727-sti-audio-fix-v2-1-208bde546c3f@free.fr +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/sti/sti_uniperif.c | 2 +- + sound/soc/sti/uniperif.h | 1 + + sound/soc/sti/uniperif_player.c | 1 + + sound/soc/sti/uniperif_reader.c | 1 + + 4 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/sti/sti_uniperif.c b/sound/soc/sti/sti_uniperif.c +index ba824f14a39cf..a7956e5a4ee5d 100644 +--- a/sound/soc/sti/sti_uniperif.c ++++ b/sound/soc/sti/sti_uniperif.c +@@ -352,7 +352,7 @@ static int sti_uniperiph_resume(struct snd_soc_component *component) + return ret; + } + +-static int sti_uniperiph_dai_probe(struct snd_soc_dai *dai) ++int sti_uniperiph_dai_probe(struct snd_soc_dai *dai) + { + struct sti_uniperiph_data *priv = snd_soc_dai_get_drvdata(dai); + struct sti_uniperiph_dai *dai_data = &priv->dai_data; +diff --git a/sound/soc/sti/uniperif.h b/sound/soc/sti/uniperif.h +index 2a5de328501c1..74e51f0ff85c8 100644 +--- a/sound/soc/sti/uniperif.h ++++ b/sound/soc/sti/uniperif.h +@@ -1380,6 +1380,7 @@ int uni_reader_init(struct platform_device *pdev, + struct uniperif *reader); + + /* common */ ++int sti_uniperiph_dai_probe(struct snd_soc_dai *dai); + int sti_uniperiph_dai_set_fmt(struct snd_soc_dai *dai, + unsigned int fmt); + +diff --git a/sound/soc/sti/uniperif_player.c b/sound/soc/sti/uniperif_player.c +index dd9013c476649..6d1ce030963c6 100644 +--- a/sound/soc/sti/uniperif_player.c ++++ b/sound/soc/sti/uniperif_player.c +@@ -1038,6 +1038,7 @@ static const struct snd_soc_dai_ops uni_player_dai_ops = { + .startup = uni_player_startup, + .shutdown = uni_player_shutdown, + .prepare = uni_player_prepare, ++ .probe = sti_uniperiph_dai_probe, + .trigger = uni_player_trigger, + .hw_params = sti_uniperiph_dai_hw_params, + .set_fmt = sti_uniperiph_dai_set_fmt, +diff --git a/sound/soc/sti/uniperif_reader.c b/sound/soc/sti/uniperif_reader.c +index 065c5f0d1f5f0..05ea2b794eb92 100644 +--- a/sound/soc/sti/uniperif_reader.c ++++ b/sound/soc/sti/uniperif_reader.c +@@ -401,6 +401,7 @@ static const struct snd_soc_dai_ops uni_reader_dai_ops = { + .startup = uni_reader_startup, + .shutdown = uni_reader_shutdown, + .prepare = uni_reader_prepare, ++ .probe = sti_uniperiph_dai_probe, + .trigger = uni_reader_trigger, + .hw_params = sti_uniperiph_dai_hw_params, + .set_fmt = sti_uniperiph_dai_set_fmt, +-- +2.43.0 + diff --git a/queue-6.10/bpf-kprobe-remove-unused-declaring-of-bpf_kprobe_ove.patch b/queue-6.10/bpf-kprobe-remove-unused-declaring-of-bpf_kprobe_ove.patch new file mode 100644 index 00000000000..e8ecc8b1126 --- /dev/null +++ b/queue-6.10/bpf-kprobe-remove-unused-declaring-of-bpf_kprobe_ove.patch @@ -0,0 +1,39 @@ +From 9bbc1bf56760deaba26fe34d53be8cfc30143642 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 5 Aug 2024 14:01:21 +0900 +Subject: bpf: kprobe: remove unused declaring of bpf_kprobe_override + +From: Menglong Dong + +[ Upstream commit 0e8b53979ac86eddb3fd76264025a70071a25574 ] + +After the commit 66665ad2f102 ("tracing/kprobe: bpf: Compare instruction +pointer with original one"), "bpf_kprobe_override" is not used anywhere +anymore, and we can remove it now. + +Link: https://lore.kernel.org/all/20240710085939.11520-1-dongml2@chinatelecom.cn/ + +Fixes: 66665ad2f102 ("tracing/kprobe: bpf: Compare instruction pointer with original one") +Signed-off-by: Menglong Dong +Acked-by: Jiri Olsa +Signed-off-by: Masami Hiramatsu (Google) +Signed-off-by: Sasha Levin +--- + include/linux/trace_events.h | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/include/linux/trace_events.h b/include/linux/trace_events.h +index 9df3e2973626b..9435185c10ef7 100644 +--- a/include/linux/trace_events.h ++++ b/include/linux/trace_events.h +@@ -880,7 +880,6 @@ do { \ + struct perf_event; + + DECLARE_PER_CPU(struct pt_regs, perf_trace_regs); +-DECLARE_PER_CPU(int, bpf_kprobe_override); + + extern int perf_trace_init(struct perf_event *event); + extern void perf_trace_destroy(struct perf_event *event); +-- +2.43.0 + diff --git a/queue-6.10/cifs-cifs_inval_name_dfs_link_error-correct-the-chec.patch b/queue-6.10/cifs-cifs_inval_name_dfs_link_error-correct-the-chec.patch new file mode 100644 index 00000000000..4969f1fb4ef --- /dev/null +++ b/queue-6.10/cifs-cifs_inval_name_dfs_link_error-correct-the-chec.patch @@ -0,0 +1,60 @@ +From 43104f58262c84ef87740dfe2fa79693ac370afd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 8 Aug 2024 18:47:48 +0300 +Subject: cifs: cifs_inval_name_dfs_link_error: correct the check for fullpath + +From: Gleb Korobeynikov + +[ Upstream commit 36bb22a08a69d9984a8399c07310d18b115eae20 ] + +Replace the always-true check tcon->origin_fullpath with +check of server->leaf_fullpath + +See https://bugzilla.kernel.org/show_bug.cgi?id=219083 + +The check of the new @tcon will always be true during mounting, +since @tcon->origin_fullpath will only be set after the tree is +connected to the latest common resource, as well as checking if +the prefix paths from it are fully accessible. + +Fixes: 3ae872de4107 ("smb: client: fix shared DFS root mounts with different prefixes") +Reviewed-by: Paulo Alcantara (Red Hat) +Signed-off-by: Gleb Korobeynikov +Signed-off-by: Steve French +Signed-off-by: Sasha Levin +--- + fs/smb/client/misc.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/fs/smb/client/misc.c b/fs/smb/client/misc.c +index 07c468ddb88a8..65d4b72b4d51a 100644 +--- a/fs/smb/client/misc.c ++++ b/fs/smb/client/misc.c +@@ -1288,6 +1288,7 @@ int cifs_inval_name_dfs_link_error(const unsigned int xid, + const char *full_path, + bool *islink) + { ++ struct TCP_Server_Info *server = tcon->ses->server; + struct cifs_ses *ses = tcon->ses; + size_t len; + char *path; +@@ -1304,12 +1305,12 @@ int cifs_inval_name_dfs_link_error(const unsigned int xid, + !is_tcon_dfs(tcon)) + return 0; + +- spin_lock(&tcon->tc_lock); +- if (!tcon->origin_fullpath) { +- spin_unlock(&tcon->tc_lock); ++ spin_lock(&server->srv_lock); ++ if (!server->leaf_fullpath) { ++ spin_unlock(&server->srv_lock); + return 0; + } +- spin_unlock(&tcon->tc_lock); ++ spin_unlock(&server->srv_lock); + + /* + * Slow path - tcon is DFS and @full_path has prefix path, so attempt +-- +2.43.0 + diff --git a/queue-6.10/drm-amd-display-replace-dm_execute_dmub_cmd-with-dc_.patch b/queue-6.10/drm-amd-display-replace-dm_execute_dmub_cmd-with-dc_.patch new file mode 100644 index 00000000000..ab2812572c4 --- /dev/null +++ b/queue-6.10/drm-amd-display-replace-dm_execute_dmub_cmd-with-dc_.patch @@ -0,0 +1,45 @@ +From 1b33f449f818f73051e0168759b898de4b456b50 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Dec 2023 16:35:04 -0500 +Subject: drm/amd/display: Replace dm_execute_dmub_cmd with + dc_wake_and_execute_dmub_cmd + +From: Rodrigo Siqueira + +[ Upstream commit f2aaed194a54d78c307c44d1829c7e1ba67e9ba5 ] + +In the commit c2cec7a872b6 ("drm/amd/display: Wake DMCUB before sending +a command for replay feature"), replaced dm_execute_dmub_cmd with +dc_wake_and_execute_dmub_cmd in multiple areas, but due to merge issues +the replacement of this function in the dmub_replay_copy_settings was +missed. This commit replaces the old dm_execute_dmub_cmd with +dc_wake_and_execute_dmub_cmd. + +Fixes: 3601a35a2e9d ("drm/amd/display: Wake DMCUB before sending a command for replay feature") +Reviewed-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +(cherry picked from commit 6cc213b9aa34bc3213e20f9256345c5cc1495b0b) +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c +index f820647443d16..09cf54586fd5d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c +@@ -209,8 +209,7 @@ static bool dmub_replay_copy_settings(struct dmub_replay *dmub, + else + copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 0; + +- +- dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); ++ dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + + return true; + } +-- +2.43.0 + diff --git a/queue-6.10/drm-atomic-allow-no-op-fb_id-updates-for-async-flips.patch b/queue-6.10/drm-atomic-allow-no-op-fb_id-updates-for-async-flips.patch new file mode 100644 index 00000000000..7cf01c6bf75 --- /dev/null +++ b/queue-6.10/drm-atomic-allow-no-op-fb_id-updates-for-async-flips.patch @@ -0,0 +1,68 @@ +From 7d6df58868f2725775246b3ae2a4a7f0455ac28f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 31 Jul 2024 19:10:20 +0000 +Subject: drm/atomic: allow no-op FB_ID updates for async flips +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Simon Ser + +[ Upstream commit 929725bd7eb4eea1f75197d9847f3f1ea5afdad1 ] + +User-space is allowed to submit any property in an async flip as +long as the value doesn't change. However we missed one case: +as things stand, the kernel rejects no-op FB_ID changes on +non-primary planes. Fix this by changing the conditional and +skipping drm_atomic_check_prop_changes() only for FB_ID on the +primary plane (instead of skipping for FB_ID on any plane). + +Fixes: 0e26cc72c71c ("drm: Refuse to async flip with atomic prop changes") +Signed-off-by: Simon Ser +Reviewed-by: André Almeida +Tested-by: Xaver Hugl +Cc: Alex Deucher +Cc: Christian König +Cc: Michel Dänzer +Cc: Ville Syrjälä +Link: https://patchwork.freedesktop.org/patch/msgid/20240731191014.878320-1-contact@emersion.fr +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/drm_atomic_uapi.c | 15 ++++----------- + 1 file changed, 4 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c +index 02b1235c6d619..106292d6ed268 100644 +--- a/drivers/gpu/drm/drm_atomic_uapi.c ++++ b/drivers/gpu/drm/drm_atomic_uapi.c +@@ -1067,23 +1067,16 @@ int drm_atomic_set_property(struct drm_atomic_state *state, + } + + if (async_flip && +- prop != config->prop_fb_id && +- prop != config->prop_in_fence_fd && +- prop != config->prop_fb_damage_clips) { ++ (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY || ++ (prop != config->prop_fb_id && ++ prop != config->prop_in_fence_fd && ++ prop != config->prop_fb_damage_clips))) { + ret = drm_atomic_plane_get_property(plane, plane_state, + prop, &old_val); + ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); + break; + } + +- if (async_flip && plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY) { +- drm_dbg_atomic(prop->dev, +- "[OBJECT:%d] Only primary planes can be changed during async flip\n", +- obj->id); +- ret = -EINVAL; +- break; +- } +- + ret = drm_atomic_plane_set_property(plane, + plane_state, file_priv, + prop, prop_value); +-- +2.43.0 + diff --git a/queue-6.10/drm-i915-allow-evicting-to-use-the-requested-placeme.patch b/queue-6.10/drm-i915-allow-evicting-to-use-the-requested-placeme.patch new file mode 100644 index 00000000000..aa995138ed0 --- /dev/null +++ b/queue-6.10/drm-i915-allow-evicting-to-use-the-requested-placeme.patch @@ -0,0 +1,62 @@ +From b4501ccf30b695453de5629865b64a93c77c0bbd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 4 Aug 2024 17:18:47 +0800 +Subject: drm/i915: Allow evicting to use the requested placement + +From: David Gow + +[ Upstream commit 264b5b5980061d8c6a6a30c031cdec1179fe2bae ] + +In commit a78a8da51b36 ("drm/ttm: replace busy placement with flags v6"), +the old system of having a separate placement list (for placements +which should be used without eviction) and a 'busy' placement list (for +placements which should be attempted if eviction is required) was +replaced with a new one where placements could be marked 'FALLBACK' (to +be attempted if eviction is required) or 'DESIRED' (to be attempted +first, but not if eviction is required). + +i915 had always included the requested placement in the list of +'busy' placements: i.e., the placement could be used either if eviction +is required or not. But when the new system was put in place, the +requested (first) placement was marked 'DESIRED', so would never be used +if eviction became necessary. While a bug in the original commit +prevented this flag from working, when this was fixed in +4a0e7b3c ("drm/i915: fix applying placement flag"), it caused long hangs +on DG2 systems with small BAR. + +Don't mark the requested placement DESIRED (or FALLBACK), allowing it to +be used in both situations. This matches the old behaviour, and resolves +the hangs. + +Thanks to Justin Brewer for bisecting the issue. + +Fixes: a78a8da51b36 ("drm/ttm: replace busy placement with flags v6") +Fixes: 4a0e7b3c3753 ("drm/i915: fix applying placement flag") +Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11255 +Signed-off-by: David Gow +Reviewed-by: Jonathan Cavitt +Reviewed-by: Andi Shyti +Signed-off-by: Andi Shyti +Link: https://patchwork.freedesktop.org/patch/msgid/20240804091851.122186-2-david@davidgow.net +(cherry picked from commit 54bf0af90844fbf18f5be3272eda69198dfdb622) +Signed-off-by: Joonas Lahtinen +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +index e6f177183c0fa..fb848fd8ba15a 100644 +--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c ++++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +@@ -165,7 +165,6 @@ i915_ttm_placement_from_obj(const struct drm_i915_gem_object *obj, + i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] : + obj->mm.region, &places[0], obj->bo_offset, + obj->base.size, flags); +- places[0].flags |= TTM_PL_FLAG_DESIRED; + + /* Cache this on object? */ + for (i = 0; i < num_allowed; ++i) { +-- +2.43.0 + diff --git a/queue-6.10/drm-i915-attempt-to-get-pages-without-eviction-first.patch b/queue-6.10/drm-i915-attempt-to-get-pages-without-eviction-first.patch new file mode 100644 index 00000000000..5c0bd41ca39 --- /dev/null +++ b/queue-6.10/drm-i915-attempt-to-get-pages-without-eviction-first.patch @@ -0,0 +1,79 @@ +From b4b9833f20a14942b9566e5e1730a8567c9938db Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 4 Aug 2024 17:18:48 +0800 +Subject: drm/i915: Attempt to get pages without eviction first + +From: David Gow + +[ Upstream commit 787db3bb6ed5cee56fc97fecdd61517d89763f0a ] + +In commit a78a8da51b36 ("drm/ttm: replace busy placement with flags v6"), +__i915_ttm_get_pages was updated to use flags instead of the separate +'busy' placement list. However, the behaviour was subtly changed. +Originally, the function would attempt to use the preferred placement +without eviction, and give an opportunity to restart the operation +before falling back to allowing eviction. + +This was unintentionally changed, as the preferred placement was not +given the TTM_PL_FLAG_DESIRED flag, and so eviction could be triggered +in that first pass. This caused thrashing, and a significant performance +regression on DG2 systems with small BAR. For example, Minecraft and +Team Fortress 2 would drop to single-digit framerates. + +Restore the original behaviour by marking the initial placement as +desired on that first attempt. Also, rework this to use a separate +struct ttm_palcement, as the individual placements are marked 'const', +so hot-patching the flags is even more dodgy than before. + +Thanks to Justin Brewer for bisecting this. + +Fixes: a78a8da51b36 ("drm/ttm: replace busy placement with flags v6") +Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11255 +Signed-off-by: David Gow +Reviewed-by: Jonathan Cavitt +Reviewed-by: Andi Shyti +Signed-off-by: Andi Shyti +Link: https://patchwork.freedesktop.org/patch/msgid/20240804091851.122186-3-david@davidgow.net +(cherry picked from commit 92653f2a572505adaf7f13f695c1907e71a1dc84) +Signed-off-by: Joonas Lahtinen +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +index fb848fd8ba15a..5c72462d1f57e 100644 +--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c ++++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +@@ -778,13 +778,16 @@ static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, + .interruptible = true, + .no_wait_gpu = false, + }; +- int real_num_busy; ++ struct ttm_placement initial_placement; ++ struct ttm_place initial_place; + int ret; + + /* First try only the requested placement. No eviction. */ +- real_num_busy = placement->num_placement; +- placement->num_placement = 1; +- ret = ttm_bo_validate(bo, placement, &ctx); ++ initial_placement.num_placement = 1; ++ memcpy(&initial_place, placement->placement, sizeof(struct ttm_place)); ++ initial_place.flags |= TTM_PL_FLAG_DESIRED; ++ initial_placement.placement = &initial_place; ++ ret = ttm_bo_validate(bo, &initial_placement, &ctx); + if (ret) { + ret = i915_ttm_err_to_gem(ret); + /* +@@ -799,7 +802,6 @@ static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, + * If the initial attempt fails, allow all accepted placements, + * evicting if necessary. + */ +- placement->num_placement = real_num_busy; + ret = ttm_bo_validate(bo, placement, &ctx); + if (ret) + return i915_ttm_err_to_gem(ret); +-- +2.43.0 + diff --git a/queue-6.10/drm-xe-hwmon-fix-pl1-disable-flow-in-xe_hwmon_power_.patch b/queue-6.10/drm-xe-hwmon-fix-pl1-disable-flow-in-xe_hwmon_power_.patch new file mode 100644 index 00000000000..7c10901b87d --- /dev/null +++ b/queue-6.10/drm-xe-hwmon-fix-pl1-disable-flow-in-xe_hwmon_power_.patch @@ -0,0 +1,46 @@ +From 66fa6ff76e5dd86b1b7152f51c7dd535c36867e7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 1 Aug 2024 16:54:24 +0530 +Subject: drm/xe/hwmon: Fix PL1 disable flow in xe_hwmon_power_max_write + +From: Karthik Poosa + +[ Upstream commit ac3191c5cf47e2d5220a1ed7353a2e498a1f415e ] + +In xe_hwmon_power_max_write, for PL1 disable supported case, instead of +returning after PL1 disable, PL1 enable path was also being run. +Fixed it by returning after disable. + +v2: Correct typo and grammar in commit message. (Jonathan) + +Signed-off-by: Karthik Poosa +Fixes: fef6dd12b45a ("drm/xe/hwmon: Protect hwmon rw attributes with hwmon_lock") +Reviewed-by: Jonathan Cavitt +Signed-off-by: Matt Roper +Link: https://patchwork.freedesktop.org/patch/msgid/20240801112424.1841766-1-karthik.poosa@intel.com +(cherry picked from commit 146458645e505f5eac498759bcd865cf7c0dfd9a) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_hwmon.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c +index 453e601ddd5e6..d37f1dea9f8b8 100644 +--- a/drivers/gpu/drm/xe/xe_hwmon.c ++++ b/drivers/gpu/drm/xe/xe_hwmon.c +@@ -200,9 +200,10 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, int channel, long va + PKG_PWR_LIM_1_EN, 0, channel); + + if (reg_val & PKG_PWR_LIM_1_EN) { ++ drm_warn(>_to_xe(hwmon->gt)->drm, "PL1 disable is not supported!\n"); + ret = -EOPNOTSUPP; +- goto unlock; + } ++ goto unlock; + } + + /* Computation in 64-bits to avoid overflow. Round to nearest. */ +-- +2.43.0 + diff --git a/queue-6.10/drm-xe-minor-cleanup-in-lrc-handling.patch b/queue-6.10/drm-xe-minor-cleanup-in-lrc-handling.patch new file mode 100644 index 00000000000..0cd1095f119 --- /dev/null +++ b/queue-6.10/drm-xe-minor-cleanup-in-lrc-handling.patch @@ -0,0 +1,65 @@ +From fa0165cae7247e760041f22842032f483271d9f2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 May 2024 15:42:50 -0700 +Subject: drm/xe: Minor cleanup in LRC handling + +From: Niranjana Vishwanathapura + +[ Upstream commit 85cfc412579c041f1aaebba71427acec75ceca39 ] + +Properly define register fields and remove redundant +lower_32_bits(). + +Signed-off-by: Niranjana Vishwanathapura +Reviewed-by: Himal Prasad Ghimiray +Reviewed-by: Stuart Summers +Reviewed-by: Matt Roper +Signed-off-by: Matt Roper +Link: https://patchwork.freedesktop.org/patch/msgid/20240507224255.5059-2-niranjana.vishwanathapura@intel.com +Stable-dep-of: 642dfc9d5964 ("drm/xe: Take ref to VM in delayed snapshot") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/regs/xe_engine_regs.h | 4 ++-- + drivers/gpu/drm/xe/xe_lrc.c | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h +index af71b87d80301..03c6d4d50a839 100644 +--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h ++++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h +@@ -44,9 +44,10 @@ + #define GSCCS_RING_BASE 0x11a000 + + #define RING_TAIL(base) XE_REG((base) + 0x30) ++#define TAIL_ADDR REG_GENMASK(20, 3) + + #define RING_HEAD(base) XE_REG((base) + 0x34) +-#define HEAD_ADDR 0x001FFFFC ++#define HEAD_ADDR REG_GENMASK(20, 2) + + #define RING_START(base) XE_REG((base) + 0x38) + +@@ -135,7 +136,6 @@ + #define RING_VALID_MASK 0x00000001 + #define RING_VALID 0x00000001 + #define STOP_RING REG_BIT(8) +-#define TAIL_ADDR 0x001FFFF8 + + #define RING_CTX_TIMESTAMP(base) XE_REG((base) + 0x3a8) + #define CSBE_DEBUG_STATUS(base) XE_REG((base) + 0x3fc) +diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c +index 615bbc372ac62..760f38992ff07 100644 +--- a/drivers/gpu/drm/xe/xe_lrc.c ++++ b/drivers/gpu/drm/xe/xe_lrc.c +@@ -1354,7 +1354,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) + if (!snapshot) + return NULL; + +- snapshot->context_desc = lower_32_bits(xe_lrc_ggtt_addr(lrc)); ++ snapshot->context_desc = xe_lrc_ggtt_addr(lrc); + snapshot->head = xe_lrc_ring_head(lrc); + snapshot->tail.internal = lrc->ring.tail; + snapshot->tail.memory = xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL); +-- +2.43.0 + diff --git a/queue-6.10/drm-xe-rtp-fix-off-by-one-when-processing-rules.patch b/queue-6.10/drm-xe-rtp-fix-off-by-one-when-processing-rules.patch new file mode 100644 index 00000000000..b1df33e2a8a --- /dev/null +++ b/queue-6.10/drm-xe-rtp-fix-off-by-one-when-processing-rules.patch @@ -0,0 +1,59 @@ +From f3463c12b7f0333cca7f5b667dbf2bcbeb631d8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 25 Jul 2024 23:43:35 -0700 +Subject: drm/xe/rtp: Fix off-by-one when processing rules + +From: Lucas De Marchi + +[ Upstream commit ae02c7b7fea3e034fbd724c21d88406f71ccc2f8 ] + +Gustavo noticed an odd "+ 2" in rtp_mark_active() while processing +rtp rules and pointed that it should be "+ 1". In fact, while processing +entries without actions (OOB workarounds), if the WA is activated and +has OR rules, it will also inadvertently activate the very next +workaround. + +Test in a LNL B0 platform by moving 18024947630 on top of 16020292621, +makes the latter become active: + + $ cat /sys/kernel/debug/dri/0/gt0/workarounds + ... + OOB Workarounds + 18024947630 + 16020292621 + 14018094691 + 16022287689 + 13011645652 + 22019338487_display + +In future a kunit test will be added to cover the rtp checks for entries +without actions. + +Fixes: fe19328b900c ("drm/xe/rtp: Add support for entries with no action") +Cc: Gustavo Sousa +Reviewed-by: Gustavo Sousa +Link: https://patchwork.freedesktop.org/patch/msgid/20240726064337.797576-6-lucas.demarchi@intel.com +Signed-off-by: Lucas De Marchi +(cherry picked from commit fd6797ec50c561f085bc94e3ee26f484a52af79e) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_rtp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c +index fb44cc7521d8c..10326bd1bfa3b 100644 +--- a/drivers/gpu/drm/xe/xe_rtp.c ++++ b/drivers/gpu/drm/xe/xe_rtp.c +@@ -200,7 +200,7 @@ static void rtp_mark_active(struct xe_device *xe, + if (first == last) + bitmap_set(ctx->active_entries, first, 1); + else +- bitmap_set(ctx->active_entries, first, last - first + 2); ++ bitmap_set(ctx->active_entries, first, last - first + 1); + } + + /** +-- +2.43.0 + diff --git a/queue-6.10/drm-xe-take-ref-to-vm-in-delayed-snapshot.patch b/queue-6.10/drm-xe-take-ref-to-vm-in-delayed-snapshot.patch new file mode 100644 index 00000000000..57fbe44e445 --- /dev/null +++ b/queue-6.10/drm-xe-take-ref-to-vm-in-delayed-snapshot.patch @@ -0,0 +1,87 @@ +From b84a5c8155ba43c660f5e4f9fbdcf3cf8054b3fc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 1 Aug 2024 08:41:16 -0700 +Subject: drm/xe: Take ref to VM in delayed snapshot + +From: Matthew Brost + +[ Upstream commit 642dfc9d5964b26f66fa6c28ce2861e11f9232aa ] + +Kernel BO's don't take a ref to the VM, we need the VM for the +delayed snapshot, so take a ref to the VM in delayed snapshot. + +v2: + - Check for lrc_bo before taking a VM ref (CI) + - Check lrc_bo->vm before taking / dropping a VM ref (CI) + - Drop VM in xe_lrc_snapshot_free +v5: + - Fix commit message wording (Johnathan) + +Fixes: 47058633d9c5 ("drm/xe: Move lrc snapshot capturing to xe_lrc.c") +Cc: Maarten Lankhorst +Signed-off-by: Matthew Brost +Reviewed-by: Jonathan Cavitt +Link: https://patchwork.freedesktop.org/patch/msgid/20240801154118.2547543-2-matthew.brost@intel.com +(cherry picked from commit c3bc97d2f102ddd5a8341eeb2dbae2a3e98bb46a) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_lrc.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c +index 760f38992ff07..d7bf7bc9dc145 100644 +--- a/drivers/gpu/drm/xe/xe_lrc.c ++++ b/drivers/gpu/drm/xe/xe_lrc.c +@@ -1354,6 +1354,9 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) + if (!snapshot) + return NULL; + ++ if (lrc->bo && lrc->bo->vm) ++ xe_vm_get(lrc->bo->vm); ++ + snapshot->context_desc = xe_lrc_ggtt_addr(lrc); + snapshot->head = xe_lrc_ring_head(lrc); + snapshot->tail.internal = lrc->ring.tail; +@@ -1370,12 +1373,14 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) + void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot) + { + struct xe_bo *bo; ++ struct xe_vm *vm; + struct iosys_map src; + + if (!snapshot) + return; + + bo = snapshot->lrc_bo; ++ vm = bo->vm; + snapshot->lrc_bo = NULL; + + snapshot->lrc_snapshot = kvmalloc(snapshot->lrc_size, GFP_KERNEL); +@@ -1395,6 +1400,8 @@ void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot) + dma_resv_unlock(bo->ttm.base.resv); + put_bo: + xe_bo_put(bo); ++ if (vm) ++ xe_vm_put(vm); + } + + void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer *p) +@@ -1440,7 +1447,13 @@ void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot) + return; + + kvfree(snapshot->lrc_snapshot); +- if (snapshot->lrc_bo) ++ if (snapshot->lrc_bo) { ++ struct xe_vm *vm; ++ ++ vm = snapshot->lrc_bo->vm; + xe_bo_put(snapshot->lrc_bo); ++ if (vm) ++ xe_vm_put(vm); ++ } + kfree(snapshot); + } +-- +2.43.0 + diff --git a/queue-6.10/drm-xe-use-dma_fence_chain_free-in-chain-fence-unuse.patch b/queue-6.10/drm-xe-use-dma_fence_chain_free-in-chain-fence-unuse.patch new file mode 100644 index 00000000000..8903ae24695 --- /dev/null +++ b/queue-6.10/drm-xe-use-dma_fence_chain_free-in-chain-fence-unuse.patch @@ -0,0 +1,43 @@ +From c9d3d356fc69289ceb34bde45acbf023ed3bb860 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Jul 2024 18:22:16 -0700 +Subject: drm/xe: Use dma_fence_chain_free in chain fence unused as a sync + +From: Matthew Brost + +[ Upstream commit 4f854a8b1b85d46abd5ce206936d23f87ac5e0c9 ] + +A chain fence is uninitialized if not installed in a drm sync obj. Thus +if xe_sync_entry_cleanup is called and sync->chain_fence is non-NULL the +proper cleanup is dma_fence_chain_free rather than a dma-fence put. + +Reported-by: Paulo Zanoni +Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2411 +Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2261 +Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs") +Signed-off-by: Matthew Brost +Reviewed-by: Matthew Auld +Link: https://patchwork.freedesktop.org/patch/msgid/20240727012216.2118276-1-matthew.brost@intel.com +(cherry picked from commit 7f7a2da3bf8bc0e0f6c239af495b7050056e889c) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_sync.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c +index 65f1f16282356..2bfff998458ba 100644 +--- a/drivers/gpu/drm/xe/xe_sync.c ++++ b/drivers/gpu/drm/xe/xe_sync.c +@@ -263,7 +263,7 @@ void xe_sync_entry_cleanup(struct xe_sync_entry *sync) + if (sync->fence) + dma_fence_put(sync->fence); + if (sync->chain_fence) +- dma_fence_put(&sync->chain_fence->base); ++ dma_fence_chain_free(sync->chain_fence); + if (sync->ufence) + user_fence_put(sync->ufence); + } +-- +2.43.0 + diff --git a/queue-6.10/i2c-qcom-geni-add-missing-clk_disable_unprepare-in-g.patch b/queue-6.10/i2c-qcom-geni-add-missing-clk_disable_unprepare-in-g.patch new file mode 100644 index 00000000000..ac6892dcca8 --- /dev/null +++ b/queue-6.10/i2c-qcom-geni-add-missing-clk_disable_unprepare-in-g.patch @@ -0,0 +1,41 @@ +From c6d79ec2f2951ef91917a13a9cac28950ec4b84d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 3 Aug 2024 14:10:41 +0800 +Subject: i2c: qcom-geni: Add missing clk_disable_unprepare in + geni_i2c_runtime_resume + +From: Gaosheng Cui + +[ Upstream commit b93d16bee557302d4e588375ececd833cc048acc ] + +Add the missing clk_disable_unprepare() before return in +geni_i2c_runtime_resume(). + +Fixes: 14d02fbadb5d ("i2c: qcom-geni: add desc struct to prepare support for I2C Master Hub variant") +Signed-off-by: Gaosheng Cui +Reviewed-by: Vladimir Zapolskiy +Signed-off-by: Andi Shyti +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-qcom-geni.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index 0a8b95ce35f79..78f43648e9f3a 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -990,8 +990,10 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev) + return ret; + + ret = geni_se_resources_on(&gi2c->se); +- if (ret) ++ if (ret) { ++ clk_disable_unprepare(gi2c->core_clk); + return ret; ++ } + + enable_irq(gi2c->irq); + gi2c->suspended = 0; +-- +2.43.0 + diff --git a/queue-6.10/i2c-qcom-geni-add-missing-geni_icc_disable-in-geni_i.patch b/queue-6.10/i2c-qcom-geni-add-missing-geni_icc_disable-in-geni_i.patch new file mode 100644 index 00000000000..67691c4e500 --- /dev/null +++ b/queue-6.10/i2c-qcom-geni-add-missing-geni_icc_disable-in-geni_i.patch @@ -0,0 +1,37 @@ +From 933004b7c674da5b9468f23e311eff32600d42c6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 6 Aug 2024 20:53:31 +0800 +Subject: i2c: qcom-geni: Add missing geni_icc_disable in + geni_i2c_runtime_resume + +From: Gaosheng Cui + +[ Upstream commit 9ba48db9f77ce0001dbb882476fa46e092feb695 ] + +Add the missing geni_icc_disable() before return in +geni_i2c_runtime_resume(). + +Fixes: bf225ed357c6 ("i2c: i2c-qcom-geni: Add interconnect support") +Signed-off-by: Gaosheng Cui +Reviewed-by: Vladimir Zapolskiy +Signed-off-by: Andi Shyti +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-qcom-geni.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index 78f43648e9f3a..365e37bba0f33 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -992,6 +992,7 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev) + ret = geni_se_resources_on(&gi2c->se); + if (ret) { + clk_disable_unprepare(gi2c->core_clk); ++ geni_icc_disable(&gi2c->se); + return ret; + } + +-- +2.43.0 + diff --git a/queue-6.10/i2c-smbus-improve-handling-of-stuck-alerts.patch b/queue-6.10/i2c-smbus-improve-handling-of-stuck-alerts.patch new file mode 100644 index 00000000000..10939162713 --- /dev/null +++ b/queue-6.10/i2c-smbus-improve-handling-of-stuck-alerts.patch @@ -0,0 +1,122 @@ +From 376a5bae694b66d0015e4a7232468411fdbc146c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jan 2022 09:28:56 -0800 +Subject: i2c: smbus: Improve handling of stuck alerts + +From: Guenter Roeck + +[ Upstream commit 37c526f00bc1c4f847fc800085f8f009d2e11be6 ] + +The following messages were observed while testing alert functionality +on systems with multiple I2C devices on a single bus if alert was active +on more than one chip. + +smbus_alert 3-000c: SMBALERT# from dev 0x0c, flag 0 +smbus_alert 3-000c: no driver alert()! + +and: + +smbus_alert 3-000c: SMBALERT# from dev 0x28, flag 0 + +Once it starts, this message repeats forever at high rate. There is no +device at any of the reported addresses. + +Analysis shows that this is seen if multiple devices have the alert pin +active. Apparently some devices do not support SMBus arbitration correctly. +They keep sending address bits after detecting an address collision and +handle the collision not at all or too late. +Specifically, address 0x0c is seen with ADT7461A at address 0x4c and +ADM1021 at address 0x18 if alert is active on both chips. Address 0x28 is +seen with ADT7483 at address 0x2a and ADT7461 at address 0x4c if alert is +active on both chips. + +Once the system is in bad state (alert is set by more than one chip), +it often only recovers by power cycling. + +To reduce the impact of this problem, abort the endless loop in +smbus_alert() if the same address is read more than once and not +handled by a driver. + +Fixes: b5527a7766f0 ("i2c: Add SMBus alert support") +Signed-off-by: Guenter Roeck +[wsa: it also fixed an interrupt storm in one of my experiments] +Tested-by: Wolfram Sang +[wsa: rebased, moved a comment as well, improved the 'invalid' value] +Signed-off-by: Wolfram Sang +Signed-off-by: Sasha Levin +--- + drivers/i2c/i2c-smbus.c | 32 +++++++++++++++++++++++++------- + 1 file changed, 25 insertions(+), 7 deletions(-) + +diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c +index 97f338b123b11..1b4057e1bab09 100644 +--- a/drivers/i2c/i2c-smbus.c ++++ b/drivers/i2c/i2c-smbus.c +@@ -34,6 +34,7 @@ static int smbus_do_alert(struct device *dev, void *addrp) + struct i2c_client *client = i2c_verify_client(dev); + struct alert_data *data = addrp; + struct i2c_driver *driver; ++ int ret; + + if (!client || client->addr != data->addr) + return 0; +@@ -47,16 +48,21 @@ static int smbus_do_alert(struct device *dev, void *addrp) + device_lock(dev); + if (client->dev.driver) { + driver = to_i2c_driver(client->dev.driver); +- if (driver->alert) ++ if (driver->alert) { ++ /* Stop iterating after we find the device */ + driver->alert(client, data->type, data->data); +- else ++ ret = -EBUSY; ++ } else { + dev_warn(&client->dev, "no driver alert()!\n"); +- } else ++ ret = -EOPNOTSUPP; ++ } ++ } else { + dev_dbg(&client->dev, "alert with no driver\n"); ++ ret = -ENODEV; ++ } + device_unlock(dev); + +- /* Stop iterating after we find the device */ +- return -EBUSY; ++ return ret; + } + + /* +@@ -67,6 +73,7 @@ static irqreturn_t smbus_alert(int irq, void *d) + { + struct i2c_smbus_alert *alert = d; + struct i2c_client *ara; ++ unsigned short prev_addr = I2C_CLIENT_END; /* Not a valid address */ + + ara = alert->ara; + +@@ -94,8 +101,19 @@ static irqreturn_t smbus_alert(int irq, void *d) + data.addr, data.data); + + /* Notify driver for the device which issued the alert */ +- device_for_each_child(&ara->adapter->dev, &data, +- smbus_do_alert); ++ status = device_for_each_child(&ara->adapter->dev, &data, ++ smbus_do_alert); ++ /* ++ * If we read the same address more than once, and the alert ++ * was not handled by a driver, it won't do any good to repeat ++ * the loop because it will never terminate. ++ * Bail out in this case. ++ * Note: This assumes that a driver with alert handler handles ++ * the alert properly and clears it if necessary. ++ */ ++ if (data.addr == prev_addr && status != -EBUSY) ++ break; ++ prev_addr = data.addr; + } + + return IRQ_HANDLED; +-- +2.43.0 + diff --git a/queue-6.10/i2c-smbus-send-alert-notifications-to-all-devices-if.patch b/queue-6.10/i2c-smbus-send-alert-notifications-to-all-devices-if.patch new file mode 100644 index 00000000000..7b3c87f850e --- /dev/null +++ b/queue-6.10/i2c-smbus-send-alert-notifications-to-all-devices-if.patch @@ -0,0 +1,106 @@ +From f36a3e34a6085b874b0476b5d8a28198323bd4fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Jul 2024 07:19:41 -0700 +Subject: i2c: smbus: Send alert notifications to all devices if source not + found + +From: Guenter Roeck + +[ Upstream commit f6c29f710c1ff2590109f83be3e212b86c01e0f3 ] + +If a SMBus alert is received and the originating device is not found, +the reason may be that the address reported on the SMBus alert address +is corrupted, for example because multiple devices asserted alert and +do not correctly implement SMBus arbitration. + +If this happens, call alert handlers on all devices connected to the +given I2C bus, in the hope that this cleans up the situation. + +This change reliably fixed the problem on a system with multiple devices +on a single bus. Example log where the device on address 0x18 (ADM1021) +and on address 0x4c (ADT7461A) both had the alert line asserted: + +smbus_alert 3-000c: SMBALERT# from dev 0x0c, flag 0 +smbus_alert 3-000c: no driver alert()! +smbus_alert 3-000c: SMBALERT# from dev 0x0c, flag 0 +smbus_alert 3-000c: no driver alert()! +lm90 3-0018: temp1 out of range, please check! +lm90 3-0018: Disabling ALERT# +lm90 3-0029: Everything OK +lm90 3-002a: Everything OK +lm90 3-004c: temp1 out of range, please check! +lm90 3-004c: temp2 out of range, please check! +lm90 3-004c: Disabling ALERT# + +Fixes: b5527a7766f0 ("i2c: Add SMBus alert support") +Signed-off-by: Guenter Roeck +[wsa: fixed a typo in the commit message] +Signed-off-by: Wolfram Sang +Signed-off-by: Sasha Levin +--- + drivers/i2c/i2c-smbus.c | 38 +++++++++++++++++++++++++++++++++++--- + 1 file changed, 35 insertions(+), 3 deletions(-) + +diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c +index 1b4057e1bab09..25bc7b8d98f0d 100644 +--- a/drivers/i2c/i2c-smbus.c ++++ b/drivers/i2c/i2c-smbus.c +@@ -65,6 +65,32 @@ static int smbus_do_alert(struct device *dev, void *addrp) + return ret; + } + ++/* Same as above, but call back all drivers with alert handler */ ++ ++static int smbus_do_alert_force(struct device *dev, void *addrp) ++{ ++ struct i2c_client *client = i2c_verify_client(dev); ++ struct alert_data *data = addrp; ++ struct i2c_driver *driver; ++ ++ if (!client || (client->flags & I2C_CLIENT_TEN)) ++ return 0; ++ ++ /* ++ * Drivers should either disable alerts, or provide at least ++ * a minimal handler. Lock so the driver won't change. ++ */ ++ device_lock(dev); ++ if (client->dev.driver) { ++ driver = to_i2c_driver(client->dev.driver); ++ if (driver->alert) ++ driver->alert(client, data->type, data->data); ++ } ++ device_unlock(dev); ++ ++ return 0; ++} ++ + /* + * The alert IRQ handler needs to hand work off to a task which can issue + * SMBus calls, because those sleeping calls can't be made in IRQ context. +@@ -106,13 +132,19 @@ static irqreturn_t smbus_alert(int irq, void *d) + /* + * If we read the same address more than once, and the alert + * was not handled by a driver, it won't do any good to repeat +- * the loop because it will never terminate. +- * Bail out in this case. ++ * the loop because it will never terminate. Try again, this ++ * time calling the alert handlers of all devices connected to ++ * the bus, and abort the loop afterwards. If this helps, we ++ * are all set. If it doesn't, there is nothing else we can do, ++ * so we might as well abort the loop. + * Note: This assumes that a driver with alert handler handles + * the alert properly and clears it if necessary. + */ +- if (data.addr == prev_addr && status != -EBUSY) ++ if (data.addr == prev_addr && status != -EBUSY) { ++ device_for_each_child(&ara->adapter->dev, &data, ++ smbus_do_alert_force); + break; ++ } + prev_addr = data.addr; + } + +-- +2.43.0 + diff --git a/queue-6.10/kprobes-fix-to-check-symbol-prefixes-correctly.patch b/queue-6.10/kprobes-fix-to-check-symbol-prefixes-correctly.patch new file mode 100644 index 00000000000..7124901e667 --- /dev/null +++ b/queue-6.10/kprobes-fix-to-check-symbol-prefixes-correctly.patch @@ -0,0 +1,40 @@ +From dd9bd76b7e81a5fd64e30e5943d91e2091d77ae2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Aug 2024 22:53:15 +0900 +Subject: kprobes: Fix to check symbol prefixes correctly + +From: Masami Hiramatsu (Google) + +[ Upstream commit 8c8acb8f26cbde665b233dd1b9bbcbb9b86822dc ] + +Since str_has_prefix() takes the prefix as the 2nd argument and the string +as the first, is_cfi_preamble_symbol() always fails to check the prefix. +Fix the function parameter order so that it correctly check the prefix. + +Link: https://lore.kernel.org/all/172260679559.362040.7360872132937227206.stgit@devnote2/ + +Fixes: de02f2ac5d8c ("kprobes: Prohibit probing on CFI preamble symbol") +Signed-off-by: Masami Hiramatsu (Google) +Signed-off-by: Sasha Levin +--- + kernel/kprobes.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/kernel/kprobes.c b/kernel/kprobes.c +index 6a76a81000735..85251c254d8a6 100644 +--- a/kernel/kprobes.c ++++ b/kernel/kprobes.c +@@ -1557,8 +1557,8 @@ static bool is_cfi_preamble_symbol(unsigned long addr) + if (lookup_symbol_name(addr, symbuf)) + return false; + +- return str_has_prefix("__cfi_", symbuf) || +- str_has_prefix("__pfx_", symbuf); ++ return str_has_prefix(symbuf, "__cfi_") || ++ str_has_prefix(symbuf, "__pfx_"); + } + + static int check_kprobe_address_safe(struct kprobe *p, +-- +2.43.0 + diff --git a/queue-6.10/module-make-waiting-for-a-concurrent-module-loader-i.patch b/queue-6.10/module-make-waiting-for-a-concurrent-module-loader-i.patch new file mode 100644 index 00000000000..0596ee5c111 --- /dev/null +++ b/queue-6.10/module-make-waiting-for-a-concurrent-module-loader-i.patch @@ -0,0 +1,108 @@ +From d8d0041c333b5fb4686fa38993b5bba321b62188 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 9 Aug 2024 08:33:28 -0700 +Subject: module: make waiting for a concurrent module loader interruptible + +From: Linus Torvalds + +[ Upstream commit 2124d84db293ba164059077944e6b429ba530495 ] + +The recursive aes-arm-bs module load situation reported by Russell King +is getting fixed in the crypto layer, but this in the meantime fixes the +"recursive load hangs forever" by just making the waiting for the first +module load be interruptible. + +This should now match the old behavior before commit 9b9879fc0327 +("modules: catch concurrent module loads, treat them as idempotent"), +which used the different "wait for module to be ready" code in +module_patient_check_exists(). + +End result: a recursive module load will still block, but now a signal +will interrupt it and fail the second module load, at which point the +first module will successfully complete loading. + +Fixes: 9b9879fc0327 ("modules: catch concurrent module loads, treat them as idempotent") +Cc: Russell King +Cc: Herbert Xu +Signed-off-by: Linus Torvalds +Signed-off-by: Sasha Levin +--- + kernel/module/main.c | 40 +++++++++++++++++++++++++--------------- + 1 file changed, 25 insertions(+), 15 deletions(-) + +diff --git a/kernel/module/main.c b/kernel/module/main.c +index 7445d27ce3cdc..3f9da537024a1 100644 +--- a/kernel/module/main.c ++++ b/kernel/module/main.c +@@ -3101,7 +3101,7 @@ static bool idempotent(struct idempotent *u, const void *cookie) + struct idempotent *existing; + bool first; + +- u->ret = 0; ++ u->ret = -EINTR; + u->cookie = cookie; + init_completion(&u->complete); + +@@ -3137,7 +3137,7 @@ static int idempotent_complete(struct idempotent *u, int ret) + hlist_for_each_entry_safe(pos, next, head, entry) { + if (pos->cookie != cookie) + continue; +- hlist_del(&pos->entry); ++ hlist_del_init(&pos->entry); + pos->ret = ret; + complete(&pos->complete); + } +@@ -3145,6 +3145,28 @@ static int idempotent_complete(struct idempotent *u, int ret) + return ret; + } + ++/* ++ * Wait for the idempotent worker. ++ * ++ * If we get interrupted, we need to remove ourselves from the ++ * the idempotent list, and the completion may still come in. ++ * ++ * The 'idem_lock' protects against the race, and 'idem.ret' was ++ * initialized to -EINTR and is thus always the right return ++ * value even if the idempotent work then completes between ++ * the wait_for_completion and the cleanup. ++ */ ++static int idempotent_wait_for_completion(struct idempotent *u) ++{ ++ if (wait_for_completion_interruptible(&u->complete)) { ++ spin_lock(&idem_lock); ++ if (!hlist_unhashed(&u->entry)) ++ hlist_del(&u->entry); ++ spin_unlock(&idem_lock); ++ } ++ return u->ret; ++} ++ + static int init_module_from_file(struct file *f, const char __user * uargs, int flags) + { + struct load_info info = { }; +@@ -3188,20 +3210,8 @@ static int idempotent_init_module(struct file *f, const char __user * uargs, int + + /* + * Somebody else won the race and is loading the module. +- * +- * We have to wait for it forever, since our 'idem' is +- * on the stack and the list entry stays there until +- * completed (but we could fix it under the idem_lock) +- * +- * It's also unclear what a real timeout might be, +- * but we could maybe at least make this killable +- * and remove the idem entry in that case? + */ +- for (;;) { +- if (wait_for_completion_timeout(&idem.complete, 10*HZ)) +- return idem.ret; +- pr_warn_once("module '%pD' taking a long time to load", f); +- } ++ return idempotent_wait_for_completion(&idem); + } + + SYSCALL_DEFINE3(finit_module, int, fd, const char __user *, uargs, int, flags) +-- +2.43.0 + diff --git a/queue-6.10/module-warn-about-excessively-long-module-waits.patch b/queue-6.10/module-warn-about-excessively-long-module-waits.patch new file mode 100644 index 00000000000..30ffd2d3b79 --- /dev/null +++ b/queue-6.10/module-warn-about-excessively-long-module-waits.patch @@ -0,0 +1,108 @@ +From 1554ec968d2bdafc81b5fc52139f71b9bb305d15 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 8 Aug 2024 12:29:40 -0700 +Subject: module: warn about excessively long module waits + +From: Linus Torvalds + +[ Upstream commit cb5b81bc9a448f8db817566f60f92e2ea788ea0f ] + +Russell King reported that the arm cbc(aes) crypto module hangs when +loaded, and Herbert Xu bisected it to commit 9b9879fc0327 ("modules: +catch concurrent module loads, treat them as idempotent"), and noted: + + "So what's happening here is that the first modprobe tries to load a + fallback CBC implementation, in doing so it triggers a load of the + exact same module due to module aliases. + + IOW we're loading aes-arm-bs which provides cbc(aes). However, this + needs a fallback of cbc(aes) to operate, which is made out of the + generic cbc module + any implementation of aes, or ecb(aes). The + latter happens to also be provided by aes-arm-cb so that's why it + tries to load the same module again" + +So loading the aes-arm-bs module ends up wanting to recursively load +itself, and the recursive load then ends up waiting for the original +module load to complete. + +This is a regression, in that it used to be that we just tried to load +the module multiple times, and then as we went on to install it the +second time we would instead just error out because the module name +already existed. + +That is actually also exactly what the original "catch concurrent loads" +patch did in commit 9828ed3f695a ("module: error out early on concurrent +load of the same module file"), but it turns out that it ends up being +racy, in that erroring out before the module has been fully initialized +will cause failures in dependent module loading. + +See commit ac2263b588df (which was the revert of that "error out early") +commit for details about why erroring out before the module has been +initialized is actually fundamentally racy. + +Now, for the actual recursive module load (as opposed to just +concurrently loading the same module twice), the race is not an issue. + +At the same time it's hard for the kernel to see that this is recursion, +because the module load is always done from a usermode helper, so the +recursion is not some simple callchain within the kernel. + +End result: this is not the real fix, but this at least adds a warning +for the situation (admittedly much too late for all the debugging pain +that Russell and Herbert went through) and if we can come to a +resolution on how to detect the recursion properly, this re-organizes +the code to make that easier. + +Link: https://lore.kernel.org/all/ZrFHLqvFqhzykuYw@shell.armlinux.org.uk/ +Reported-by: Russell King +Debugged-by: Herbert Xu +Signed-off-by: Linus Torvalds +Stable-dep-of: 2124d84db293 ("module: make waiting for a concurrent module loader interruptible") +Signed-off-by: Sasha Levin +--- + kernel/module/main.c | 27 ++++++++++++++++++++------- + 1 file changed, 20 insertions(+), 7 deletions(-) + +diff --git a/kernel/module/main.c b/kernel/module/main.c +index d18a94b973e10..7445d27ce3cdc 100644 +--- a/kernel/module/main.c ++++ b/kernel/module/main.c +@@ -3180,15 +3180,28 @@ static int idempotent_init_module(struct file *f, const char __user * uargs, int + if (!f || !(f->f_mode & FMODE_READ)) + return -EBADF; + +- /* See if somebody else is doing the operation? */ +- if (idempotent(&idem, file_inode(f))) { +- wait_for_completion(&idem.complete); +- return idem.ret; ++ /* Are we the winners of the race and get to do this? */ ++ if (!idempotent(&idem, file_inode(f))) { ++ int ret = init_module_from_file(f, uargs, flags); ++ return idempotent_complete(&idem, ret); + } + +- /* Otherwise, we'll do it and complete others */ +- return idempotent_complete(&idem, +- init_module_from_file(f, uargs, flags)); ++ /* ++ * Somebody else won the race and is loading the module. ++ * ++ * We have to wait for it forever, since our 'idem' is ++ * on the stack and the list entry stays there until ++ * completed (but we could fix it under the idem_lock) ++ * ++ * It's also unclear what a real timeout might be, ++ * but we could maybe at least make this killable ++ * and remove the idem entry in that case? ++ */ ++ for (;;) { ++ if (wait_for_completion_timeout(&idem.complete, 10*HZ)) ++ return idem.ret; ++ pr_warn_once("module '%pD' taking a long time to load", f); ++ } + } + + SYSCALL_DEFINE3(finit_module, int, fd, const char __user *, uargs, int, flags) +-- +2.43.0 + diff --git a/queue-6.10/nfsd-don-t-set-svc_sock_anonymous-when-creating-nfsd.patch b/queue-6.10/nfsd-don-t-set-svc_sock_anonymous-when-creating-nfsd.patch new file mode 100644 index 00000000000..f545617ad68 --- /dev/null +++ b/queue-6.10/nfsd-don-t-set-svc_sock_anonymous-when-creating-nfsd.patch @@ -0,0 +1,39 @@ +From 7aa044b949222801d4258ba53b7a13ce3f95145b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 19 Jul 2024 14:55:53 -0400 +Subject: nfsd: don't set SVC_SOCK_ANONYMOUS when creating nfsd sockets + +From: Jeff Layton + +[ Upstream commit 91da337e5d506f2c065d20529d105ca40090e320 ] + +When creating nfsd sockets via the netlink interface, we do want to +register with the portmapper. Don't set SVC_SOCK_ANONYMOUS. + +Reported-by: Steve Dickson +Fixes: 16a471177496 ("NFSD: add listener-{set,get} netlink command") +Cc: Lorenzo Bianconi +Signed-off-by: Jeff Layton +Signed-off-by: Chuck Lever +Signed-off-by: Sasha Levin +--- + fs/nfsd/nfsctl.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c +index c848ebe5d08f1..0f9b4f7b56cd8 100644 +--- a/fs/nfsd/nfsctl.c ++++ b/fs/nfsd/nfsctl.c +@@ -2053,8 +2053,7 @@ int nfsd_nl_listener_set_doit(struct sk_buff *skb, struct genl_info *info) + continue; + } + +- ret = svc_xprt_create_from_sa(serv, xcl_name, net, sa, +- SVC_SOCK_ANONYMOUS, ++ ret = svc_xprt_create_from_sa(serv, xcl_name, net, sa, 0, + get_current_cred()); + /* always save the latest error */ + if (ret < 0) +-- +2.43.0 + diff --git a/queue-6.10/series b/queue-6.10/series index 158a85c039d..1d9e824a159 100644 --- a/queue-6.10/series +++ b/queue-6.10/series @@ -126,3 +126,46 @@ irqchip-meson-gpio-convert-meson_gpio_irq_controller-lock-to-raw_spinlock_t.patc irqchip-loongarch-cpu-fix-return-value-of-lpic_gsi_to_irq.patch sched-cputime-fix-mul_u64_u64_div_u64-precision-for-cputime.patch net-drop-bad-gso-csum_start-and-offset-in-virtio_net_hdr.patch +arm64-cputype-add-cortex-x3-definitions.patch +arm64-cputype-add-cortex-a720-definitions.patch +arm64-cputype-add-cortex-x925-definitions.patch +arm64-errata-unify-speculative-ssbs-errata-logic.patch +arm64-errata-expand-speculative-ssbs-workaround.patch +arm64-cputype-add-cortex-x1c-definitions.patch +arm64-cputype-add-cortex-a725-definitions.patch +arm64-errata-expand-speculative-ssbs-workaround-agai.patch +nfsd-don-t-set-svc_sock_anonymous-when-creating-nfsd.patch +i2c-smbus-improve-handling-of-stuck-alerts.patch +asoc-codecs-wcd938x-sdw-correct-soundwire-ports-mask.patch +asoc-codecs-wcd939x-sdw-correct-soundwire-ports-mask.patch +asoc-codecs-wsa881x-correct-soundwire-ports-mask.patch +asoc-codecs-wsa883x-parse-port-mapping-information.patch +asoc-codecs-wsa883x-correct-soundwire-ports-mask.patch +asoc-codecs-wsa884x-parse-port-mapping-information.patch +asoc-codecs-wsa884x-correct-soundwire-ports-mask.patch +asoc-sti-add-missing-probe-entry-for-player-and-read.patch +spi-spidev-add-missing-spi_device_id-for-bh2228fv.patch +asoc-sof-remove-libraries-from-topology-lookups.patch +i2c-smbus-send-alert-notifications-to-all-devices-if.patch +bpf-kprobe-remove-unused-declaring-of-bpf_kprobe_ove.patch +kprobes-fix-to-check-symbol-prefixes-correctly.patch +asoc-cs-amp-lib-fix-null-pointer-crash-if-efi.get_va.patch +i2c-qcom-geni-add-missing-clk_disable_unprepare-in-g.patch +asoc-cs35l56-revert-support-for-dual-ownership-of-as.patch +asoc-cs35l56-handle-otp-read-latency-over-soundwire.patch +drm-atomic-allow-no-op-fb_id-updates-for-async-flips.patch +i2c-qcom-geni-add-missing-geni_icc_disable-in-geni_i.patch +drm-i915-allow-evicting-to-use-the-requested-placeme.patch +drm-i915-attempt-to-get-pages-without-eviction-first.patch +drm-amd-display-replace-dm_execute_dmub_cmd-with-dc_.patch +spi-spi-fsl-lpspi-fix-scldiv-calculation.patch +alsa-usb-audio-re-add-scratchamp-quirk-entries.patch +drm-xe-rtp-fix-off-by-one-when-processing-rules.patch +drm-xe-use-dma_fence_chain_free-in-chain-fence-unuse.patch +drm-xe-hwmon-fix-pl1-disable-flow-in-xe_hwmon_power_.patch +drm-xe-minor-cleanup-in-lrc-handling.patch +drm-xe-take-ref-to-vm-in-delayed-snapshot.patch +asoc-meson-axg-fifo-fix-irq-scheduling-issue-with-pr.patch +cifs-cifs_inval_name_dfs_link_error-correct-the-chec.patch +module-warn-about-excessively-long-module-waits.patch +module-make-waiting-for-a-concurrent-module-loader-i.patch diff --git a/queue-6.10/spi-spi-fsl-lpspi-fix-scldiv-calculation.patch b/queue-6.10/spi-spi-fsl-lpspi-fix-scldiv-calculation.patch new file mode 100644 index 00000000000..d709f236cec --- /dev/null +++ b/queue-6.10/spi-spi-fsl-lpspi-fix-scldiv-calculation.patch @@ -0,0 +1,57 @@ +From 7a087ca1a883389ee2e45f91fa3235af4afe987f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 4 Aug 2024 13:36:11 +0200 +Subject: spi: spi-fsl-lpspi: Fix scldiv calculation + +From: Stefan Wahren + +[ Upstream commit 730bbfaf7d4890bd99e637db7767dc68cfeb24e7 ] + +The effective SPI clock frequency should never exceed speed_hz +otherwise this might result in undefined behavior of the SPI device. + +Currently the scldiv calculation could violate this constraint. +For the example parameters perclk_rate = 24 MHz and speed_hz = 7 MHz, +the function fsl_lpspi_set_bitrate will determine perscale = 0 and +scldiv = 1, which is a effective SPI clock of 8 MHz. + +So fix this by rounding up the quotient of perclk_rate and speed_hz. +While this never change within the loop, we can pull this out. + +Fixes: 5314987de5e5 ("spi: imx: add lpspi bus driver") +Signed-off-by: Stefan Wahren +Link: https://patch.msgid.link/20240804113611.83613-1-wahrenst@gmx.net +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spi-fsl-lpspi.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c +index aa5ed254be46c..f2d7eedd324b7 100644 +--- a/drivers/spi/spi-fsl-lpspi.c ++++ b/drivers/spi/spi-fsl-lpspi.c +@@ -296,7 +296,7 @@ static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi) + static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) + { + struct lpspi_config config = fsl_lpspi->config; +- unsigned int perclk_rate, scldiv; ++ unsigned int perclk_rate, scldiv, div; + u8 prescale; + + perclk_rate = clk_get_rate(fsl_lpspi->clk_per); +@@ -313,8 +313,10 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) + return -EINVAL; + } + ++ div = DIV_ROUND_UP(perclk_rate, config.speed_hz); ++ + for (prescale = 0; prescale < 8; prescale++) { +- scldiv = perclk_rate / config.speed_hz / (1 << prescale) - 2; ++ scldiv = div / (1 << prescale) - 2; + if (scldiv < 256) { + fsl_lpspi->config.prescale = prescale; + break; +-- +2.43.0 + diff --git a/queue-6.10/spi-spidev-add-missing-spi_device_id-for-bh2228fv.patch b/queue-6.10/spi-spidev-add-missing-spi_device_id-for-bh2228fv.patch new file mode 100644 index 00000000000..ccda4706d0a --- /dev/null +++ b/queue-6.10/spi-spidev-add-missing-spi_device_id-for-bh2228fv.patch @@ -0,0 +1,42 @@ +From fd550a51ddd889df93130b3bea889d8f30d3ed23 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Jul 2024 15:35:47 +0200 +Subject: spi: spidev: Add missing spi_device_id for bh2228fv + +From: Geert Uytterhoeven + +[ Upstream commit e4c4638b6a10427d30e29d22351c375886025f47 ] + +When the of_device_id entry for "rohm,bh2228fv" was added, the +corresponding spi_device_id was forgotten, causing a warning message +during boot-up: + + SPI driver spidev has no spi_device_id for rohm,bh2228fv + +Fix module autoloading and shut up the warning by adding the missing +entry. + +Fixes: fc28d1c1fe3b3e2f ("spi: spidev: add correct compatible for Rohm BH2228FV") +Signed-off-by: Geert Uytterhoeven +Link: https://patch.msgid.link/cb571d4128f41175f31319cd9febc829417ea167.1722346539.git.geert+renesas@glider.be +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spidev.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c +index 05e6d007f9a7f..5304728c68c20 100644 +--- a/drivers/spi/spidev.c ++++ b/drivers/spi/spidev.c +@@ -700,6 +700,7 @@ static const struct class spidev_class = { + }; + + static const struct spi_device_id spidev_spi_ids[] = { ++ { .name = "bh2228fv" }, + { .name = "dh2228fv" }, + { .name = "ltc2488" }, + { .name = "sx1301" }, +-- +2.43.0 +