From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Mon, 20 Oct 2025 08:16:21 +0000 (+0800)
Subject: ufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=84919722e6a7af63729e2289588f4dfb37b43879;p=thirdparty%2Fu-boot.git

ufs: core: Add ufshcd_dme_enable() and ufshcd_dme_reset()

In order for host drivers to use.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1760948182-128561-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---

diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 2125e70a054..b4f994c5bc0 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -369,6 +369,36 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
 	return ret;
 }
 
+int ufshcd_dme_enable(struct ufs_hba *hba)
+{
+	struct uic_command uic_cmd = {0};
+	int ret;
+
+	uic_cmd.command = UIC_CMD_DME_ENABLE;
+
+	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
+	if (ret)
+		dev_dbg(hba->dev,
+			"dme-enable: error code %d\n", ret);
+
+	return ret;
+}
+
+int ufshcd_dme_reset(struct ufs_hba *hba)
+{
+	struct uic_command uic_cmd = {0};
+	int ret;
+
+	uic_cmd.command = UIC_CMD_DME_RESET;
+
+	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
+	if (ret)
+		dev_dbg(hba->dev,
+			"dme-reset: error code %d\n", ret);
+
+	return ret;
+}
+
 /**
  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
  *
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index d38b6fec2ca..bc839a43704 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -447,6 +447,8 @@ int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
 			u8 attr_set, u32 mib_val, u8 peer);
 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
 			u32 *mib_val, u8 peer);
+int ufshcd_dme_enable(struct ufs_hba *hba);
+int ufshcd_dme_reset(struct ufs_hba *hba);
 
 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
 				 u32 mib_val)