From: Terry Guo <terry.guo@arm.com>
Date: Tue, 26 Nov 2013 11:58:37 +0000 (+0000)
Subject: arm.c (require_pic_register): Handle high pic base register for thumb-1.
X-Git-Tag: releases/gcc-4.9.0~2450
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=84c44566f3f16c29b65a007944e0d3ea81b48c34;p=thirdparty%2Fgcc.git

arm.c (require_pic_register): Handle high pic base register for thumb-1.

gcc/ChangeLog
2013-11-26  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (require_pic_register): Handle high pic base
	register for thumb-1.
	(arm_load_pic_register): Also initialize high pic base register.
	* doc/invoke.texi: Update documentation for option -mpic-register.

gcc/testsuite/ChangeLog
2013-11-26  Terry Guo  <terry.guo@arm.com>

	* gcc.target/arm/thumb1-pic-high-reg.c: New case.
	* gcc.target/arm/thumb1-pic-single-base.c: New case.

From-SVN: r205391
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5e25b2534daa..7974b5798f0a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2013-11-26  Terry Guo  <terry.guo@arm.com>
+
+	* config/arm/arm.c (require_pic_register): Handle high pic base
+	register for thumb-1.
+	(arm_load_pic_register): Also initialize high pic base register.
+	* doc/invoke.texi: Update documentation for option -mpic-register.
+
 2013-11-26  Oleg Endo  <olegendo@gcc.gnu.org>
 
 	PR target/58314
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index dc3dbdb1164e..4af6c05949f2 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -5917,7 +5917,8 @@ require_pic_register (void)
   if (!crtl->uses_pic_offset_table)
     {
       gcc_assert (can_create_pseudo_p ());
-      if (arm_pic_register != INVALID_REGNUM)
+      if (arm_pic_register != INVALID_REGNUM
+	  && !(TARGET_THUMB1 && arm_pic_register > LAST_LO_REGNUM))
 	{
 	  if (!cfun->machine->pic_reg)
 	    cfun->machine->pic_reg = gen_rtx_REG (Pmode, arm_pic_register);
@@ -5943,7 +5944,12 @@ require_pic_register (void)
 	      crtl->uses_pic_offset_table = 1;
 	      start_sequence ();
 
-	      arm_load_pic_register (0UL);
+	      if (TARGET_THUMB1 && arm_pic_register != INVALID_REGNUM
+		  && arm_pic_register > LAST_LO_REGNUM)
+		emit_move_insn (cfun->machine->pic_reg,
+				gen_rtx_REG (Pmode, arm_pic_register));
+	      else
+		arm_load_pic_register (0UL);
 
 	      seq = get_insns ();
 	      end_sequence ();
@@ -6202,6 +6208,14 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
 	      emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp));
 	      emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));
 	    }
+	  else if (arm_pic_register != INVALID_REGNUM
+		   && arm_pic_register > LAST_LO_REGNUM
+		   && REGNO (pic_reg) <= LAST_LO_REGNUM)
+	    {
+	      emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));
+	      emit_move_insn (gen_rtx_REG (Pmode, arm_pic_register), pic_reg);
+	      emit_use (gen_rtx_REG (Pmode, arm_pic_register));
+	    }
 	  else
 	    emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));
 	}
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 501d080ee9fa..466eee0a91c3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12216,8 +12216,11 @@ before execution begins.
 
 @item -mpic-register=@var{reg}
 @opindex mpic-register
-Specify the register to be used for PIC addressing.  The default is R10
-unless stack-checking is enabled, when R9 is used.
+Specify the register to be used for PIC addressing.
+For standard PIC base case, the default will be any suitable register
+determined by compiler.  For single PIC base case, the default is
+@samp{R9} if target is EABI based or stack-checking is enabled,
+otherwise the default is @samp{R10}.
 
 @item -mpic-data-is-text-relative
 @opindex mpic-data-is-text-relative
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6639f05d542f..2ae530032a1c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-11-26  Terry Guo  <terry.guo@arm.com>
+
+	* gcc.target/arm/thumb1-pic-high-reg.c: New case.
+	* gcc.target/arm/thumb1-pic-single-base.c: New case.
+
 2013-11-26  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/58700
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c b/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c
new file mode 100644
index 000000000000..df269fc84765
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-options "-mthumb -fpic -mpic-register=9" } */
+
+int g_test;
+
+int
+foo (int par)
+{
+    g_test = par;
+}
diff --git a/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c b/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c
new file mode 100644
index 000000000000..6e9b2570a4a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-options "-mthumb -fpic -msingle-pic-base" } */
+
+int g_test;
+
+int
+foo (int par)
+{
+    g_test = par;
+}