From: Andre Vieira Date: Wed, 14 Feb 2024 16:46:38 +0000 (+0000) Subject: arm: Annotate instructions with mve_safe_imp_xlane_pred X-Git-Tag: basepoints/gcc-15~837 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8594dfed927e4eda3d2b02f801538af04f549679;p=thirdparty%2Fgcc.git arm: Annotate instructions with mve_safe_imp_xlane_pred This patch annotates some MVE across lane instructions with a new attribute. We use this attribute to let the compiler know that these instructions can be safely implicitly predicated when tail predicating if their operands are guaranteed to have zeroed tail predicated lanes. These instructions were selected because having the value 0 in those lanes or 'tail-predicating' those lanes have the same effect. gcc/ChangeLog: * config/arm/arm.md (mve_safe_imp_xlane_pred): New attribute. * config/arm/iterators.md (mve_vmaxmin_safe_imp): New iterator attribute. * config/arm/mve.md (vaddvq_s, vaddvq_u, vaddlvq_s, vaddlvq_u, vaddvaq_s, vaddvaq_u, vmaxavq_s, vmaxvq_u, vmladavq_s, vmladavq_u, vmladavxq_s, vmlsdavq_s, vmlsdavxq_s, vaddlvaq_s, vaddlvaq_u, vmlaldavq_u, vmlaldavq_s, vmlaldavq_u, vmlaldavxq_s, vmlsldavq_s, vmlsldavxq_s, vrmlaldavhq_u, vrmlaldavhq_s, vrmlaldavhxq_s, vrmlsldavhq_s, vrmlsldavhxq_s, vrmlaldavhaq_s, vrmlaldavhaq_u, vrmlaldavhaxq_s, vrmlsldavhaq_s, vrmlsldavhaxq_s, vabavq_s, vabavq_u, vmladavaq_u, vmladavaq_s, vmladavaxq_s, vmlsdavaq_s, vmlsdavaxq_s, vmlaldavaq_s, vmlaldavaq_u, vmlaldavaxq_s, vmlsldavaq_s, vmlsldavaxq_s): Added mve_safe_imp_xlane_pred. --- diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 81290e83818e..814e871acead 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -130,6 +130,12 @@ ; encode that it is a predicable instruction. (define_attr "mve_unpredicated_insn" "" (symbol_ref "CODE_FOR_nothing")) +; An attribute used by the loop-doloop pass when determining whether it is +; safe to predicate a MVE instruction, that operates across lanes, and was +; previously not predicated. The pass will still check whether all inputs +; are predicated by the VCTP predication mask. +(define_attr "mve_safe_imp_xlane_pred" "yes,no" (const_string "no")) + ; LENGTH of an instruction (in bytes) (define_attr "length" "" (const_int 4)) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 547d87f3bc8e..da49bd64f17d 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -869,6 +869,14 @@ (plus "vadd") ]) +(define_int_attr mve_vmaxmin_safe_imp [ + (VMAXVQ_U "yes") + (VMAXVQ_S "no") + (VMAXAVQ_S "yes") + (VMINVQ_U "no") + (VMINVQ_S "no") + (VMINAVQ_S "no")]) + (define_int_attr mve_cmp_op1 [ (VCMPCSQ_M_U "cs") (VCMPEQQ_M_S "eq") (VCMPEQQ_M_U "eq") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 8aa0bded7f05..d7bdcd862f89 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -393,6 +393,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q1" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -529,6 +530,7 @@ "TARGET_HAVE_MVE" ".32\t%Q0, %R0, %q1" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_v4si")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -802,6 +804,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1014,6 +1017,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "") (set_attr "type" "mve_move") ]) @@ -1033,6 +1037,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q1, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1219,6 +1224,7 @@ "TARGET_HAVE_MVE" ".32\t%Q0, %R0, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_v4si")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1450,6 +1456,7 @@ "TARGET_HAVE_MVE" ".%#\t%Q0, %R0, %q1, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1588,6 +1595,7 @@ "TARGET_HAVE_MVE" ".32\t%Q0, %R0, %q1, %q2" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_v4si")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1725,6 +1733,7 @@ "TARGET_HAVE_MVE" ".32\t%Q0, %R0, %q2, %q3" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_v4si")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1742,6 +1751,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q2, %q3" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -1952,6 +1962,7 @@ "TARGET_HAVE_MVE" ".%#\t%0, %q2, %q3" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ]) @@ -2401,6 +2412,7 @@ "TARGET_HAVE_MVE" ".%#\t%Q0, %R0, %q2, %q3" [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_q_")) + (set_attr "mve_safe_imp_xlane_pred" "yes") (set_attr "type" "mve_move") ])