From: pxinwr <peixing.xin@windriver.com>
Date: Wed, 13 Mar 2019 17:18:25 +0000 (+0800)
Subject: bpo-31904: Adapt the _signal module to VxWorks RTOS (GH-12304)
X-Git-Tag: v3.8.0a3~110
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8b5bdda5b4c418c4a858f183763d0a497170977c;p=thirdparty%2FPython%2Fcpython.git

bpo-31904: Adapt the _signal module to VxWorks RTOS (GH-12304)

Limited signal fields in VxWorks.
---

diff --git a/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst b/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst
new file mode 100644
index 000000000000..d859446b90a3
--- /dev/null
+++ b/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst
@@ -0,0 +1 @@
+Add _signal module support for VxWorks.
diff --git a/Modules/signalmodule.c b/Modules/signalmodule.c
index f29720bcaf36..4590017c170a 100644
--- a/Modules/signalmodule.c
+++ b/Modules/signalmodule.c
@@ -1079,11 +1079,18 @@ fill_siginfo(siginfo_t *si)
 
     PyStructSequence_SET_ITEM(result, 0, PyLong_FromLong((long)(si->si_signo)));
     PyStructSequence_SET_ITEM(result, 1, PyLong_FromLong((long)(si->si_code)));
+#ifdef __VXWORKS__   
+    PyStructSequence_SET_ITEM(result, 2, PyLong_FromLong(0L));
+    PyStructSequence_SET_ITEM(result, 3, PyLong_FromLong(0L));
+    PyStructSequence_SET_ITEM(result, 4, PyLong_FromLong(0L));
+    PyStructSequence_SET_ITEM(result, 5, PyLong_FromLong(0L));
+#else   
     PyStructSequence_SET_ITEM(result, 2, PyLong_FromLong((long)(si->si_errno)));
     PyStructSequence_SET_ITEM(result, 3, PyLong_FromPid(si->si_pid));
     PyStructSequence_SET_ITEM(result, 4, _PyLong_FromUid(si->si_uid));
     PyStructSequence_SET_ITEM(result, 5,
                                 PyLong_FromLong((long)(si->si_status)));
+#endif   
 #ifdef HAVE_SIGINFO_T_SI_BAND
     PyStructSequence_SET_ITEM(result, 6, PyLong_FromLong(si->si_band));
 #else