From: Sasha Levin Date: Sun, 24 Jan 2021 15:36:32 +0000 (-0500) Subject: Fixes for 5.10 X-Git-Tag: v4.19.171~38 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8bb0849b7f5f6699df0aad38c5df0c464047a79e;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.10 Signed-off-by: Sasha Levin --- diff --git a/queue-5.10/alsa-hda-tegra-fix-tegra-hda-on-tegra30-soc.patch b/queue-5.10/alsa-hda-tegra-fix-tegra-hda-on-tegra30-soc.patch new file mode 100644 index 00000000000..7ccd337ecce --- /dev/null +++ b/queue-5.10/alsa-hda-tegra-fix-tegra-hda-on-tegra30-soc.patch @@ -0,0 +1,92 @@ +From aac01db37c37581e51123357883a8bd92620c586 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Jan 2021 13:59:13 +0000 +Subject: ALSA: hda/tegra: fix tegra-hda on tegra30 soc + +From: Peter Geis + +[ Upstream commit 615d435400435876ac68c1de37e9526a9164eaec ] + +Currently hda on tegra30 fails to open a stream with an input/output error. + +For example: +speaker-test -Dhw:0,3 -c 2 + +speaker-test 1.2.2 + +Playback device is hw:0,3 +Stream parameters are 48000Hz, S16_LE, 2 channels +Using 16 octaves of pink noise +Rate set to 48000Hz (requested 48000Hz) +Buffer size range from 64 to 16384 +Period size range from 32 to 8192 +Using max buffer size 16384 +Periods = 4 +was set period_size = 4096 +was set buffer_size = 16384 + 0 - Front Left +Write error: -5,Input/output error +xrun_recovery failed: -5,Input/output error +Transfer failed: Input/output error + +The tegra-hda device was introduced in tegra30 but only utilized in +tegra124 until recent chips. Tegra210/186 work only due to a hardware +change. For this reason it is unknown when this issue first manifested. +Discussions with the hardware team show this applies to all current tegra +chips. It has been resolved in the tegra234, which does not have hda +support at this time. + +The explanation from the hardware team is this: +Below is the striping formula referenced from HD audio spec. + { ((num_channels * bits_per_sample) / number of SDOs) >= 8 } + +The current issue is seen because Tegra HW has a problem with boundary +condition (= 8) for striping. The reason why it is not seen on +Tegra210/Tegra186 is because it uses max 2SDO lines. Max SDO lines is +read from GCAP register. + +For the given stream (channels = 2, bps = 16); +ratio = (channels * bps) / NSDO = 32 / NSDO; + +On Tegra30, ratio = 32/4 = 8 (FAIL) +On Tegra210/186, ratio = 32/2 = 16 (PASS) +On Tegra194, ratio = 32/4 = 8 (FAIL) ==> Earlier workaround was +applied for it + +If Tegra210/186 is forced to use 4SDO, it fails there as well. So the +behavior is consistent across all these chips. + +Applying the fix in [1] universally resolves this issue on tegra30-hda. +Tested on the Ouya game console and the tf201 tablet. + +[1] commit 60019d8c650d ("ALSA: hda/tegra: workaround playback failure on +Tegra194") + +Reviewed-by: Jon Hunter +Tested-by: Ion Agorria +Reviewed-by: Sameer Pujar +Acked-by: Thierry Reding +Signed-off-by: Peter Geis +Link: https://lore.kernel.org/r/20210108135913.2421585-3-pgwipeout@gmail.com +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + sound/pci/hda/hda_tegra.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c +index 70164d1428d40..361cf2041911a 100644 +--- a/sound/pci/hda/hda_tegra.c ++++ b/sound/pci/hda/hda_tegra.c +@@ -388,7 +388,7 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev) + * in powers of 2, next available ratio is 16 which can be + * used as a limiting factor here. + */ +- if (of_device_is_compatible(np, "nvidia,tegra194-hda")) ++ if (of_device_is_compatible(np, "nvidia,tegra30-hda")) + chip->bus.core.sdo_limit = 16; + + /* codec detection */ +-- +2.27.0 + diff --git a/queue-5.10/arm64-make-atomic-helpers-__always_inline.patch b/queue-5.10/arm64-make-atomic-helpers-__always_inline.patch new file mode 100644 index 00000000000..8f7947d2b74 --- /dev/null +++ b/queue-5.10/arm64-make-atomic-helpers-__always_inline.patch @@ -0,0 +1,111 @@ +From b68a450eb993a8a37fe1d7cd410d760680445dac Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Jan 2021 10:19:56 +0100 +Subject: arm64: make atomic helpers __always_inline + +From: Arnd Bergmann + +[ Upstream commit c35a824c31834d947fb99b0c608c1b9f922b4ba0 ] + +With UBSAN enabled and building with clang, there are occasionally +warnings like + +WARNING: modpost: vmlinux.o(.text+0xc533ec): Section mismatch in reference from the function arch_atomic64_or() to the variable .init.data:numa_nodes_parsed +The function arch_atomic64_or() references +the variable __initdata numa_nodes_parsed. +This is often because arch_atomic64_or lacks a __initdata +annotation or the annotation of numa_nodes_parsed is wrong. + +for functions that end up not being inlined as intended but operating +on __initdata variables. Mark these as __always_inline, along with +the corresponding asm-generic wrappers. + +Signed-off-by: Arnd Bergmann +Acked-by: Will Deacon +Link: https://lore.kernel.org/r/20210108092024.4034860-1-arnd@kernel.org +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/atomic.h | 10 +++++----- + include/asm-generic/bitops/atomic.h | 6 +++--- + 2 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/include/asm/atomic.h b/arch/arm64/include/asm/atomic.h +index 015ddffaf6caa..b56a4b2bc2486 100644 +--- a/arch/arm64/include/asm/atomic.h ++++ b/arch/arm64/include/asm/atomic.h +@@ -17,7 +17,7 @@ + #include + + #define ATOMIC_OP(op) \ +-static inline void arch_##op(int i, atomic_t *v) \ ++static __always_inline void arch_##op(int i, atomic_t *v) \ + { \ + __lse_ll_sc_body(op, i, v); \ + } +@@ -32,7 +32,7 @@ ATOMIC_OP(atomic_sub) + #undef ATOMIC_OP + + #define ATOMIC_FETCH_OP(name, op) \ +-static inline int arch_##op##name(int i, atomic_t *v) \ ++static __always_inline int arch_##op##name(int i, atomic_t *v) \ + { \ + return __lse_ll_sc_body(op##name, i, v); \ + } +@@ -56,7 +56,7 @@ ATOMIC_FETCH_OPS(atomic_sub_return) + #undef ATOMIC_FETCH_OPS + + #define ATOMIC64_OP(op) \ +-static inline void arch_##op(long i, atomic64_t *v) \ ++static __always_inline void arch_##op(long i, atomic64_t *v) \ + { \ + __lse_ll_sc_body(op, i, v); \ + } +@@ -71,7 +71,7 @@ ATOMIC64_OP(atomic64_sub) + #undef ATOMIC64_OP + + #define ATOMIC64_FETCH_OP(name, op) \ +-static inline long arch_##op##name(long i, atomic64_t *v) \ ++static __always_inline long arch_##op##name(long i, atomic64_t *v) \ + { \ + return __lse_ll_sc_body(op##name, i, v); \ + } +@@ -94,7 +94,7 @@ ATOMIC64_FETCH_OPS(atomic64_sub_return) + #undef ATOMIC64_FETCH_OP + #undef ATOMIC64_FETCH_OPS + +-static inline long arch_atomic64_dec_if_positive(atomic64_t *v) ++static __always_inline long arch_atomic64_dec_if_positive(atomic64_t *v) + { + return __lse_ll_sc_body(atomic64_dec_if_positive, v); + } +diff --git a/include/asm-generic/bitops/atomic.h b/include/asm-generic/bitops/atomic.h +index dd90c9792909d..0e7316a86240b 100644 +--- a/include/asm-generic/bitops/atomic.h ++++ b/include/asm-generic/bitops/atomic.h +@@ -11,19 +11,19 @@ + * See Documentation/atomic_bitops.txt for details. + */ + +-static inline void set_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void set_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p); + } + +-static inline void clear_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void clear_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p); + } + +-static inline void change_bit(unsigned int nr, volatile unsigned long *p) ++static __always_inline void change_bit(unsigned int nr, volatile unsigned long *p) + { + p += BIT_WORD(nr); + atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p); +-- +2.27.0 + diff --git a/queue-5.10/asoc-intel-haswell-add-missing-pm_ops.patch b/queue-5.10/asoc-intel-haswell-add-missing-pm_ops.patch new file mode 100644 index 00000000000..37d22754207 --- /dev/null +++ b/queue-5.10/asoc-intel-haswell-add-missing-pm_ops.patch @@ -0,0 +1,36 @@ +From bea53f38db00c34118ca36bb06766318322b06cb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Dec 2020 11:54:01 +0100 +Subject: ASoC: Intel: haswell: Add missing pm_ops + +From: Cezary Rojewski + +[ Upstream commit bb224c3e3e41d940612d4cc9573289cdbd5cb8f5 ] + +haswell machine board is missing pm_ops what prevents it from undergoing +suspend-resume procedure successfully. Assign default snd_soc_pm_ops so +this is no longer the case. + +Signed-off-by: Cezary Rojewski +Link: https://lore.kernel.org/r/20201217105401.27865-1-cezary.rojewski@intel.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/intel/boards/haswell.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/soc/intel/boards/haswell.c b/sound/soc/intel/boards/haswell.c +index c55d1239e705b..c763bfeb1f38f 100644 +--- a/sound/soc/intel/boards/haswell.c ++++ b/sound/soc/intel/boards/haswell.c +@@ -189,6 +189,7 @@ static struct platform_driver haswell_audio = { + .probe = haswell_audio_probe, + .driver = { + .name = "haswell-audio", ++ .pm = &snd_soc_pm_ops, + }, + }; + +-- +2.27.0 + diff --git a/queue-5.10/asoc-rt711-mutex-between-calibration-and-power-state.patch b/queue-5.10/asoc-rt711-mutex-between-calibration-and-power-state.patch new file mode 100644 index 00000000000..fed718d19a8 --- /dev/null +++ b/queue-5.10/asoc-rt711-mutex-between-calibration-and-power-state.patch @@ -0,0 +1,56 @@ +From 328a4d2edab7a24bfaf27f9bb1d94eea40a43537 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Dec 2020 16:56:51 +0800 +Subject: ASoC: rt711: mutex between calibration and power state changes + +From: Shuming Fan + +[ Upstream commit 6108f990c0887d3e8f1db2d13c7012e40a061f28 ] + +To avoid calibration time-out, this patch adds the mutex between calibration and power state changes + +Signed-off-by: Shuming Fan +Link: https://lore.kernel.org/r/20201217085651.24580-1-shumingf@realtek.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/rt711.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/sound/soc/codecs/rt711.c b/sound/soc/codecs/rt711.c +index 65b59dbfb43c8..a9b1b4180c471 100644 +--- a/sound/soc/codecs/rt711.c ++++ b/sound/soc/codecs/rt711.c +@@ -462,6 +462,8 @@ static int rt711_set_amp_gain_put(struct snd_kcontrol *kcontrol, + unsigned int read_ll, read_rl; + int i; + ++ mutex_lock(&rt711->calibrate_mutex); ++ + /* Can't use update bit function, so read the original value first */ + addr_h = mc->reg; + addr_l = mc->rreg; +@@ -547,6 +549,8 @@ static int rt711_set_amp_gain_put(struct snd_kcontrol *kcontrol, + if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) + regmap_write(rt711->regmap, + RT711_SET_AUDIO_POWER_STATE, AC_PWRST_D3); ++ ++ mutex_unlock(&rt711->calibrate_mutex); + return 0; + } + +@@ -859,9 +863,11 @@ static int rt711_set_bias_level(struct snd_soc_component *component, + break; + + case SND_SOC_BIAS_STANDBY: ++ mutex_lock(&rt711->calibrate_mutex); + regmap_write(rt711->regmap, + RT711_SET_AUDIO_POWER_STATE, + AC_PWRST_D3); ++ mutex_unlock(&rt711->calibrate_mutex); + break; + + default: +-- +2.27.0 + diff --git a/queue-5.10/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch b/queue-5.10/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch new file mode 100644 index 00000000000..9e452d0e727 --- /dev/null +++ b/queue-5.10/clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch @@ -0,0 +1,43 @@ +From fd9afbb446e9904841c03a787fc6719015149ab4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 8 Jan 2021 13:59:12 +0000 +Subject: clk: tegra30: Add hda clock default rates to clock driver + +From: Peter Geis + +[ Upstream commit f4eccc7fea203cfb35205891eced1ab51836f362 ] + +Current implementation defaults the hda clocks to clk_m. This causes hda +to run too slow to operate correctly. Fix this by defaulting to pll_p and +setting the frequency to the correct rate. + +This matches upstream t124 and downstream t30. + +Acked-by: Jon Hunter +Tested-by: Ion Agorria +Acked-by: Sameer Pujar +Acked-by: Thierry Reding +Signed-off-by: Peter Geis +Link: https://lore.kernel.org/r/20210108135913.2421585-2-pgwipeout@gmail.com +Signed-off-by: Takashi Iwai +Signed-off-by: Sasha Levin +--- + drivers/clk/tegra/clk-tegra30.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c +index 37244a7e68c22..9cf249c344d9e 100644 +--- a/drivers/clk/tegra/clk-tegra30.c ++++ b/drivers/clk/tegra/clk-tegra30.c +@@ -1256,6 +1256,8 @@ static struct tegra_clk_init_table init_table[] __initdata = { + { TEGRA30_CLK_I2S3_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, + { TEGRA30_CLK_I2S4_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, + { TEGRA30_CLK_VIMCLK_SYNC, TEGRA30_CLK_CLK_MAX, 24000000, 0 }, ++ { TEGRA30_CLK_HDA, TEGRA30_CLK_PLL_P, 102000000, 0 }, ++ { TEGRA30_CLK_HDA2CODEC_2X, TEGRA30_CLK_PLL_P, 48000000, 0 }, + /* must be the last entry */ + { TEGRA30_CLK_CLK_MAX, TEGRA30_CLK_CLK_MAX, 0, 0 }, + }; +-- +2.27.0 + diff --git a/queue-5.10/dm-integrity-select-crypto_skcipher.patch b/queue-5.10/dm-integrity-select-crypto_skcipher.patch new file mode 100644 index 00000000000..ee0c66d7e08 --- /dev/null +++ b/queue-5.10/dm-integrity-select-crypto_skcipher.patch @@ -0,0 +1,37 @@ +From d8113521a0120c473d80290d01da9ae5e027774e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 14 Dec 2020 18:18:11 +0100 +Subject: dm integrity: select CRYPTO_SKCIPHER + +From: Anthony Iliopoulos + +[ Upstream commit f7b347acb5f6c29d9229bb64893d8b6a2c7949fb ] + +The integrity target relies on skcipher for encryption/decryption, but +certain kernel configurations may not enable CRYPTO_SKCIPHER, leading to +compilation errors due to unresolved symbols. Explicitly select +CRYPTO_SKCIPHER for DM_INTEGRITY, since it is unconditionally dependent +on it. + +Signed-off-by: Anthony Iliopoulos +Signed-off-by: Mike Snitzer +Signed-off-by: Sasha Levin +--- + drivers/md/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/md/Kconfig b/drivers/md/Kconfig +index 0e04d3718af3c..2cefb075b2b84 100644 +--- a/drivers/md/Kconfig ++++ b/drivers/md/Kconfig +@@ -585,6 +585,7 @@ config DM_INTEGRITY + select BLK_DEV_INTEGRITY + select DM_BUFIO + select CRYPTO ++ select CRYPTO_SKCIPHER + select ASYNC_XOR + help + This device-mapper target emulates a block device that has +-- +2.27.0 + diff --git a/queue-5.10/drm-amd-display-disable-dcn10-pipe-split-by-default.patch b/queue-5.10/drm-amd-display-disable-dcn10-pipe-split-by-default.patch new file mode 100644 index 00000000000..b67b9991882 --- /dev/null +++ b/queue-5.10/drm-amd-display-disable-dcn10-pipe-split-by-default.patch @@ -0,0 +1,49 @@ +From 1fc8e1d7638f125f8f498fc55219c6ef32df4a91 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Dec 2020 18:03:02 +0000 +Subject: drm/amd/display: disable dcn10 pipe split by default + +From: Li, Roman + +[ Upstream commit 9d03bb102028b4a3f4a64d6069b219e2e1c1f306 ] + +[Why] +The initial purpose of dcn10 pipe split is to support some high +bandwidth mode which requires dispclk greater than max dispclk. By +initial bring up power measurement data, it showed power consumption is +less with pipe split for dcn block. This could be reason for enable pipe +split by default. By battery life measurement of some Chromebooks, +result shows battery life is longer with pipe split disabled. + +[How] +Disable pipe split by default. Pipe split could be still enabled when +required dispclk is greater than max dispclk. + +Tested-by: Daniel Wheeler +Signed-off-by: Hersen Wu +Signed-off-by: Roman Li +Reviewed-by: Roman Li +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +index 462d3d981ea5e..0a01be38ee1b8 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +@@ -608,8 +608,8 @@ static const struct dc_debug_options debug_defaults_drv = { + .disable_pplib_clock_request = false, + .disable_pplib_wm_range = false, + .pplib_wm_report_mode = WM_REPORT_DEFAULT, +- .pipe_split_policy = MPC_SPLIT_DYNAMIC, +- .force_single_disp_pipe_split = true, ++ .pipe_split_policy = MPC_SPLIT_AVOID, ++ .force_single_disp_pipe_split = false, + .disable_dcc = DCC_ENABLE, + .voltage_align_fclk = true, + .disable_stereo_support = true, +-- +2.27.0 + diff --git a/queue-5.10/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch b/queue-5.10/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch new file mode 100644 index 00000000000..dd6894c7029 --- /dev/null +++ b/queue-5.10/drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch @@ -0,0 +1,46 @@ +From ad04eb024bfabd218b2f3bb6f7a5b0a584c78d24 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 24 Nov 2020 19:57:03 +0800 +Subject: drm/amd/display: Fix to be able to stop crc calculation + +From: Wayne Lin + +[ Upstream commit 02ce73b01e09e388614b22b7ebc71debf4a588f0 ] + +[Why] +Find out when we try to disable CRC calculation, +crc generation is still enabled. Main reason is +that dc_stream_configure_crc() will never get +called when the source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE. + +[How] +Add checking condition that when source is +AMDGPU_DM_PIPE_CRC_SOURCE_NONE, we should also call +dc_stream_configure_crc() to disable crc calculation. +Also, clean up crc window when disable crc calculation. + +Signed-off-by: Wayne Lin +Reviewed-by: Nicholas Kazlauskas +Acked-by: Qingqing Zhuo +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +index d0699e98db929..e00a30e7d2529 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +@@ -113,7 +113,7 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, + mutex_lock(&adev->dm.dc_lock); + + /* Enable CRTC CRC generation if necessary. */ +- if (dm_is_crc_source_crtc(source)) { ++ if (dm_is_crc_source_crtc(source) || source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) { + if (!dc_stream_configure_crc(stream_state->ctx->dc, + stream_state, enable, enable)) { + ret = -EINVAL; +-- +2.27.0 + diff --git a/queue-5.10/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch b/queue-5.10/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch new file mode 100644 index 00000000000..97883a247f9 --- /dev/null +++ b/queue-5.10/drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch @@ -0,0 +1,38 @@ +From 1e48f4f75aea8714e5f014b3d493e1728f923f2f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 5 Jan 2021 15:04:01 +0800 +Subject: drm/amdgpu/psp: fix psp gfx ctrl cmds + +From: Victor Zhao + +[ Upstream commit f14a5c34d143f6627f0be70c0de1d962f3a6ff1c ] + +psp GFX_CTRL_CMD_ID_CONSUME_CMD different for windows and linux, +according to psp, linux cmds are not correct. + +v2: only correct GFX_CTRL_CMD_ID_CONSUME_CMD. + +Signed-off-by: Victor Zhao +Reviewed-by: Emily.Deng +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h +index 4137dc710aafd..7ad0434be293b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h ++++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h +@@ -47,7 +47,7 @@ enum psp_gfx_crtl_cmd_id + GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */ + GFX_CTRL_CMD_ID_MODE1_RST = 0x00070000, /* trigger the Mode 1 reset */ + GFX_CTRL_CMD_ID_GBR_IH_SET = 0x00080000, /* set Gbr IH_RB_CNTL registers */ +- GFX_CTRL_CMD_ID_CONSUME_CMD = 0x000A0000, /* send interrupt to psp for updating write pointer of vf */ ++ GFX_CTRL_CMD_ID_CONSUME_CMD = 0x00090000, /* send interrupt to psp for updating write pointer of vf */ + GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING = 0x000C0000, /* destroy GPCOM ring */ + + GFX_CTRL_CMD_ID_MAX = 0x000F0000, /* max command ID */ +-- +2.27.0 + diff --git a/queue-5.10/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch b/queue-5.10/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch new file mode 100644 index 00000000000..27af06b6d80 --- /dev/null +++ b/queue-5.10/drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch @@ -0,0 +1,50 @@ +From e56b2a4896d960908dc664b996d83b69ef46df8e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/bios: fix issue shadowing expansion ROMs + +From: Ben Skeggs + +[ Upstream commit 402a89660e9dc880710b12773076a336c9dab3d7 ] + +This issue has generally been covered up by the presence of additional +expansion ROMs after the ones we're interested in, with header fetches +of subsequent images loading enough of the ROM to hide the issue. + +Noticed on GA102, which lacks a type 0x70 image compared to TU102,. + +[ 906.364197] nouveau 0000:09:00.0: bios: 00000000: type 00, 65024 bytes +[ 906.381205] nouveau 0000:09:00.0: bios: 0000fe00: type 03, 91648 bytes +[ 906.405213] nouveau 0000:09:00.0: bios: 00026400: type e0, 22016 bytes +[ 906.410984] nouveau 0000:09:00.0: bios: 0002ba00: type e0, 366080 bytes + +vs + +[ 22.961901] nouveau 0000:09:00.0: bios: 00000000: type 00, 60416 bytes +[ 22.984174] nouveau 0000:09:00.0: bios: 0000ec00: type 03, 71168 bytes +[ 23.010446] nouveau 0000:09:00.0: bios: 00020200: type e0, 48128 bytes +[ 23.028220] nouveau 0000:09:00.0: bios: 0002be00: type e0, 140800 bytes +[ 23.080196] nouveau 0000:09:00.0: bios: 0004e400: type 70, 7168 bytes + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +index 7deb81b6dbac6..4b571cc6bc70f 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +@@ -75,7 +75,7 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) + nvkm_debug(subdev, "%08x: type %02x, %d bytes\n", + image.base, image.type, image.size); + +- if (!shadow_fetch(bios, mthd, image.size)) { ++ if (!shadow_fetch(bios, mthd, image.base + image.size)) { + nvkm_debug(subdev, "%08x: fetch failed\n", image.base); + return 0; + } +-- +2.27.0 + diff --git a/queue-5.10/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch b/queue-5.10/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch new file mode 100644 index 00000000000..db6f982defd --- /dev/null +++ b/queue-5.10/drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch @@ -0,0 +1,55 @@ +From 0cf7318e984934d457582e4f6266c8a60d34d59e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/i2c/gm200: increase width of aux semaphore owner fields + +From: Ben Skeggs + +[ Upstream commit ba6e9ab0fcf3d76e3952deb12b5f993991621d9c ] + +Noticed while debugging GA102. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +index edb6148cbca04..d0e80ad526845 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +@@ -33,7 +33,7 @@ static void + gm200_i2c_aux_fini(struct gm200_i2c_aux *aux) + { + struct nvkm_device *device = aux->base.pad->i2c->subdev.device; +- nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00310000, 0x00000000); ++ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00710000, 0x00000000); + } + + static int +@@ -54,10 +54,10 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) + AUX_ERR(&aux->base, "begin idle timeout %08x", ctrl); + return -EBUSY; + } +- } while (ctrl & 0x03010000); ++ } while (ctrl & 0x07010000); + + /* set some magic, and wait up to 1ms for it to appear */ +- nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00300000, ureq); ++ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00700000, ureq); + timeout = 1000; + do { + ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50)); +@@ -67,7 +67,7 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) + gm200_i2c_aux_fini(aux); + return -EBUSY; + } +- } while ((ctrl & 0x03000000) != urep); ++ } while ((ctrl & 0x07000000) != urep); + + return 0; + } +-- +2.27.0 + diff --git a/queue-5.10/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch b/queue-5.10/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch new file mode 100644 index 00000000000..fe2847d74d9 --- /dev/null +++ b/queue-5.10/drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch @@ -0,0 +1,70 @@ +From 7d84492886dd5ed51364b27fae034d1226da999f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/kms/nv50-: fix case where notifier buffer is at offset 0 + +From: Ben Skeggs + +[ Upstream commit caeb6ab899c3d36a74cda6e299c6e1c9c4e2a22e ] + +VRAM offset 0 is a valid address, triggered on GA102. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/dispnv50/disp.c | 4 ++-- + drivers/gpu/drm/nouveau/dispnv50/disp.h | 2 +- + drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c | 2 +- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c +index 36d6b6093d16d..5b8cabb099eb1 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c +@@ -221,7 +221,7 @@ nv50_dmac_wait(struct nvif_push *push, u32 size) + + int + nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, +- const s32 *oclass, u8 head, void *data, u32 size, u64 syncbuf, ++ const s32 *oclass, u8 head, void *data, u32 size, s64 syncbuf, + struct nv50_dmac *dmac) + { + struct nouveau_cli *cli = (void *)device->object.client; +@@ -270,7 +270,7 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, + if (ret) + return ret; + +- if (!syncbuf) ++ if (syncbuf < 0) + return 0; + + ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF, +diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.h b/drivers/gpu/drm/nouveau/dispnv50/disp.h +index 92bddc0836171..38dec11e7dda5 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/disp.h ++++ b/drivers/gpu/drm/nouveau/dispnv50/disp.h +@@ -95,7 +95,7 @@ struct nv50_outp_atom { + + int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, + const s32 *oclass, u8 head, void *data, u32 size, +- u64 syncbuf, struct nv50_dmac *dmac); ++ s64 syncbuf, struct nv50_dmac *dmac); + void nv50_dmac_destroy(struct nv50_dmac *); + + /* +diff --git a/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c b/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c +index 685b708713242..b390029c69ec1 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c +@@ -76,7 +76,7 @@ wimmc37b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm, + int ret; + + ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, +- &oclass, 0, &args, sizeof(args), 0, ++ &oclass, 0, &args, sizeof(args), -1, + &wndw->wimm); + if (ret) { + NV_ERROR(drm, "wimm%04x allocation failed: %d\n", oclass, ret); +-- +2.27.0 + diff --git a/queue-5.10/drm-nouveau-mmu-fix-vram-heap-sizing.patch b/queue-5.10/drm-nouveau-mmu-fix-vram-heap-sizing.patch new file mode 100644 index 00000000000..96375d7e1a8 --- /dev/null +++ b/queue-5.10/drm-nouveau-mmu-fix-vram-heap-sizing.patch @@ -0,0 +1,35 @@ +From 467b7654903de5ca5b8a2e10fd4e23ef6f957661 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/mmu: fix vram heap sizing + +From: Ben Skeggs + +[ Upstream commit add42781ad76c5ae65127bf13852a4c6b2f08849 ] + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +index de91e9a261725..6d5212ae2fd57 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +@@ -316,9 +316,9 @@ nvkm_mmu_vram(struct nvkm_mmu *mmu) + { + struct nvkm_device *device = mmu->subdev.device; + struct nvkm_mm *mm = &device->fb->ram->vram; +- const u32 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL); +- const u32 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP); +- const u32 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED); ++ const u64 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL); ++ const u64 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP); ++ const u64 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED); + u8 type = NVKM_MEM_KIND * !!mmu->func->kind; + u8 heap = NVKM_MEM_VRAM; + int heapM, heapN, heapU; +-- +2.27.0 + diff --git a/queue-5.10/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch b/queue-5.10/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch new file mode 100644 index 00000000000..bc2686556ad --- /dev/null +++ b/queue-5.10/drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch @@ -0,0 +1,119 @@ +From 7d0c822c19c9631e8f05c58108b293c31cc12e94 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 17:12:52 +1000 +Subject: drm/nouveau/privring: ack interrupts the same way as RM + +From: Ben Skeggs + +[ Upstream commit e05e06cd34f5311f677294a08b609acfbc315236 ] + +Whatever it is that we were doing before doesn't work on Ampere. + +Signed-off-by: Ben Skeggs +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c | 10 +++++++--- + drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c | 10 +++++++--- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +index 2340040942c93..1115376bc85f5 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +@@ -22,6 +22,7 @@ + * Authors: Ben Skeggs + */ + #include "priv.h" ++#include + + static void + gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) +@@ -31,7 +32,6 @@ gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400)); + nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + static void +@@ -42,7 +42,6 @@ gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400)); + nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + static void +@@ -53,7 +52,6 @@ gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400)); + nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000); + } + + void +@@ -90,6 +88,12 @@ gf100_ibus_intr(struct nvkm_subdev *ibus) + intr1 &= ~stat; + } + } ++ ++ nvkm_mask(device, 0x121c4c, 0x0000003f, 0x00000002); ++ nvkm_msec(device, 2000, ++ if (!(nvkm_rd32(device, 0x121c4c) & 0x0000003f)) ++ break; ++ ); + } + + static int +diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +index f3915f85838ed..22e487b493ad1 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +@@ -22,6 +22,7 @@ + * Authors: Ben Skeggs + */ + #include "priv.h" ++#include + + static void + gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) +@@ -31,7 +32,6 @@ gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800)); + nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + static void +@@ -42,7 +42,6 @@ gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800)); + nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + static void +@@ -53,7 +52,6 @@ gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800)); + nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +- nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000); + } + + void +@@ -90,6 +88,12 @@ gk104_ibus_intr(struct nvkm_subdev *ibus) + intr1 &= ~stat; + } + } ++ ++ nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002); ++ nvkm_msec(device, 2000, ++ if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) ++ break; ++ ); + } + + static int +-- +2.27.0 + diff --git a/queue-5.10/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch b/queue-5.10/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch new file mode 100644 index 00000000000..ced0f649af6 --- /dev/null +++ b/queue-5.10/dts-phy-add-gpio-number-and-active-state-used-for-ph.patch @@ -0,0 +1,35 @@ +From 2ff3be5d91c780507c9ba81be68c38496cb91e8b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:11 -0800 +Subject: dts: phy: add GPIO number and active state used for phy reset + +From: Sagar Shrikant Kadam + +[ Upstream commit a0fa9d727043da2238432471e85de0bdb8a8df65 ] + +The GEMGXL_RST line on HiFive Unleashed is pulled low and is +using GPIO number 12. Add these reset-gpio details to dt-node +using which the linux phylib can reset the phy. + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +index 60846e88ae4b1..24d75a146e02d 100644 +--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts ++++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +@@ -90,6 +90,7 @@ + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.0771"; + reg = <0>; ++ reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + }; + +-- +2.27.0 + diff --git a/queue-5.10/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch b/queue-5.10/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch new file mode 100644 index 00000000000..0a253f88dbd --- /dev/null +++ b/queue-5.10/dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch @@ -0,0 +1,53 @@ +From 78e90c9ce390af6925576c56e8edc61fb1681d59 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:10 -0800 +Subject: dts: phy: fix missing mdio device and probe failure of vsc8541-01 + device + +From: Sagar Shrikant Kadam + +[ Upstream commit be969b7cfbcfa8a835a528f1dc467f0975c6d883 ] + +HiFive unleashed A00 board has VSC8541-01 ethernet phy, this device is +identified as a Revision B device as described in device identification +registers. In order to use this phy in the unmanaged mode, it requires +a specific reset sequence of logical 0-1-0-1 transition on the NRESET pin +as documented here [1]. + +Currently, the bootloader (fsbl or u-boot-spl) takes care of the phy reset. +If due to some reason the phy device hasn't received the reset by the prior +stages before the linux macb driver comes into the picture, the MACB mii +bus gets probed but the mdio scan fails and is not even able to read the +phy ID registers. It gives an error message: + +"libphy: MACB_mii_bus: probed +mdio_bus 10090000.ethernet-ffffffff: MDIO device at address 0 is missing." + +Thus adding the device OUI (Organizationally Unique Identifier) to the phy +device node helps to probe the phy device. + +[1]: VSC8541-01 datasheet: +https://www.mouser.com/ds/2/523/Microsemi_VSC8541-01_Datasheet_10496_V40-1148034.pdf + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +index 4a2729f5ca3f0..60846e88ae4b1 100644 +--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts ++++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +@@ -88,6 +88,7 @@ + phy-mode = "gmii"; + phy-handle = <&phy0>; + phy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0007.0771"; + reg = <0>; + }; + }; +-- +2.27.0 + diff --git a/queue-5.10/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch b/queue-5.10/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch new file mode 100644 index 00000000000..db5ed438548 --- /dev/null +++ b/queue-5.10/hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch @@ -0,0 +1,49 @@ +From 713fa0815d9fce1f842bd37679157e65271f670f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Jan 2021 22:58:12 -0600 +Subject: HID: Ignore battery for Elan touchscreen on ASUS UX550 + +From: Seth Miller + +[ Upstream commit 7c38e769d5c508939ce5dc26df72602f3c902342 ] + +Battery status is being reported for the Elan touchscreen on ASUS +UX550 laptops despite not having a batter. It always shows either 0 or +1%. + +Signed-off-by: Seth Miller +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-ids.h | 1 + + drivers/hid/hid-input.c | 2 ++ + 2 files changed, 3 insertions(+) + +diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h +index f170feaac40ba..94180c63571ed 100644 +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -387,6 +387,7 @@ + #define USB_DEVICE_ID_TOSHIBA_CLICK_L9W 0x0401 + #define USB_DEVICE_ID_HP_X2 0x074d + #define USB_DEVICE_ID_HP_X2_10_COVER 0x0755 ++#define USB_DEVICE_ID_ASUS_UX550_TOUCHSCREEN 0x2706 + + #define USB_VENDOR_ID_ELECOM 0x056e + #define USB_DEVICE_ID_ELECOM_BM084 0x0061 +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index 4dca113924593..32024905fd70f 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -322,6 +322,8 @@ static const struct hid_device_id hid_battery_quirks[] = { + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_DINOVO_EDGE_KBD), + HID_BATTERY_QUIRK_IGNORE }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_ELAN, USB_DEVICE_ID_ASUS_UX550_TOUCHSCREEN), ++ HID_BATTERY_QUIRK_IGNORE }, + {} + }; + +-- +2.27.0 + diff --git a/queue-5.10/hid-logitech-dj-add-the-g602-receiver.patch b/queue-5.10/hid-logitech-dj-add-the-g602-receiver.patch new file mode 100644 index 00000000000..b47795ead31 --- /dev/null +++ b/queue-5.10/hid-logitech-dj-add-the-g602-receiver.patch @@ -0,0 +1,40 @@ +From a1d8e3783b59ae1ec3394d31d2572cca53227487 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Jan 2021 20:47:17 +0000 +Subject: HID: logitech-dj: add the G602 receiver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Filipe Laíns + +[ Upstream commit e400071a805d6229223a98899e9da8c6233704a1 ] + +Tested. The device gets correctly exported to userspace and I can see +mouse and keyboard events. + +Signed-off-by: Filipe Laíns +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-logitech-dj.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c +index 1ffcfc9a1e033..45e7e0bdd382b 100644 +--- a/drivers/hid/hid-logitech-dj.c ++++ b/drivers/hid/hid-logitech-dj.c +@@ -1869,6 +1869,10 @@ static const struct hid_device_id logi_dj_receivers[] = { + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + 0xc531), + .driver_data = recvr_type_gaming_hidpp}, ++ { /* Logitech G602 receiver (0xc537) */ ++ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, ++ 0xc537), ++ .driver_data = recvr_type_gaming_hidpp}, + { /* Logitech lightspeed receiver (0xc539) */ + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1), +-- +2.27.0 + diff --git a/queue-5.10/hid-logitech-hidpp-add-product-id-for-mx-ergo-in-blu.patch b/queue-5.10/hid-logitech-hidpp-add-product-id-for-mx-ergo-in-blu.patch new file mode 100644 index 00000000000..c20d297c729 --- /dev/null +++ b/queue-5.10/hid-logitech-hidpp-add-product-id-for-mx-ergo-in-blu.patch @@ -0,0 +1,39 @@ +From 4c26d0ae2669ddea73b39414303ab7c485ce1495 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 10 Jan 2021 22:09:25 -0800 +Subject: HID: logitech-hidpp: Add product ID for MX Ergo in Bluetooth mode + +From: Nicholas Miell + +[ Upstream commit 7de843dbaaa68aa514090e6226ed7c6374fd7e49 ] + +The Logitech MX Ergo trackball supports HID++ 4.5 over Bluetooth. Add its +product ID to the table so we can get battery monitoring support. +(The hid-logitech-hidpp driver already recognizes it when connected via +a Unifying Receiver.) + +[jkosina@suse.cz: fix whitespace damage] +Signed-off-by: Nicholas Miell +Reviewed-by: Hans de Goede +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-logitech-hidpp.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c +index 0ca7231195473..74ebfb12c360e 100644 +--- a/drivers/hid/hid-logitech-hidpp.c ++++ b/drivers/hid/hid-logitech-hidpp.c +@@ -4051,6 +4051,8 @@ static const struct hid_device_id hidpp_devices[] = { + { /* MX Master mouse over Bluetooth */ + HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb012), + .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 }, ++ { /* MX Ergo trackball over Bluetooth */ ++ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb01d) }, + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb01e), + .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 }, + { /* MX Master 3 mouse over Bluetooth */ +-- +2.27.0 + diff --git a/queue-5.10/hid-multitouch-enable-multi-input-for-synaptics-poin.patch b/queue-5.10/hid-multitouch-enable-multi-input-for-synaptics-poin.patch new file mode 100644 index 00000000000..f784f8415bc --- /dev/null +++ b/queue-5.10/hid-multitouch-enable-multi-input-for-synaptics-poin.patch @@ -0,0 +1,38 @@ +From 0a8d65214fadf396f5c89a6c5e68c5157fac7ad8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Dec 2020 20:44:07 +0800 +Subject: HID: multitouch: Enable multi-input for Synaptics pointstick/touchpad + device + +From: Kai-Heng Feng + +[ Upstream commit c3d6eb6e54373f297313b65c1f2319d36914d579 ] + +Pointstick and its left/right buttons on HP EliteBook 850 G7 need +multi-input quirk to work correctly. + +Signed-off-by: Kai-Heng Feng +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/hid-multitouch.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index d670bcd57bdef..0743ef51d3b24 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -2054,6 +2054,10 @@ static const struct hid_device_id mt_devices[] = { + HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, + USB_VENDOR_ID_SYNAPTICS, 0xce08) }, + ++ { .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT, ++ HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8, ++ USB_VENDOR_ID_SYNAPTICS, 0xce09) }, ++ + /* TopSeed panels */ + { .driver_data = MT_CLS_TOPSEED, + MT_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, +-- +2.27.0 + diff --git a/queue-5.10/hid-sony-select-config_crc32.patch b/queue-5.10/hid-sony-select-config_crc32.patch new file mode 100644 index 00000000000..c3abc689f3b --- /dev/null +++ b/queue-5.10/hid-sony-select-config_crc32.patch @@ -0,0 +1,38 @@ +From da1242a5c9abae8c6d543925428789c0528814a2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 3 Jan 2021 22:41:44 +0100 +Subject: HID: sony: select CONFIG_CRC32 + +From: Arnd Bergmann + +[ Upstream commit 273435a1d4e5826f039625c23ba4fe9a09f24d75 ] + +Without crc32 support, this driver fails to link: + +arm-linux-gnueabi-ld: drivers/hid/hid-sony.o: in function `sony_raw_event': +hid-sony.c:(.text+0x8f4): undefined reference to `crc32_le' +arm-linux-gnueabi-ld: hid-sony.c:(.text+0x900): undefined reference to `crc32_le' +arm-linux-gnueabi-ld: drivers/hid/hid-sony.o:hid-sony.c:(.text+0x4408): more undefined references to `crc32_le' follow + +Signed-off-by: Arnd Bergmann +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +--- + drivers/hid/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig +index 612629678c845..9b56226ce0d1c 100644 +--- a/drivers/hid/Kconfig ++++ b/drivers/hid/Kconfig +@@ -899,6 +899,7 @@ config HID_SONY + depends on NEW_LEDS + depends on LEDS_CLASS + select POWER_SUPPLY ++ select CRC32 + help + Support for + +-- +2.27.0 + diff --git a/queue-5.10/io_uring-flush-timeouts-that-should-already-have-exp.patch b/queue-5.10/io_uring-flush-timeouts-that-should-already-have-exp.patch new file mode 100644 index 00000000000..a850c676deb --- /dev/null +++ b/queue-5.10/io_uring-flush-timeouts-that-should-already-have-exp.patch @@ -0,0 +1,96 @@ +From f98ba3b629ee06080a399afc77128f8665a26291 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 15 Jan 2021 11:54:40 -0500 +Subject: io_uring: flush timeouts that should already have expired + +From: Marcelo Diop-Gonzalez + +[ Upstream commit f010505b78a4fa8d5b6480752566e7313fb5ca6e ] + +Right now io_flush_timeouts() checks if the current number of events +is equal to ->timeout.target_seq, but this will miss some timeouts if +there have been more than 1 event added since the last time they were +flushed (possible in io_submit_flush_completions(), for example). Fix +it by recording the last sequence at which timeouts were flushed so +that the number of events seen can be compared to the number of events +needed without overflow. + +Signed-off-by: Marcelo Diop-Gonzalez +Reviewed-by: Pavel Begunkov +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + fs/io_uring.c | 34 ++++++++++++++++++++++++++++++---- + 1 file changed, 30 insertions(+), 4 deletions(-) + +diff --git a/fs/io_uring.c b/fs/io_uring.c +index 265aea2cd7bc8..2348104857000 100644 +--- a/fs/io_uring.c ++++ b/fs/io_uring.c +@@ -353,6 +353,7 @@ struct io_ring_ctx { + unsigned cq_entries; + unsigned cq_mask; + atomic_t cq_timeouts; ++ unsigned cq_last_tm_flush; + unsigned long cq_check_overflow; + struct wait_queue_head cq_wait; + struct fasync_struct *cq_fasync; +@@ -1521,19 +1522,38 @@ static void __io_queue_deferred(struct io_ring_ctx *ctx) + + static void io_flush_timeouts(struct io_ring_ctx *ctx) + { +- while (!list_empty(&ctx->timeout_list)) { ++ u32 seq; ++ ++ if (list_empty(&ctx->timeout_list)) ++ return; ++ ++ seq = ctx->cached_cq_tail - atomic_read(&ctx->cq_timeouts); ++ ++ do { ++ u32 events_needed, events_got; + struct io_kiocb *req = list_first_entry(&ctx->timeout_list, + struct io_kiocb, timeout.list); + + if (io_is_timeout_noseq(req)) + break; +- if (req->timeout.target_seq != ctx->cached_cq_tail +- - atomic_read(&ctx->cq_timeouts)) ++ ++ /* ++ * Since seq can easily wrap around over time, subtract ++ * the last seq at which timeouts were flushed before comparing. ++ * Assuming not more than 2^31-1 events have happened since, ++ * these subtractions won't have wrapped, so we can check if ++ * target is in [last_seq, current_seq] by comparing the two. ++ */ ++ events_needed = req->timeout.target_seq - ctx->cq_last_tm_flush; ++ events_got = seq - ctx->cq_last_tm_flush; ++ if (events_got < events_needed) + break; + + list_del_init(&req->timeout.list); + io_kill_timeout(req); +- } ++ } while (!list_empty(&ctx->timeout_list)); ++ ++ ctx->cq_last_tm_flush = seq; + } + + static void io_commit_cqring(struct io_ring_ctx *ctx) +@@ -5582,6 +5602,12 @@ static int io_timeout(struct io_kiocb *req) + tail = ctx->cached_cq_tail - atomic_read(&ctx->cq_timeouts); + req->timeout.target_seq = tail + off; + ++ /* Update the last seq here in case io_flush_timeouts() hasn't. ++ * This is safe because ->completion_lock is held, and submissions ++ * and completions are never mixed in the same ->completion_lock section. ++ */ ++ ctx->cq_last_tm_flush = tail; ++ + /* + * Insertion sort, ensuring the first entry in the list is always + * the one we need first. +-- +2.27.0 + diff --git a/queue-5.10/libperf-tests-fail-when-failing-to-get-a-tracepoint-.patch b/queue-5.10/libperf-tests-fail-when-failing-to-get-a-tracepoint-.patch new file mode 100644 index 00000000000..3ca0b7e3100 --- /dev/null +++ b/queue-5.10/libperf-tests-fail-when-failing-to-get-a-tracepoint-.patch @@ -0,0 +1,41 @@ +From 143bd48a26abfb3635448f6f265a0381d082abbe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Jan 2021 10:02:50 -0800 +Subject: libperf tests: Fail when failing to get a tracepoint id + +From: Ian Rogers + +[ Upstream commit 66dd86b2a2bee129c70f7ff054d3a6a2e5f8eb20 ] + +Permissions are necessary to get a tracepoint id. Fail the test when the +read fails. + +Signed-off-by: Ian Rogers +Acked-by: Jiri Olsa +Cc: Alexander Shishkin +Cc: Mark Rutland +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Stephane Eranian +Link: http://lore.kernel.org/lkml/20210114180250.3853825-2-irogers@google.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/lib/perf/tests/test-evlist.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/lib/perf/tests/test-evlist.c b/tools/lib/perf/tests/test-evlist.c +index d913241d41356..bd19cabddaf62 100644 +--- a/tools/lib/perf/tests/test-evlist.c ++++ b/tools/lib/perf/tests/test-evlist.c +@@ -215,6 +215,7 @@ static int test_mmap_thread(void) + sysfs__mountpoint()); + + if (filename__read_int(path, &id)) { ++ tests_failed++; + fprintf(stderr, "error: failed to get tracepoint id: %s\n", path); + return -1; + } +-- +2.27.0 + diff --git a/queue-5.10/libperf-tests-if-a-test-fails-return-non-zero.patch b/queue-5.10/libperf-tests-if-a-test-fails-return-non-zero.patch new file mode 100644 index 00000000000..a681751f6ca --- /dev/null +++ b/queue-5.10/libperf-tests-if-a-test-fails-return-non-zero.patch @@ -0,0 +1,76 @@ +From ea93e5d35257eb43d2dde4a0e82765553dc0ad8a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Jan 2021 10:02:49 -0800 +Subject: libperf tests: If a test fails return non-zero + +From: Ian Rogers + +[ Upstream commit bba2ea17ef553aea0df80cb64399fe2f70f225dd ] + +If a test fails return -1 rather than 0. This is consistent with the +return value in test-cpumap.c + +Signed-off-by: Ian Rogers +Acked-by: Jiri Olsa +Cc: Alexander Shishkin +Cc: Mark Rutland +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Stephane Eranian +Link: http://lore.kernel.org/lkml/20210114180250.3853825-1-irogers@google.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Sasha Levin +--- + tools/lib/perf/tests/test-cpumap.c | 2 +- + tools/lib/perf/tests/test-evlist.c | 2 +- + tools/lib/perf/tests/test-evsel.c | 2 +- + tools/lib/perf/tests/test-threadmap.c | 2 +- + 4 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/tools/lib/perf/tests/test-cpumap.c b/tools/lib/perf/tests/test-cpumap.c +index c8d45091e7c26..c70e9e03af3e9 100644 +--- a/tools/lib/perf/tests/test-cpumap.c ++++ b/tools/lib/perf/tests/test-cpumap.c +@@ -27,5 +27,5 @@ int main(int argc, char **argv) + perf_cpu_map__put(cpus); + + __T_END; +- return 0; ++ return tests_failed == 0 ? 0 : -1; + } +diff --git a/tools/lib/perf/tests/test-evlist.c b/tools/lib/perf/tests/test-evlist.c +index 6d8ebe0c25042..d913241d41356 100644 +--- a/tools/lib/perf/tests/test-evlist.c ++++ b/tools/lib/perf/tests/test-evlist.c +@@ -409,5 +409,5 @@ int main(int argc, char **argv) + test_mmap_cpus(); + + __T_END; +- return 0; ++ return tests_failed == 0 ? 0 : -1; + } +diff --git a/tools/lib/perf/tests/test-evsel.c b/tools/lib/perf/tests/test-evsel.c +index 135722ac965bf..0ad82d7a2a51b 100644 +--- a/tools/lib/perf/tests/test-evsel.c ++++ b/tools/lib/perf/tests/test-evsel.c +@@ -131,5 +131,5 @@ int main(int argc, char **argv) + test_stat_thread_enable(); + + __T_END; +- return 0; ++ return tests_failed == 0 ? 0 : -1; + } +diff --git a/tools/lib/perf/tests/test-threadmap.c b/tools/lib/perf/tests/test-threadmap.c +index 7dc4d6fbeddee..384471441b484 100644 +--- a/tools/lib/perf/tests/test-threadmap.c ++++ b/tools/lib/perf/tests/test-threadmap.c +@@ -27,5 +27,5 @@ int main(int argc, char **argv) + perf_thread_map__put(threads); + + __T_END; +- return 0; ++ return tests_failed == 0 ? 0 : -1; + } +-- +2.27.0 + diff --git a/queue-5.10/risc-v-fix-maximum-allowed-phsyical-memory-for-rv32.patch b/queue-5.10/risc-v-fix-maximum-allowed-phsyical-memory-for-rv32.patch new file mode 100644 index 00000000000..496dd0368e5 --- /dev/null +++ b/queue-5.10/risc-v-fix-maximum-allowed-phsyical-memory-for-rv32.patch @@ -0,0 +1,53 @@ +From 912d5786ffa37b9ddcf3fdee634a38d440959706 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 11 Jan 2021 15:45:04 -0800 +Subject: RISC-V: Fix maximum allowed phsyical memory for RV32 + +From: Atish Patra + +[ Upstream commit e557793799c5a8406afb08aa170509619f7eac36 ] + +Linux kernel can only map 1GB of address space for RV32 as the page offset +is set to 0xC0000000. The current description in the Kconfig is confusing +as it indicates that RV32 can support 2GB of physical memory. That is +simply not true for current kernel. In future, a 2GB split support can be +added to allow 2GB physical address space. + +Reviewed-by: Anup Patel +Signed-off-by: Atish Patra +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/Kconfig | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig +index 44377fd7860e4..234a21d26f674 100644 +--- a/arch/riscv/Kconfig ++++ b/arch/riscv/Kconfig +@@ -134,7 +134,7 @@ config PA_BITS + + config PAGE_OFFSET + hex +- default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB ++ default 0xC0000000 if 32BIT && MAXPHYSMEM_1GB + default 0x80000000 if 64BIT && !MMU + default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB + default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB +@@ -247,10 +247,12 @@ config MODULE_SECTIONS + + choice + prompt "Maximum Physical Memory" +- default MAXPHYSMEM_2GB if 32BIT ++ default MAXPHYSMEM_1GB if 32BIT + default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW + default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY + ++ config MAXPHYSMEM_1GB ++ bool "1GiB" + config MAXPHYSMEM_2GB + bool "2GiB" + config MAXPHYSMEM_128GB +-- +2.27.0 + diff --git a/queue-5.10/risc-v-set-current-memblock-limit.patch b/queue-5.10/risc-v-set-current-memblock-limit.patch new file mode 100644 index 00000000000..a449c9c4008 --- /dev/null +++ b/queue-5.10/risc-v-set-current-memblock-limit.patch @@ -0,0 +1,65 @@ +From 4608c6c4c879035839b719c7b1d7cd8c8120a12a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 11 Jan 2021 15:45:02 -0800 +Subject: RISC-V: Set current memblock limit + +From: Atish Patra + +[ Upstream commit abb8e86b269604e906a6a4af7a09f04b72dbb862 ] + +Currently, linux kernel can not use last 4k bytes of addressable space +because IS_ERR_VALUE macro treats those as an error. This will be an issue +for RV32 as any memblock allocator potentially allocate chunk of memory +from the end of DRAM (2GB) leading bad address error even though the +address was technically valid. + +Fix this issue by limiting the memblock if available memory spans the +entire address space. + +Reviewed-by: Anup Patel +Signed-off-by: Atish Patra +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/mm/init.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c +index e4133c20744ce..608082fb9a6c6 100644 +--- a/arch/riscv/mm/init.c ++++ b/arch/riscv/mm/init.c +@@ -155,9 +155,10 @@ disable: + void __init setup_bootmem(void) + { + phys_addr_t mem_start = 0; +- phys_addr_t start, end = 0; ++ phys_addr_t start, dram_end, end = 0; + phys_addr_t vmlinux_end = __pa_symbol(&_end); + phys_addr_t vmlinux_start = __pa_symbol(&_start); ++ phys_addr_t max_mapped_addr = __pa(~(ulong)0); + u64 i; + + /* Find the memory region containing the kernel */ +@@ -179,7 +180,18 @@ void __init setup_bootmem(void) + /* Reserve from the start of the kernel to the end of the kernel */ + memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); + +- max_pfn = PFN_DOWN(memblock_end_of_DRAM()); ++ dram_end = memblock_end_of_DRAM(); ++ ++ /* ++ * memblock allocator is not aware of the fact that last 4K bytes of ++ * the addressable memory can not be mapped because of IS_ERR_VALUE ++ * macro. Make sure that last 4k bytes are not usable by memblock ++ * if end of dram is equal to maximum addressable memory. ++ */ ++ if (max_mapped_addr == (dram_end - 1)) ++ memblock_set_current_limit(max_mapped_addr - 4096); ++ ++ max_pfn = PFN_DOWN(dram_end); + max_low_pfn = max_pfn; + set_max_mapnr(max_low_pfn); + +-- +2.27.0 + diff --git a/queue-5.10/riscv-cacheinfo-fix-using-smp_processor_id-in-preemp.patch b/queue-5.10/riscv-cacheinfo-fix-using-smp_processor_id-in-preemp.patch new file mode 100644 index 00000000000..8015997847a --- /dev/null +++ b/queue-5.10/riscv-cacheinfo-fix-using-smp_processor_id-in-preemp.patch @@ -0,0 +1,66 @@ +From 637477b7c45ace123f11a06015698f8fd6d5d787 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 23 Dec 2020 00:01:52 +0800 +Subject: riscv: cacheinfo: Fix using smp_processor_id() in preemptible + +From: Kefeng Wang + +[ Upstream commit 80709af7325d179b433817f421c85449f2454046 ] + +Use raw_smp_processor_id instead of smp_processor_id() to fix warning, + +BUG: using smp_processor_id() in preemptible [00000000] code: init/1 +caller is debug_smp_processor_id+0x1c/0x26 +CPU: 0 PID: 1 Comm: init Not tainted 5.10.0-rc4 #211 +Call Trace: + walk_stackframe+0x0/0xaa + show_stack+0x32/0x3e + dump_stack+0x76/0x90 + check_preemption_disabled+0xaa/0xac + debug_smp_processor_id+0x1c/0x26 + get_cache_size+0x18/0x68 + load_elf_binary+0x868/0xece + bprm_execve+0x224/0x498 + kernel_execve+0xdc/0x142 + run_init_process+0x90/0x9e + try_to_run_init_process+0x12/0x3c + kernel_init+0xb4/0xf8 + ret_from_exception+0x0/0xc + +The issue is found when CONFIG_DEBUG_PREEMPT enabled. + +Reviewed-by: Atish Patra +Tested-by: Atish Patra +Signed-off-by: Kefeng Wang +[Palmer: Added a comment.] +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/kernel/cacheinfo.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c +index de59dd457b415..d867813570442 100644 +--- a/arch/riscv/kernel/cacheinfo.c ++++ b/arch/riscv/kernel/cacheinfo.c +@@ -26,7 +26,16 @@ cache_get_priv_group(struct cacheinfo *this_leaf) + + static struct cacheinfo *get_cacheinfo(u32 level, enum cache_type type) + { +- struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(smp_processor_id()); ++ /* ++ * Using raw_smp_processor_id() elides a preemptability check, but this ++ * is really indicative of a larger problem: the cacheinfo UABI assumes ++ * that cores have a homonogenous view of the cache hierarchy. That ++ * happens to be the case for the current set of RISC-V systems, but ++ * likely won't be true in general. Since there's no way to provide ++ * correct information for these systems via the current UABI we're ++ * just eliding the check for now. ++ */ ++ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(raw_smp_processor_id()); + struct cacheinfo *this_leaf; + int index; + +-- +2.27.0 + diff --git a/queue-5.10/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch b/queue-5.10/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch new file mode 100644 index 00000000000..cbf451afcd9 --- /dev/null +++ b/queue-5.10/riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch @@ -0,0 +1,36 @@ +From 05873d73946135f7857bd55f5f37ead14b0d284b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Nov 2020 07:22:12 -0800 +Subject: riscv: defconfig: enable gpio support for HiFive Unleashed + +From: Sagar Shrikant Kadam + +[ Upstream commit 0983834a83931606a647c275e5d4165ce4e7b49f ] + +Ethernet phy VSC8541-01 on HiFive Unleashed has its reset line +connected to a gpio, so enable GPIO driver's required to reset +the phy. + +Signed-off-by: Sagar Shrikant Kadam +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/configs/defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig +index d222d353d86d4..8c3d1e4517031 100644 +--- a/arch/riscv/configs/defconfig ++++ b/arch/riscv/configs/defconfig +@@ -64,6 +64,8 @@ CONFIG_HW_RANDOM=y + CONFIG_HW_RANDOM_VIRTIO=y + CONFIG_SPI=y + CONFIG_SPI_SIFIVE=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIO_SIFIVE=y + # CONFIG_PTP_1588_CLOCK is not set + CONFIG_POWER_RESET=y + CONFIG_DRM=y +-- +2.27.0 + diff --git a/queue-5.10/riscv-enable-interrupts-during-syscalls-with-m-mode.patch b/queue-5.10/riscv-enable-interrupts-during-syscalls-with-m-mode.patch new file mode 100644 index 00000000000..e8513352fba --- /dev/null +++ b/queue-5.10/riscv-enable-interrupts-during-syscalls-with-m-mode.patch @@ -0,0 +1,46 @@ +From cc5c8145b59d5d9c53a893c3e01d97d13eb03e96 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Dec 2020 22:50:36 +0900 +Subject: riscv: Enable interrupts during syscalls with M-Mode + +From: Damien Le Moal + +[ Upstream commit 643437b996bac9267785e0bd528332e2d5811067 ] + +When running is M-Mode (no MMU config), MPIE does not get set. This +results in all syscalls being executed with interrupts disabled as +handle_exception never sets SR_IE as it always sees SR_PIE being +cleared. Fix this by always force enabling interrupts in +handle_syscall when CONFIG_RISCV_M_MODE is enabled. + +Signed-off-by: Damien Le Moal +Reviewed-by: Palmer Dabbelt +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/kernel/entry.S | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S +index 835e45bb59c40..744f3209c48d0 100644 +--- a/arch/riscv/kernel/entry.S ++++ b/arch/riscv/kernel/entry.S +@@ -155,6 +155,15 @@ skip_context_tracking: + tail do_trap_unknown + + handle_syscall: ++#ifdef CONFIG_RISCV_M_MODE ++ /* ++ * When running is M-Mode (no MMU config), MPIE does not get set. ++ * As a result, we need to force enable interrupts here because ++ * handle_exception did not do set SR_IE as it always sees SR_PIE ++ * being cleared. ++ */ ++ csrs CSR_STATUS, SR_IE ++#endif + #if defined(CONFIG_TRACE_IRQFLAGS) || defined(CONFIG_CONTEXT_TRACKING) + /* Recover a0 - a7 for system calls */ + REG_L a0, PT_A0(sp) +-- +2.27.0 + diff --git a/queue-5.10/riscv-fix-kernel-time_init.patch b/queue-5.10/riscv-fix-kernel-time_init.patch new file mode 100644 index 00000000000..22480f09a14 --- /dev/null +++ b/queue-5.10/riscv-fix-kernel-time_init.patch @@ -0,0 +1,49 @@ +From e661be4feb8d5862fbccd044d49f92a74918c499 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Dec 2020 22:50:34 +0900 +Subject: riscv: Fix kernel time_init() + +From: Damien Le Moal + +[ Upstream commit 11f4c2e940e2f317c9d8fb5a79702f2a4a02ff98 ] + +If of_clk_init() is not called in time_init(), clock providers defined +in the system device tree are not initialized, resulting in failures for +other devices to initialize due to missing clocks. +Similarly to other architectures and to the default kernel time_init() +implementation, call of_clk_init() before executing timer_probe() in +time_init(). + +Signed-off-by: Damien Le Moal +Acked-by: Stephen Boyd +Reviewed-by: Palmer Dabbelt +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + arch/riscv/kernel/time.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c +index 4d3a1048ad8b1..8a5cf99c07762 100644 +--- a/arch/riscv/kernel/time.c ++++ b/arch/riscv/kernel/time.c +@@ -4,6 +4,7 @@ + * Copyright (C) 2017 SiFive + */ + ++#include + #include + #include + #include +@@ -24,6 +25,8 @@ void __init time_init(void) + riscv_timebase = prop; + + lpj_fine = riscv_timebase / HZ; ++ ++ of_clk_init(NULL); + timer_probe(); + } + +-- +2.27.0 + diff --git a/queue-5.10/riscv-fix-sifive-serial-driver.patch b/queue-5.10/riscv-fix-sifive-serial-driver.patch new file mode 100644 index 00000000000..c9f66f3f264 --- /dev/null +++ b/queue-5.10/riscv-fix-sifive-serial-driver.patch @@ -0,0 +1,45 @@ +From 934633c950de83cce4cd8fd41459c33d9e91b2af Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 13 Dec 2020 22:50:35 +0900 +Subject: riscv: Fix sifive serial driver + +From: Damien Le Moal + +[ Upstream commit 1f1496a923b6ba16679074fe77100e1b53cdb880 ] + +Setup the port uartclk in sifive_serial_probe() so that the base baud +rate is correctly printed during device probe instead of always showing +"0". I.e. the probe message is changed from + +38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1, +base_baud = 0) is a SiFive UART v0 + +to the correct: + +38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1, +base_baud = 115200) is a SiFive UART v0 + +Signed-off-by: Damien Le Moal +Reviewed-by: Palmer Dabbelt +Acked-by: Palmer Dabbelt +Signed-off-by: Palmer Dabbelt +Signed-off-by: Sasha Levin +--- + drivers/tty/serial/sifive.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c +index 13eadcb8aec4e..214bf3086c68a 100644 +--- a/drivers/tty/serial/sifive.c ++++ b/drivers/tty/serial/sifive.c +@@ -999,6 +999,7 @@ static int sifive_serial_probe(struct platform_device *pdev) + /* Set up clock divider */ + ssp->clkin_rate = clk_get_rate(ssp->clk); + ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE; ++ ssp->port.uartclk = ssp->baud_rate * 16; + __ssp_update_div(ssp); + + platform_set_drvdata(pdev, ssp); +-- +2.27.0 + diff --git a/queue-5.10/scsi-qedi-correct-max-length-of-chap-secret.patch b/queue-5.10/scsi-qedi-correct-max-length-of-chap-secret.patch new file mode 100644 index 00000000000..49b954467fb --- /dev/null +++ b/queue-5.10/scsi-qedi-correct-max-length-of-chap-secret.patch @@ -0,0 +1,46 @@ +From 3f5547391d5f11e896fec12a4782dc9292c4aa76 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 17 Dec 2020 02:51:44 -0800 +Subject: scsi: qedi: Correct max length of CHAP secret + +From: Nilesh Javali + +[ Upstream commit d50c7986fbf0e2167279e110a2ed5bd8e811c660 ] + +The CHAP secret displayed garbage characters causing iSCSI login +authentication failure. Correct the CHAP password max length. + +Link: https://lore.kernel.org/r/20201217105144.8055-1-njavali@marvell.com +Reviewed-by: Lee Duncan +Signed-off-by: Nilesh Javali +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedi/qedi_main.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/scsi/qedi/qedi_main.c b/drivers/scsi/qedi/qedi_main.c +index f5fc7f518f8af..47ad64b066236 100644 +--- a/drivers/scsi/qedi/qedi_main.c ++++ b/drivers/scsi/qedi/qedi_main.c +@@ -2245,7 +2245,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, + chap_name); + break; + case ISCSI_BOOT_TGT_CHAP_SECRET: +- rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN, ++ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN, + chap_secret); + break; + case ISCSI_BOOT_TGT_REV_CHAP_NAME: +@@ -2253,7 +2253,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, + mchap_name); + break; + case ISCSI_BOOT_TGT_REV_CHAP_SECRET: +- rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN, ++ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN, + mchap_secret); + break; + case ISCSI_BOOT_TGT_FLAGS: +-- +2.27.0 + diff --git a/queue-5.10/scsi-scsi_debug-fix-memleak-in-scsi_debug_init.patch b/queue-5.10/scsi-scsi_debug-fix-memleak-in-scsi_debug_init.patch new file mode 100644 index 00000000000..4a2679b968e --- /dev/null +++ b/queue-5.10/scsi-scsi_debug-fix-memleak-in-scsi_debug_init.patch @@ -0,0 +1,48 @@ +From 5c129394a13c745b35446d8758d4c152696b77ab Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 26 Dec 2020 14:15:03 +0800 +Subject: scsi: scsi_debug: Fix memleak in scsi_debug_init() + +From: Dinghao Liu + +[ Upstream commit 3b01d7ea4dae907d34fa0eeb3f17bacd714c6d0c ] + +When sdeb_zbc_model does not match BLK_ZONED_NONE, BLK_ZONED_HA or +BLK_ZONED_HM, we should free sdebug_q_arr to prevent memleak. Also there is +no need to execute sdebug_erase_store() on failure of sdeb_zbc_model_str(). + +Link: https://lore.kernel.org/r/20201226061503.20050-1-dinghao.liu@zju.edu.cn +Acked-by: Douglas Gilbert +Signed-off-by: Dinghao Liu +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/scsi_debug.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c +index 24c0f7ec03511..4a08c450b756f 100644 +--- a/drivers/scsi/scsi_debug.c ++++ b/drivers/scsi/scsi_debug.c +@@ -6740,7 +6740,7 @@ static int __init scsi_debug_init(void) + k = sdeb_zbc_model_str(sdeb_zbc_model_s); + if (k < 0) { + ret = k; +- goto free_vm; ++ goto free_q_arr; + } + sdeb_zbc_model = k; + switch (sdeb_zbc_model) { +@@ -6753,7 +6753,8 @@ static int __init scsi_debug_init(void) + break; + default: + pr_err("Invalid ZBC model\n"); +- return -EINVAL; ++ ret = -EINVAL; ++ goto free_q_arr; + } + } + if (sdeb_zbc_model != BLK_ZONED_NONE) { +-- +2.27.0 + diff --git a/queue-5.10/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch b/queue-5.10/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch new file mode 100644 index 00000000000..5bf773d2f1a --- /dev/null +++ b/queue-5.10/scsi-sd-suppress-spurious-errors-when-write-same-is-.patch @@ -0,0 +1,49 @@ +From 4e40f0046f7ed8154d64bcd43a99a366e750dfb1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 7 Dec 2020 17:10:21 -0500 +Subject: scsi: sd: Suppress spurious errors when WRITE SAME is being disabled + +From: Ewan D. Milne + +[ Upstream commit e5cc9002caafacbaa8dab878d17a313192c3b03b ] + +The block layer code will split a large zeroout request into multiple bios +and if WRITE SAME is disabled because the storage device reports that it +does not support it (or support the length used), we can get an error +message from the block layer despite the setting of RQF_QUIET on the first +request. This is because more than one request may have already been +submitted. + +Fix this by setting RQF_QUIET when BLK_STS_TARGET is returned to fail the +request early, we don't need to log a message because we did not actually +submit the command to the device, and the block layer code will handle the +error by submitting individual write bios. + +Link: https://lore.kernel.org/r/20201207221021.28243-1-emilne@redhat.com +Reviewed-by: Christoph Hellwig +Signed-off-by: Ewan D. Milne +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/sd.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c +index 656bcf4940d6d..fedb89d4ac3f0 100644 +--- a/drivers/scsi/sd.c ++++ b/drivers/scsi/sd.c +@@ -986,8 +986,10 @@ static blk_status_t sd_setup_write_zeroes_cmnd(struct scsi_cmnd *cmd) + } + } + +- if (sdp->no_write_same) ++ if (sdp->no_write_same) { ++ rq->rq_flags |= RQF_QUIET; + return BLK_STS_TARGET; ++ } + + if (sdkp->ws16 || lba > 0xffffffff || nr_blocks > 0xffff) + return sd_setup_write_same16_cmnd(cmd, false); +-- +2.27.0 + diff --git a/queue-5.10/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch b/queue-5.10/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch new file mode 100644 index 00000000000..3890ca67c0c --- /dev/null +++ b/queue-5.10/scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch @@ -0,0 +1,65 @@ +From bbfbca4470b0d506a1e5e9b2db5a3f3a5fe1b9f3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 28 Dec 2020 04:04:36 -0800 +Subject: scsi: ufs: Correct the LUN used in eh_device_reset_handler() callback + +From: Can Guo + +[ Upstream commit 35fc4cd34426c242ab015ef280853b7bff101f48 ] + +Users can initiate resets to specific SCSI device/target/host through +IOCTL. When this happens, the SCSI cmd passed to eh_device/target/host +_reset_handler() callbacks is initialized with a request whose tag is -1. +In this case it is not right for eh_device_reset_handler() callback to +count on the LUN get from hba->lrb[-1]. Fix it by getting LUN from the SCSI +device associated with the SCSI cmd. + +Link: https://lore.kernel.org/r/1609157080-26283-1-git-send-email-cang@codeaurora.org +Reviewed-by: Avri Altman +Reviewed-by: Stanley Chu +Signed-off-by: Can Guo +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c +index 66430cb086245..974a4f339ede2 100644 +--- a/drivers/scsi/ufs/ufshcd.c ++++ b/drivers/scsi/ufs/ufshcd.c +@@ -6567,19 +6567,16 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) + { + struct Scsi_Host *host; + struct ufs_hba *hba; +- unsigned int tag; + u32 pos; + int err; +- u8 resp = 0xF; +- struct ufshcd_lrb *lrbp; ++ u8 resp = 0xF, lun; + unsigned long flags; + + host = cmd->device->host; + hba = shost_priv(host); +- tag = cmd->request->tag; + +- lrbp = &hba->lrb[tag]; +- err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp); ++ lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun); ++ err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp); + if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) { + if (!err) + err = resp; +@@ -6588,7 +6585,7 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) + + /* clear the commands that were pending for corresponding LUN */ + for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) { +- if (hba->lrb[pos].lun == lrbp->lun) { ++ if (hba->lrb[pos].lun == lun) { + err = ufshcd_clear_cmd(hba, pos); + if (err) + break; +-- +2.27.0 + diff --git a/queue-5.10/scsi-ufs-relax-the-condition-of-ufshci_quirk_skip_ma.patch b/queue-5.10/scsi-ufs-relax-the-condition-of-ufshci_quirk_skip_ma.patch new file mode 100644 index 00000000000..4e82529fa34 --- /dev/null +++ b/queue-5.10/scsi-ufs-relax-the-condition-of-ufshci_quirk_skip_ma.patch @@ -0,0 +1,50 @@ +From 2667f7d557b3de8b5f0ee0145cf27a02fae89aef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 22 Dec 2020 15:29:05 +0800 +Subject: scsi: ufs: Relax the condition of + UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL + +From: Stanley Chu + +[ Upstream commit 21acf4601cc63cf564c6fc1a74d81b191313c929 ] + +UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL is intended to skip enabling +fWriteBoosterBufferFlushEn while WriteBooster is initializing. Therefore +it is better to apply the checking during WriteBooster initialization only. + +Link: https://lore.kernel.org/r/20201222072905.32221-3-stanley.chu@mediatek.com +Reviewed-by: Can Guo +Signed-off-by: Stanley Chu +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/ufs/ufshcd.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c +index 7b9a9a771b11b..66430cb086245 100644 +--- a/drivers/scsi/ufs/ufshcd.c ++++ b/drivers/scsi/ufs/ufshcd.c +@@ -283,7 +283,8 @@ static inline void ufshcd_wb_config(struct ufs_hba *hba) + if (ret) + dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n", + __func__, ret); +- ufshcd_wb_toggle_flush(hba, true); ++ if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL)) ++ ufshcd_wb_toggle_flush(hba, true); + } + + static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba) +@@ -5353,9 +5354,6 @@ static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set) + + static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable) + { +- if (hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL) +- return; +- + if (enable) + ufshcd_wb_buf_flush_enable(hba); + else +-- +2.27.0 + diff --git a/queue-5.10/series b/queue-5.10/series index b65ee76204b..f4ce08dc1a7 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -32,3 +32,45 @@ drm-amdgpu-remove-gpu-info-firmware-of-green-sardine.patch drm-amd-display-dcn2x-find-secondary-pipe-properly-in-mpo-odm-case.patch drm-i915-gt-prevent-use-of-engine-wa_ctx-after-error.patch drm-i915-check-for-rq-hwsp-validity-after-acquiring-rcu-lock.patch +asoc-intel-haswell-add-missing-pm_ops.patch +asoc-rt711-mutex-between-calibration-and-power-state.patch +sunrpc-handle-tcp-socket-sends-with-kernel_sendpage-.patch +hid-multitouch-enable-multi-input-for-synaptics-poin.patch +hid-sony-select-config_crc32.patch +dm-integrity-select-crypto_skcipher.patch +x86-hyperv-fix-kexec-panic-hang-issues.patch +scsi-ufs-relax-the-condition-of-ufshci_quirk_skip_ma.patch +scsi-ufs-correct-the-lun-used-in-eh_device_reset_han.patch +scsi-qedi-correct-max-length-of-chap-secret.patch +scsi-scsi_debug-fix-memleak-in-scsi_debug_init.patch +scsi-sd-suppress-spurious-errors-when-write-same-is-.patch +riscv-fix-kernel-time_init.patch +riscv-fix-sifive-serial-driver.patch +riscv-enable-interrupts-during-syscalls-with-m-mode.patch +hid-logitech-dj-add-the-g602-receiver.patch +hid-ignore-battery-for-elan-touchscreen-on-asus-ux55.patch +clk-tegra30-add-hda-clock-default-rates-to-clock-dri.patch +alsa-hda-tegra-fix-tegra-hda-on-tegra30-soc.patch +riscv-cacheinfo-fix-using-smp_processor_id-in-preemp.patch +arm64-make-atomic-helpers-__always_inline.patch +xen-fix-event-channel-callback-via-intx-gsi.patch +x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch +x86-xen-fix-xen_hvm_smp_init-when-vector-callback-no.patch +dts-phy-fix-missing-mdio-device-and-probe-failure-of.patch +dts-phy-add-gpio-number-and-active-state-used-for-ph.patch +riscv-defconfig-enable-gpio-support-for-hifive-unlea.patch +drm-amdgpu-psp-fix-psp-gfx-ctrl-cmds.patch +drm-amd-display-disable-dcn10-pipe-split-by-default.patch +hid-logitech-hidpp-add-product-id-for-mx-ergo-in-blu.patch +drm-amd-display-fix-to-be-able-to-stop-crc-calculati.patch +drm-nouveau-bios-fix-issue-shadowing-expansion-roms.patch +drm-nouveau-privring-ack-interrupts-the-same-way-as-.patch +drm-nouveau-i2c-gm200-increase-width-of-aux-semaphor.patch +drm-nouveau-mmu-fix-vram-heap-sizing.patch +drm-nouveau-kms-nv50-fix-case-where-notifier-buffer-.patch +io_uring-flush-timeouts-that-should-already-have-exp.patch +libperf-tests-if-a-test-fails-return-non-zero.patch +libperf-tests-fail-when-failing-to-get-a-tracepoint-.patch +risc-v-set-current-memblock-limit.patch +risc-v-fix-maximum-allowed-phsyical-memory-for-rv32.patch +x86-xen-fix-nopvspin-build-error.patch diff --git a/queue-5.10/sunrpc-handle-tcp-socket-sends-with-kernel_sendpage-.patch b/queue-5.10/sunrpc-handle-tcp-socket-sends-with-kernel_sendpage-.patch new file mode 100644 index 00000000000..c2c9aa2ec9e --- /dev/null +++ b/queue-5.10/sunrpc-handle-tcp-socket-sends-with-kernel_sendpage-.patch @@ -0,0 +1,140 @@ +From a1c21504cbfd629b6d3a7a861d78db3c69bb8599 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 18 Dec 2020 12:28:41 -0500 +Subject: SUNRPC: Handle TCP socket sends with kernel_sendpage() again + +From: Chuck Lever + +[ Upstream commit 4a85a6a3320b4a622315d2e0ea91a1d2b013bce4 ] + +Daire Byrne reports a ~50% aggregrate throughput regression on his +Linux NFS server after commit da1661b93bf4 ("SUNRPC: Teach server to +use xprt_sock_sendmsg for socket sends"), which replaced +kernel_send_page() calls in NFSD's socket send path with calls to +sock_sendmsg() using iov_iter. + +Investigation showed that tcp_sendmsg() was not using zero-copy to +send the xdr_buf's bvec pages, but instead was relying on memcpy. +This means copying every byte of a large NFS READ payload. + +It looks like TLS sockets do indeed support a ->sendpage method, +so it's really not necessary to use xprt_sock_sendmsg() to support +TLS fully on the server. A mechanical reversion of da1661b93bf4 is +not possible at this point, but we can re-implement the server's +TCP socket sendmsg path using kernel_sendpage(). + +Reported-by: Daire Byrne +BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=209439 +Signed-off-by: Chuck Lever +Signed-off-by: Sasha Levin +--- + net/sunrpc/svcsock.c | 86 +++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 85 insertions(+), 1 deletion(-) + +diff --git a/net/sunrpc/svcsock.c b/net/sunrpc/svcsock.c +index c2752e2b9ce34..4404c491eb388 100644 +--- a/net/sunrpc/svcsock.c ++++ b/net/sunrpc/svcsock.c +@@ -1062,6 +1062,90 @@ err_noclose: + return 0; /* record not complete */ + } + ++static int svc_tcp_send_kvec(struct socket *sock, const struct kvec *vec, ++ int flags) ++{ ++ return kernel_sendpage(sock, virt_to_page(vec->iov_base), ++ offset_in_page(vec->iov_base), ++ vec->iov_len, flags); ++} ++ ++/* ++ * kernel_sendpage() is used exclusively to reduce the number of ++ * copy operations in this path. Therefore the caller must ensure ++ * that the pages backing @xdr are unchanging. ++ * ++ * In addition, the logic assumes that * .bv_len is never larger ++ * than PAGE_SIZE. ++ */ ++static int svc_tcp_sendmsg(struct socket *sock, struct msghdr *msg, ++ struct xdr_buf *xdr, rpc_fraghdr marker, ++ unsigned int *sentp) ++{ ++ const struct kvec *head = xdr->head; ++ const struct kvec *tail = xdr->tail; ++ struct kvec rm = { ++ .iov_base = &marker, ++ .iov_len = sizeof(marker), ++ }; ++ int flags, ret; ++ ++ *sentp = 0; ++ xdr_alloc_bvec(xdr, GFP_KERNEL); ++ ++ msg->msg_flags = MSG_MORE; ++ ret = kernel_sendmsg(sock, msg, &rm, 1, rm.iov_len); ++ if (ret < 0) ++ return ret; ++ *sentp += ret; ++ if (ret != rm.iov_len) ++ return -EAGAIN; ++ ++ flags = head->iov_len < xdr->len ? MSG_MORE | MSG_SENDPAGE_NOTLAST : 0; ++ ret = svc_tcp_send_kvec(sock, head, flags); ++ if (ret < 0) ++ return ret; ++ *sentp += ret; ++ if (ret != head->iov_len) ++ goto out; ++ ++ if (xdr->page_len) { ++ unsigned int offset, len, remaining; ++ struct bio_vec *bvec; ++ ++ bvec = xdr->bvec; ++ offset = xdr->page_base; ++ remaining = xdr->page_len; ++ flags = MSG_MORE | MSG_SENDPAGE_NOTLAST; ++ while (remaining > 0) { ++ if (remaining <= PAGE_SIZE && tail->iov_len == 0) ++ flags = 0; ++ len = min(remaining, bvec->bv_len); ++ ret = kernel_sendpage(sock, bvec->bv_page, ++ bvec->bv_offset + offset, ++ len, flags); ++ if (ret < 0) ++ return ret; ++ *sentp += ret; ++ if (ret != len) ++ goto out; ++ remaining -= len; ++ offset = 0; ++ bvec++; ++ } ++ } ++ ++ if (tail->iov_len) { ++ ret = svc_tcp_send_kvec(sock, tail, 0); ++ if (ret < 0) ++ return ret; ++ *sentp += ret; ++ } ++ ++out: ++ return 0; ++} ++ + /** + * svc_tcp_sendto - Send out a reply on a TCP socket + * @rqstp: completed svc_rqst +@@ -1089,7 +1173,7 @@ static int svc_tcp_sendto(struct svc_rqst *rqstp) + mutex_lock(&xprt->xpt_mutex); + if (svc_xprt_is_dead(xprt)) + goto out_notconn; +- err = xprt_sock_sendmsg(svsk->sk_sock, &msg, xdr, 0, marker, &sent); ++ err = svc_tcp_sendmsg(svsk->sk_sock, &msg, xdr, marker, &sent); + xdr_free_bvec(xdr); + trace_svcsock_tcp_send(xprt, err < 0 ? err : sent); + if (err < 0 || sent != (xdr->len + sizeof(marker))) +-- +2.27.0 + diff --git a/queue-5.10/x86-hyperv-fix-kexec-panic-hang-issues.patch b/queue-5.10/x86-hyperv-fix-kexec-panic-hang-issues.patch new file mode 100644 index 00000000000..ab599ba8ceb --- /dev/null +++ b/queue-5.10/x86-hyperv-fix-kexec-panic-hang-issues.patch @@ -0,0 +1,137 @@ +From 0e65e7f9e83c83a4fb369488eda6d371f238af59 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 21 Dec 2020 22:55:41 -0800 +Subject: x86/hyperv: Fix kexec panic/hang issues + +From: Dexuan Cui + +[ Upstream commit dfe94d4086e40e92b1926bddcefa629b791e9b28 ] + +Currently the kexec kernel can panic or hang due to 2 causes: + +1) hv_cpu_die() is not called upon kexec, so the hypervisor corrupts the +old VP Assist Pages when the kexec kernel runs. The same issue is fixed +for hibernation in commit 421f090c819d ("x86/hyperv: Suspend/resume the +VP assist page for hibernation"). Now fix it for kexec. + +2) hyperv_cleanup() is called too early. In the kexec path, the other CPUs +are stopped in hv_machine_shutdown() -> native_machine_shutdown(), so +between hv_kexec_handler() and native_machine_shutdown(), the other CPUs +can still try to access the hypercall page and cause panic. The workaround +"hv_hypercall_pg = NULL;" in hyperv_cleanup() is unreliabe. Move +hyperv_cleanup() to a better place. + +Signed-off-by: Dexuan Cui +Reviewed-by: Michael Kelley +Link: https://lore.kernel.org/r/20201222065541.24312-1-decui@microsoft.com +Signed-off-by: Wei Liu +Signed-off-by: Sasha Levin +--- + arch/x86/hyperv/hv_init.c | 4 ++++ + arch/x86/include/asm/mshyperv.h | 2 ++ + arch/x86/kernel/cpu/mshyperv.c | 18 ++++++++++++++++++ + drivers/hv/vmbus_drv.c | 2 -- + 4 files changed, 24 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c +index 6fb8cb7b9bcc6..6375967a8244d 100644 +--- a/arch/x86/hyperv/hv_init.c ++++ b/arch/x86/hyperv/hv_init.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -26,6 +27,8 @@ + #include + #include + ++int hyperv_init_cpuhp; ++ + void *hv_hypercall_pg; + EXPORT_SYMBOL_GPL(hv_hypercall_pg); + +@@ -424,6 +427,7 @@ void __init hyperv_init(void) + + register_syscore_ops(&hv_syscore_ops); + ++ hyperv_init_cpuhp = cpuhp; + return; + + remove_cpuhp_state: +diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h +index ffc289992d1b0..30f76b9668579 100644 +--- a/arch/x86/include/asm/mshyperv.h ++++ b/arch/x86/include/asm/mshyperv.h +@@ -74,6 +74,8 @@ static inline void hv_disable_stimer0_percpu_irq(int irq) {} + + + #if IS_ENABLED(CONFIG_HYPERV) ++extern int hyperv_init_cpuhp; ++ + extern void *hv_hypercall_pg; + extern void __percpu **hyperv_pcpu_input_arg; + +diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c +index 05ef1f4550cbd..6cc50ab07bded 100644 +--- a/arch/x86/kernel/cpu/mshyperv.c ++++ b/arch/x86/kernel/cpu/mshyperv.c +@@ -135,14 +135,32 @@ static void hv_machine_shutdown(void) + { + if (kexec_in_progress && hv_kexec_handler) + hv_kexec_handler(); ++ ++ /* ++ * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor ++ * corrupts the old VP Assist Pages and can crash the kexec kernel. ++ */ ++ if (kexec_in_progress && hyperv_init_cpuhp > 0) ++ cpuhp_remove_state(hyperv_init_cpuhp); ++ ++ /* The function calls stop_other_cpus(). */ + native_machine_shutdown(); ++ ++ /* Disable the hypercall page when there is only 1 active CPU. */ ++ if (kexec_in_progress) ++ hyperv_cleanup(); + } + + static void hv_machine_crash_shutdown(struct pt_regs *regs) + { + if (hv_crash_handler) + hv_crash_handler(regs); ++ ++ /* The function calls crash_smp_send_stop(). */ + native_machine_crash_shutdown(regs); ++ ++ /* Disable the hypercall page when there is only 1 active CPU. */ ++ hyperv_cleanup(); + } + #endif /* CONFIG_KEXEC_CORE */ + #endif /* CONFIG_HYPERV */ +diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c +index 4fad3e6745e53..a5a402e776c77 100644 +--- a/drivers/hv/vmbus_drv.c ++++ b/drivers/hv/vmbus_drv.c +@@ -2542,7 +2542,6 @@ static void hv_kexec_handler(void) + /* Make sure conn_state is set as hv_synic_cleanup checks for it */ + mb(); + cpuhp_remove_state(hyperv_cpuhp_online); +- hyperv_cleanup(); + }; + + static void hv_crash_handler(struct pt_regs *regs) +@@ -2558,7 +2557,6 @@ static void hv_crash_handler(struct pt_regs *regs) + cpu = smp_processor_id(); + hv_stimer_cleanup(cpu); + hv_synic_disable_regs(cpu); +- hyperv_cleanup(); + }; + + static int hv_synic_suspend(void) +-- +2.27.0 + diff --git a/queue-5.10/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch b/queue-5.10/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch new file mode 100644 index 00000000000..aa278206268 --- /dev/null +++ b/queue-5.10/x86-xen-add-xen_no_vector_callback-option-to-test-pc.patch @@ -0,0 +1,80 @@ +From 4eef5fa56b3ddba5f23402bc8bacb1e40e754d17 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Jan 2021 15:39:56 +0000 +Subject: x86/xen: Add xen_no_vector_callback option to test PCI INTX delivery + +From: David Woodhouse + +[ Upstream commit b36b0fe96af13460278bf9b173beced1bd15f85d ] + +It's useful to be able to test non-vector event channel delivery, to make +sure Linux will work properly on older Xen which doesn't have it. + +It's also useful for those working on Xen and Xen-compatible hypervisors, +because there are guest kernels still in active use which use PCI INTX +even when vector delivery is available. + +Signed-off-by: David Woodhouse +Reviewed-by: Boris Ostrovsky +Link: https://lore.kernel.org/r/20210106153958.584169-4-dwmw2@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + Documentation/admin-guide/kernel-parameters.txt | 4 ++++ + arch/x86/xen/enlighten_hvm.c | 11 ++++++++++- + 2 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt +index f6a1513dfb76c..26bfe7ae711b8 100644 +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -5965,6 +5965,10 @@ + This option is obsoleted by the "nopv" option, which + has equivalent effect for XEN platform. + ++ xen_no_vector_callback ++ [KNL,X86,XEN] Disable the vector callback for Xen ++ event channel interrupts. ++ + xen_scrub_pages= [XEN] + Boolean option to control scrubbing pages before giving them back + to Xen, for use by other domains. Can be also changed at runtime +diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c +index 9e87ab010c82b..ec50b7423a4c8 100644 +--- a/arch/x86/xen/enlighten_hvm.c ++++ b/arch/x86/xen/enlighten_hvm.c +@@ -188,6 +188,8 @@ static int xen_cpu_dead_hvm(unsigned int cpu) + return 0; + } + ++static bool no_vector_callback __initdata; ++ + static void __init xen_hvm_guest_init(void) + { + if (xen_pv_domain()) +@@ -207,7 +209,7 @@ static void __init xen_hvm_guest_init(void) + + xen_panic_handler_init(); + +- if (xen_feature(XENFEAT_hvm_callback_vector)) ++ if (!no_vector_callback && xen_feature(XENFEAT_hvm_callback_vector)) + xen_have_vector_callback = 1; + + xen_hvm_smp_init(); +@@ -233,6 +235,13 @@ static __init int xen_parse_nopv(char *arg) + } + early_param("xen_nopv", xen_parse_nopv); + ++static __init int xen_parse_no_vector_callback(char *arg) ++{ ++ no_vector_callback = true; ++ return 0; ++} ++early_param("xen_no_vector_callback", xen_parse_no_vector_callback); ++ + bool __init xen_hvm_need_lapic(void) + { + if (xen_pv_domain()) +-- +2.27.0 + diff --git a/queue-5.10/x86-xen-fix-nopvspin-build-error.patch b/queue-5.10/x86-xen-fix-nopvspin-build-error.patch new file mode 100644 index 00000000000..108e89d3766 --- /dev/null +++ b/queue-5.10/x86-xen-fix-nopvspin-build-error.patch @@ -0,0 +1,49 @@ +From 086b6a2379529b5b44fbd42c97a3a21eabc9e88d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 15 Jan 2021 11:11:23 -0800 +Subject: x86/xen: fix 'nopvspin' build error +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Randy Dunlap + +[ Upstream commit bd9dcef67ffcae2de49e319fba349df76472fd10 ] + +Fix build error in x86/xen/ when PARAVIRT_SPINLOCKS is not enabled. + +Fixes this build error: + +../arch/x86/xen/smp_hvm.c: In function ‘xen_hvm_smp_init’: +../arch/x86/xen/smp_hvm.c:77:3: error: ‘nopvspin’ undeclared (first use in this function) + nopvspin = true; + +Fixes: 3d7746bea925 ("x86/xen: Fix xen_hvm_smp_init() when vector callback not available") +Signed-off-by: Randy Dunlap +Reviewed-by: Juergen Gross +Cc: David Woodhouse +Cc: Juergen Gross +Link: https://lore.kernel.org/r/20210115191123.27572-1-rdunlap@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + arch/x86/xen/smp_hvm.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/x86/xen/smp_hvm.c b/arch/x86/xen/smp_hvm.c +index 056430a1080bb..6ff3c887e0b99 100644 +--- a/arch/x86/xen/smp_hvm.c ++++ b/arch/x86/xen/smp_hvm.c +@@ -74,7 +74,9 @@ void __init xen_hvm_smp_init(void) + smp_ops.cpu_die = xen_hvm_cpu_die; + + if (!xen_have_vector_callback) { ++#ifdef CONFIG_PARAVIRT_SPINLOCKS + nopvspin = true; ++#endif + return; + } + +-- +2.27.0 + diff --git a/queue-5.10/x86-xen-fix-xen_hvm_smp_init-when-vector-callback-no.patch b/queue-5.10/x86-xen-fix-xen_hvm_smp_init-when-vector-callback-no.patch new file mode 100644 index 00000000000..33f3bd0041e --- /dev/null +++ b/queue-5.10/x86-xen-fix-xen_hvm_smp_init-when-vector-callback-no.patch @@ -0,0 +1,122 @@ +From 2a1e057d72a302b752ecee3ba182f7f3b0138b9f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Jan 2021 15:39:58 +0000 +Subject: x86/xen: Fix xen_hvm_smp_init() when vector callback not available +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: David Woodhouse + +[ Upstream commit 3d7746bea92530e8695258a3cf3ddec7a135edd6 ] + +Only the IPI-related functions in the smp_ops should be conditional +on the vector callback being available. The rest should still happen: + + • xen_hvm_smp_prepare_boot_cpu() + + This function does two things, both of which should still happen if + there is no vector callback support. + + The call to xen_vcpu_setup() for vCPU0 should still happen as it just + sets up the vcpu_info for CPU0. That does happen for the secondary + vCPUs too, from xen_cpu_up_prepare_hvm(). + + The second thing it does is call xen_init_spinlocks(), which perhaps + counter-intuitively should *also* still be happening in the case + without vector callbacks, so that it can clear its local xen_pvspin + flag and disable the virt_spin_lock_key accordingly. + + Checking xen_have_vector_callback in xen_init_spinlocks() itself + would affect PV guests, so set the global nopvspin flag in + xen_hvm_smp_init() instead, when vector callbacks aren't available. + + • xen_hvm_smp_prepare_cpus() + + This does some IPI-related setup by calling xen_smp_intr_init() and + xen_init_lock_cpu(), which can be made conditional. And it sets the + xen_vcpu_id to XEN_VCPU_ID_INVALID for all possible CPUS, which does + need to happen. + + • xen_smp_cpus_done() + + This offlines any vCPUs which doesn't fit in the global shared_info + page, if separate vcpu_info placement isn't available. That part also + needs to happen regardless of vector callback support. + + • xen_hvm_cpu_die() + + This doesn't actually do anything other than commin_cpu_die() right + right now in the !vector_callback case; all three teardown functions + it calls should be no-ops. But to guard against future regressions + it's useful to call it anyway, and for it to explicitly check for + xen_have_vector_callback before calling those additional functions. + +Signed-off-by: David Woodhouse +Reviewed-by: Boris Ostrovsky +Link: https://lore.kernel.org/r/20210106153958.584169-6-dwmw2@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + arch/x86/xen/smp_hvm.c | 27 +++++++++++++++++---------- + 1 file changed, 17 insertions(+), 10 deletions(-) + +diff --git a/arch/x86/xen/smp_hvm.c b/arch/x86/xen/smp_hvm.c +index f5e7db4f82abb..056430a1080bb 100644 +--- a/arch/x86/xen/smp_hvm.c ++++ b/arch/x86/xen/smp_hvm.c +@@ -33,9 +33,11 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus) + int cpu; + + native_smp_prepare_cpus(max_cpus); +- WARN_ON(xen_smp_intr_init(0)); + +- xen_init_lock_cpu(0); ++ if (xen_have_vector_callback) { ++ WARN_ON(xen_smp_intr_init(0)); ++ xen_init_lock_cpu(0); ++ } + + for_each_possible_cpu(cpu) { + if (cpu == 0) +@@ -50,9 +52,11 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus) + static void xen_hvm_cpu_die(unsigned int cpu) + { + if (common_cpu_die(cpu) == 0) { +- xen_smp_intr_free(cpu); +- xen_uninit_lock_cpu(cpu); +- xen_teardown_timer(cpu); ++ if (xen_have_vector_callback) { ++ xen_smp_intr_free(cpu); ++ xen_uninit_lock_cpu(cpu); ++ xen_teardown_timer(cpu); ++ } + } + } + #else +@@ -64,14 +68,17 @@ static void xen_hvm_cpu_die(unsigned int cpu) + + void __init xen_hvm_smp_init(void) + { +- if (!xen_have_vector_callback) ++ smp_ops.smp_prepare_boot_cpu = xen_hvm_smp_prepare_boot_cpu; ++ smp_ops.smp_prepare_cpus = xen_hvm_smp_prepare_cpus; ++ smp_ops.smp_cpus_done = xen_smp_cpus_done; ++ smp_ops.cpu_die = xen_hvm_cpu_die; ++ ++ if (!xen_have_vector_callback) { ++ nopvspin = true; + return; ++ } + +- smp_ops.smp_prepare_cpus = xen_hvm_smp_prepare_cpus; + smp_ops.smp_send_reschedule = xen_smp_send_reschedule; +- smp_ops.cpu_die = xen_hvm_cpu_die; + smp_ops.send_call_func_ipi = xen_smp_send_call_function_ipi; + smp_ops.send_call_func_single_ipi = xen_smp_send_call_function_single_ipi; +- smp_ops.smp_prepare_boot_cpu = xen_hvm_smp_prepare_boot_cpu; +- smp_ops.smp_cpus_done = xen_smp_cpus_done; + } +-- +2.27.0 + diff --git a/queue-5.10/xen-fix-event-channel-callback-via-intx-gsi.patch b/queue-5.10/xen-fix-event-channel-callback-via-intx-gsi.patch new file mode 100644 index 00000000000..b725ca89289 --- /dev/null +++ b/queue-5.10/xen-fix-event-channel-callback-via-intx-gsi.patch @@ -0,0 +1,253 @@ +From 4649fd242176bb6a640ffc9c3f30f8d7bf7b367e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Jan 2021 13:26:02 +0000 +Subject: xen: Fix event channel callback via INTX/GSI + +From: David Woodhouse + +[ Upstream commit 3499ba8198cad47b731792e5e56b9ec2a78a83a2 ] + +For a while, event channel notification via the PCI platform device +has been broken, because we attempt to communicate with xenstore before +we even have notifications working, with the xs_reset_watches() call +in xs_init(). + +We tend to get away with this on Xen versions below 4.0 because we avoid +calling xs_reset_watches() anyway, because xenstore might not cope with +reading a non-existent key. And newer Xen *does* have the vector +callback support, so we rarely fall back to INTX/GSI delivery. + +To fix it, clean up a bit of the mess of xs_init() and xenbus_probe() +startup. Call xs_init() directly from xenbus_init() only in the !XS_HVM +case, deferring it to be called from xenbus_probe() in the XS_HVM case +instead. + +Then fix up the invocation of xenbus_probe() to happen either from its +device_initcall if the callback is available early enough, or when the +callback is finally set up. This means that the hack of calling +xenbus_probe() from a workqueue after the first interrupt, or directly +from the PCI platform device setup, is no longer needed. + +Signed-off-by: David Woodhouse +Reviewed-by: Boris Ostrovsky +Link: https://lore.kernel.org/r/20210113132606.422794-2-dwmw2@infradead.org +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + arch/arm/xen/enlighten.c | 2 +- + drivers/xen/events/events_base.c | 10 ---- + drivers/xen/platform-pci.c | 1 - + drivers/xen/xenbus/xenbus.h | 1 + + drivers/xen/xenbus/xenbus_comms.c | 8 --- + drivers/xen/xenbus/xenbus_probe.c | 81 +++++++++++++++++++++++++------ + include/xen/xenbus.h | 2 +- + 7 files changed, 70 insertions(+), 35 deletions(-) + +diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c +index 60e901cd0de6a..5a957a9a09843 100644 +--- a/arch/arm/xen/enlighten.c ++++ b/arch/arm/xen/enlighten.c +@@ -371,7 +371,7 @@ static int __init xen_guest_init(void) + } + gnttab_init(); + if (!xen_initial_domain()) +- xenbus_probe(NULL); ++ xenbus_probe(); + + /* + * Making sure board specific code will not set up ops for +diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c +index 6038c4c35db5a..bbebe248b7264 100644 +--- a/drivers/xen/events/events_base.c ++++ b/drivers/xen/events/events_base.c +@@ -2010,16 +2010,6 @@ static struct irq_chip xen_percpu_chip __read_mostly = { + .irq_ack = ack_dynirq, + }; + +-int xen_set_callback_via(uint64_t via) +-{ +- struct xen_hvm_param a; +- a.domid = DOMID_SELF; +- a.index = HVM_PARAM_CALLBACK_IRQ; +- a.value = via; +- return HYPERVISOR_hvm_op(HVMOP_set_param, &a); +-} +-EXPORT_SYMBOL_GPL(xen_set_callback_via); +- + #ifdef CONFIG_XEN_PVHVM + /* Vector callbacks are better than PCI interrupts to receive event + * channel notifications because we can receive vector callbacks on any +diff --git a/drivers/xen/platform-pci.c b/drivers/xen/platform-pci.c +index dd911e1ff782c..9db557b76511b 100644 +--- a/drivers/xen/platform-pci.c ++++ b/drivers/xen/platform-pci.c +@@ -149,7 +149,6 @@ static int platform_pci_probe(struct pci_dev *pdev, + ret = gnttab_init(); + if (ret) + goto grant_out; +- xenbus_probe(NULL); + return 0; + grant_out: + gnttab_free_auto_xlat_frames(); +diff --git a/drivers/xen/xenbus/xenbus.h b/drivers/xen/xenbus/xenbus.h +index 2a93b7c9c1599..dc15373354144 100644 +--- a/drivers/xen/xenbus/xenbus.h ++++ b/drivers/xen/xenbus/xenbus.h +@@ -115,6 +115,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, + const char *type, + const char *nodename); + int xenbus_probe_devices(struct xen_bus_type *bus); ++void xenbus_probe(void); + + void xenbus_dev_changed(const char *node, struct xen_bus_type *bus); + +diff --git a/drivers/xen/xenbus/xenbus_comms.c b/drivers/xen/xenbus/xenbus_comms.c +index eb5151fc8efab..e5fda0256feb3 100644 +--- a/drivers/xen/xenbus/xenbus_comms.c ++++ b/drivers/xen/xenbus/xenbus_comms.c +@@ -57,16 +57,8 @@ DEFINE_MUTEX(xs_response_mutex); + static int xenbus_irq; + static struct task_struct *xenbus_task; + +-static DECLARE_WORK(probe_work, xenbus_probe); +- +- + static irqreturn_t wake_waiting(int irq, void *unused) + { +- if (unlikely(xenstored_ready == 0)) { +- xenstored_ready = 1; +- schedule_work(&probe_work); +- } +- + wake_up(&xb_waitq); + return IRQ_HANDLED; + } +diff --git a/drivers/xen/xenbus/xenbus_probe.c b/drivers/xen/xenbus/xenbus_probe.c +index 44634d970a5ca..c8f0282bb6497 100644 +--- a/drivers/xen/xenbus/xenbus_probe.c ++++ b/drivers/xen/xenbus/xenbus_probe.c +@@ -683,29 +683,76 @@ void unregister_xenstore_notifier(struct notifier_block *nb) + } + EXPORT_SYMBOL_GPL(unregister_xenstore_notifier); + +-void xenbus_probe(struct work_struct *unused) ++void xenbus_probe(void) + { + xenstored_ready = 1; + ++ /* ++ * In the HVM case, xenbus_init() deferred its call to ++ * xs_init() in case callbacks were not operational yet. ++ * So do it now. ++ */ ++ if (xen_store_domain_type == XS_HVM) ++ xs_init(); ++ + /* Notify others that xenstore is up */ + blocking_notifier_call_chain(&xenstore_chain, 0, NULL); + } +-EXPORT_SYMBOL_GPL(xenbus_probe); + +-static int __init xenbus_probe_initcall(void) ++/* ++ * Returns true when XenStore init must be deferred in order to ++ * allow the PCI platform device to be initialised, before we ++ * can actually have event channel interrupts working. ++ */ ++static bool xs_hvm_defer_init_for_callback(void) + { +- if (!xen_domain()) +- return -ENODEV; ++#ifdef CONFIG_XEN_PVHVM ++ return xen_store_domain_type == XS_HVM && ++ !xen_have_vector_callback; ++#else ++ return false; ++#endif ++} + +- if (xen_initial_domain() || xen_hvm_domain()) +- return 0; ++static int __init xenbus_probe_initcall(void) ++{ ++ /* ++ * Probe XenBus here in the XS_PV case, and also XS_HVM unless we ++ * need to wait for the platform PCI device to come up. ++ */ ++ if (xen_store_domain_type == XS_PV || ++ (xen_store_domain_type == XS_HVM && ++ !xs_hvm_defer_init_for_callback())) ++ xenbus_probe(); + +- xenbus_probe(NULL); + return 0; + } +- + device_initcall(xenbus_probe_initcall); + ++int xen_set_callback_via(uint64_t via) ++{ ++ struct xen_hvm_param a; ++ int ret; ++ ++ a.domid = DOMID_SELF; ++ a.index = HVM_PARAM_CALLBACK_IRQ; ++ a.value = via; ++ ++ ret = HYPERVISOR_hvm_op(HVMOP_set_param, &a); ++ if (ret) ++ return ret; ++ ++ /* ++ * If xenbus_probe_initcall() deferred the xenbus_probe() ++ * due to the callback not functioning yet, we can do it now. ++ */ ++ if (!xenstored_ready && xs_hvm_defer_init_for_callback()) ++ xenbus_probe(); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(xen_set_callback_via); ++ + /* Set up event channel for xenstored which is run as a local process + * (this is normally used only in dom0) + */ +@@ -818,11 +865,17 @@ static int __init xenbus_init(void) + break; + } + +- /* Initialize the interface to xenstore. */ +- err = xs_init(); +- if (err) { +- pr_warn("Error initializing xenstore comms: %i\n", err); +- goto out_error; ++ /* ++ * HVM domains may not have a functional callback yet. In that ++ * case let xs_init() be called from xenbus_probe(), which will ++ * get invoked at an appropriate time. ++ */ ++ if (xen_store_domain_type != XS_HVM) { ++ err = xs_init(); ++ if (err) { ++ pr_warn("Error initializing xenstore comms: %i\n", err); ++ goto out_error; ++ } + } + + if ((xen_store_domain_type != XS_LOCAL) && +diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h +index 00c7235ae93e7..2c43b0ef1e4d5 100644 +--- a/include/xen/xenbus.h ++++ b/include/xen/xenbus.h +@@ -192,7 +192,7 @@ void xs_suspend_cancel(void); + + struct work_struct; + +-void xenbus_probe(struct work_struct *); ++void xenbus_probe(void); + + #define XENBUS_IS_ERR_READ(str) ({ \ + if (!IS_ERR(str) && strlen(str) == 0) { \ +-- +2.27.0 +