From: Matthias Kretz Date: Tue, 21 Mar 2023 13:20:52 +0000 (+0100) Subject: libstdc++: Skip integer division optimization for Clang X-Git-Tag: releases/gcc-12.3.0~211 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8d91c9dd93861c8ede2e150c60a64c591efa6e25;p=thirdparty%2Fgcc.git libstdc++: Skip integer division optimization for Clang Clang ICEs on _SimdImplX86::_S_divides. The function is only working around a missed optimization and not necessary for correctness. Therefore, don't use it for Clang. Signed-off-by: Matthias Kretz libstdc++-v3/ChangeLog: * include/experimental/bits/simd_detail.h: Don't define _GLIBCXX_SIMD_WORKAROUND_PR90993 for Clang. * include/experimental/bits/simd_x86.h (_S_divides): Remove check for __clang__. (cherry picked from commit 403e48ef441b0502af46ad3598f699f4a1611791) --- diff --git a/libstdc++-v3/include/experimental/bits/simd_detail.h b/libstdc++-v3/include/experimental/bits/simd_detail.h index 9135d3e75d34..de8d018c515e 100644 --- a/libstdc++-v3/include/experimental/bits/simd_detail.h +++ b/libstdc++-v3/include/experimental/bits/simd_detail.h @@ -316,7 +316,9 @@ #endif // integer division not optimized +#ifndef __clang__ #define _GLIBCXX_SIMD_WORKAROUND_PR90993 1 +#endif // very bad codegen for extraction and concatenation of 128/256 "subregisters" // with sizeof(element type) < 8: https://godbolt.org/g/mqUsgM diff --git a/libstdc++-v3/include/experimental/bits/simd_x86.h b/libstdc++-v3/include/experimental/bits/simd_x86.h index b9af1ce538cf..53e886c51364 100644 --- a/libstdc++-v3/include/experimental/bits/simd_x86.h +++ b/libstdc++-v3/include/experimental/bits/simd_x86.h @@ -1422,7 +1422,7 @@ template }, [&__xf, &__yf](auto __i) -> _SimdWrapper<_Float, __n_intermediate> { -#if !defined __clang__ && __GCC_IEC_559 == 0 +#if __GCC_IEC_559 == 0 // If -freciprocal-math is active, using the `/` operator is // incorrect because it may be translated to an imprecise // multiplication with reciprocal. We need to use inline @@ -1477,7 +1477,7 @@ template */ return _Base::_S_divides(__x, __y); } - #endif // _GLIBCXX_SIMD_WORKAROUND_PR90993 +#endif // _GLIBCXX_SIMD_WORKAROUND_PR90993 // }}} // _S_modulus {{{