From: Nick Clifton Date: Tue, 20 May 2014 09:38:00 +0000 (+0000) Subject: msp430.md (zero_extendpsisi2): Use + constraint on operand 0 in order to prevent... X-Git-Tag: releases/gcc-5.1.0~7449 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=8f0e7f6f6baab4910f91509466dda26de42035de;p=thirdparty%2Fgcc.git msp430.md (zero_extendpsisi2): Use + constraint on operand 0 in order to prevent confusion about the number of... * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on operand 0 in order to prevent confusion about the number of registers involved. From-SVN: r210636 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26142bad936c..3acd9637a28b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-05-20 Nick Clifton + + * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on + operand 0 in order to prevent confusion about the number of + registers involved. + 2014-05-20 Richard Biener PR tree-optimization/61221 diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index ceff537c31db..ecdc49359bf8 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -618,9 +618,15 @@ ; when the PSI value is negative.. ; ; Note: using PUSHM.A #1 is two bytes smaller than using PUSHX.A.... +; +; Note: We use a + constraint on operand 0 as otherwise GCC gets confused +; about extending a single PSI mode register into a pair of SImode registers +; with the same starting register. It thinks that the upper register of +; the pair is unused and so it can clobber it. Try compiling 20050826-2.c +; at -O2 to see this. (define_insn "zero_extendpsisi2" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "+r") (zero_extend:SI (match_operand:PSI 1 "register_operand" "r")))] "" "*