From: John Linn <john.linn@xilinx.com>
Date: Wed, 30 Nov 2011 00:51:42 +0000 (-0800)
Subject: Xilinx: ARM: update uart clock input for ZC770/DC1GEM testing
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=90558e12e97d29abd2922c6962fd222e54437e62;p=thirdparty%2Fu-boot.git

Xilinx: ARM: update uart clock input for ZC770/DC1GEM testing

The 100 Mb mode needs a 25 MHz clock input so this was needed
for this testing.
---

diff --git a/board/xilinx/dfe/xparameters_zynq.h b/board/xilinx/dfe/xparameters_zynq.h
index 1f7eb091b31..fc81e8d8023 100755
--- a/board/xilinx/dfe/xparameters_zynq.h
+++ b/board/xilinx/dfe/xparameters_zynq.h
@@ -51,7 +51,8 @@
 #define XPAR_XUARTPSS_0_INTR		51
 #define XPAR_XUARTPSS_1_DEVICE_ID	1
 #define XPAR_XUARTPSS_1_BASEADDR	XPSS_UART1_BASEADDR
-#define XPAR_XUARTPSS_1_CLOCK_HZ	13756480
+#define XPAR_XUARTPSS_1_CLOCK_HZ_OLD	13756480
+#define XPAR_XUARTPSS_1_CLOCK_HZ	50000000
 #define XPAR_XUARTPSS_1_INTR		75
 #define XPAR_XUARTPSS_NUM_INSTANCES	2