From: Adam Nemet <anemet@caviumnetworks.com>
Date: Thu, 11 Dec 2008 22:50:12 +0000 (+0000)
Subject: * config/mips/mips.md (*branch_bit<bbv><mode>,
X-Git-Tag: releases/gcc-4.4.0~1246
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=90a37af69f10782933e027450387f39670dd37af;p=thirdparty%2Fgcc.git

* config/mips/mips.md (*branch_bit<bbv><mode>,

	*branch_bit<bbv><mode>_inverted): Renumber operands so that the
	label becomes operands[1].

From-SVN: r142694
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 64a7b927315e..c792f1e2598d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2008-12-11  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* config/mips/mips.md (*branch_bit<bbv><mode>,
+	*branch_bit<bbv><mode>_inverted): Renumber operands so that the
+	label becomes operands[1].
+
 2008-12-11  Harsha Jagasia  <harsha.jagasia@amd.com>
 
 	PR tree-optimization/38446
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b9226c5c61d2..1b26f0298539 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5203,18 +5203,18 @@
   [(set (pc)
 	(if_then_else
 	 (equality_op (zero_extract:GPR
-		       (match_operand:GPR 1 "register_operand" "d")
+		       (match_operand:GPR 0 "register_operand" "d")
 		       (const_int 1)
 		       (match_operand 2 "const_int_operand" ""))
 		      (const_int 0))
-	 (label_ref (match_operand 0 ""))
+	 (label_ref (match_operand 1 ""))
 	 (pc)))]
   "ISA_HAS_BBIT && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)"
 {
   return
     mips_output_conditional_branch (insn, operands,
-				    MIPS_BRANCH ("bbit<bbv>", "%1,%2,%0"),
-				    MIPS_BRANCH ("bbit<bbinv>", "%1,%2,%0"));
+				    MIPS_BRANCH ("bbit<bbv>", "%0,%2,%1"),
+				    MIPS_BRANCH ("bbit<bbinv>", "%0,%2,%1"));
 }
   [(set_attr "type"	     "branch")
    (set_attr "mode"	     "none")
@@ -5224,18 +5224,18 @@
   [(set (pc)
 	(if_then_else
 	 (equality_op (zero_extract:GPR
-		       (match_operand:GPR 1 "register_operand" "d")
+		       (match_operand:GPR 0 "register_operand" "d")
 		       (const_int 1)
 		       (match_operand 2 "const_int_operand" ""))
 		      (const_int 0))
 	 (pc)
-	 (label_ref (match_operand 0 ""))))]
+	 (label_ref (match_operand 1 ""))))]
   "ISA_HAS_BBIT && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)"
 {
   return
     mips_output_conditional_branch (insn, operands,
-				    MIPS_BRANCH ("bbit<bbinv>", "%1,%2,%0"),
-				    MIPS_BRANCH ("bbit<bbv>", "%1,%2,%0"));
+				    MIPS_BRANCH ("bbit<bbinv>", "%0,%2,%1"),
+				    MIPS_BRANCH ("bbit<bbv>", "%0,%2,%1"));
 }
   [(set_attr "type"	     "branch")
    (set_attr "mode"	     "none")