From: Sasha Levin Date: Wed, 26 Jun 2024 19:04:37 +0000 (-0400) Subject: Fixes for 5.10 X-Git-Tag: v6.1.96~11 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=90b425c8a2a05daf5962ee742b44b575e6696185;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.10 Signed-off-by: Sasha Levin --- diff --git a/queue-5.10/acpi-add-quirks-for-amd-renoir-lucienne-cpus-to-forc.patch b/queue-5.10/acpi-add-quirks-for-amd-renoir-lucienne-cpus-to-forc.patch new file mode 100644 index 00000000000..53189716973 --- /dev/null +++ b/queue-5.10/acpi-add-quirks-for-amd-renoir-lucienne-cpus-to-forc.patch @@ -0,0 +1,127 @@ +From 7b3f482ed6d4bdc9f158d21ef4f7ea7326adfd3a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 9 Jun 2021 13:40:18 -0500 +Subject: ACPI: Add quirks for AMD Renoir/Lucienne CPUs to force the D3 hint + +From: Mario Limonciello + +[ Upstream commit 6485fc18faa01e8845b1e5bb55118e633f84d1f2 ] + +AMD systems from Renoir and Lucienne require that the NVME controller +is put into D3 over a Modern Standby / suspend-to-idle +cycle. This is "typically" accomplished using the `StorageD3Enable` +property in the _DSD, but this property was introduced after many +of these systems launched and most OEM systems don't have it in +their BIOS. + +On AMD Renoir without these drives going into D3 over suspend-to-idle +the resume will fail with the NVME controller being reset and a trace +like this in the kernel logs: +``` +[ 83.556118] nvme nvme0: I/O 161 QID 2 timeout, aborting +[ 83.556178] nvme nvme0: I/O 162 QID 2 timeout, aborting +[ 83.556187] nvme nvme0: I/O 163 QID 2 timeout, aborting +[ 83.556196] nvme nvme0: I/O 164 QID 2 timeout, aborting +[ 95.332114] nvme nvme0: I/O 25 QID 0 timeout, reset controller +[ 95.332843] nvme nvme0: Abort status: 0x371 +[ 95.332852] nvme nvme0: Abort status: 0x371 +[ 95.332856] nvme nvme0: Abort status: 0x371 +[ 95.332859] nvme nvme0: Abort status: 0x371 +[ 95.332909] PM: dpm_run_callback(): pci_pm_resume+0x0/0xe0 returns -16 +[ 95.332936] nvme 0000:03:00.0: PM: failed to resume async: error -16 +``` + +The Microsoft documentation for StorageD3Enable mentioned that Windows has +a hardcoded allowlist for D3 support, which was used for these platforms. +Introduce quirks to hardcode them for Linux as well. + +As this property is now "standardized", OEM systems using AMD Cezanne and +newer APU's have adopted this property, and quirks like this should not be +necessary. + +CC: Shyam-sundar S-k +CC: Alexander Deucher +CC: Prike Liang +Link: https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-intro +Signed-off-by: Mario Limonciello +Acked-by: Rafael J. Wysocki +Tested-by: Julian Sikorski +Signed-off-by: Christoph Hellwig +Stable-dep-of: e79a10652bbd ("ACPI: x86: Force StorageD3Enable on more products") +Signed-off-by: Sasha Levin +--- + drivers/acpi/device_pm.c | 3 +++ + drivers/acpi/internal.h | 9 +++++++++ + drivers/acpi/x86/utils.c | 25 +++++++++++++++++++++++++ + 3 files changed, 37 insertions(+) + +diff --git a/drivers/acpi/device_pm.c b/drivers/acpi/device_pm.c +index 66e53df758655..4c38846fea966 100644 +--- a/drivers/acpi/device_pm.c ++++ b/drivers/acpi/device_pm.c +@@ -1346,6 +1346,9 @@ bool acpi_storage_d3(struct device *dev) + struct acpi_device *adev = ACPI_COMPANION(dev); + u8 val; + ++ if (force_storage_d3()) ++ return true; ++ + if (!adev) + return false; + if (fwnode_property_read_u8(acpi_fwnode_handle(adev), "StorageD3Enable", +diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h +index 125e4901c9b47..f6c929787c9e6 100644 +--- a/drivers/acpi/internal.h ++++ b/drivers/acpi/internal.h +@@ -237,6 +237,15 @@ static inline int suspend_nvs_save(void) { return 0; } + static inline void suspend_nvs_restore(void) {} + #endif + ++#ifdef CONFIG_X86 ++bool force_storage_d3(void); ++#else ++static inline bool force_storage_d3(void) ++{ ++ return false; ++} ++#endif ++ + /*-------------------------------------------------------------------------- + Device properties + -------------------------------------------------------------------------- */ +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index 3f9a162be84e3..b3fb428461c6f 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -177,3 +177,28 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s + + return ret; + } ++ ++/* ++ * AMD systems from Renoir and Lucienne *require* that the NVME controller ++ * is put into D3 over a Modern Standby / suspend-to-idle cycle. ++ * ++ * This is "typically" accomplished using the `StorageD3Enable` ++ * property in the _DSD that is checked via the `acpi_storage_d3` function ++ * but this property was introduced after many of these systems launched ++ * and most OEM systems don't have it in their BIOS. ++ * ++ * The Microsoft documentation for StorageD3Enable mentioned that Windows has ++ * a hardcoded allowlist for D3 support, which was used for these platforms. ++ * ++ * This allows quirking on Linux in a similar fashion. ++ */ ++static const struct x86_cpu_id storage_d3_cpu_ids[] = { ++ X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */ ++ X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */ ++ {} ++}; ++ ++bool force_storage_d3(void) ++{ ++ return x86_match_cpu(storage_d3_cpu_ids); ++} +-- +2.43.0 + diff --git a/queue-5.10/acpi-x86-add-a-quirk-for-dell-inspiron-14-2-in-1-for.patch b/queue-5.10/acpi-x86-add-a-quirk-for-dell-inspiron-14-2-in-1-for.patch new file mode 100644 index 00000000000..46170548689 --- /dev/null +++ b/queue-5.10/acpi-x86-add-a-quirk-for-dell-inspiron-14-2-in-1-for.patch @@ -0,0 +1,62 @@ +From 13ba3c91fff2a619c968699554e4be0b94a1282a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Sep 2022 13:23:14 -0500 +Subject: ACPI: x86: Add a quirk for Dell Inspiron 14 2-in-1 for + StorageD3Enable + +From: Mario Limonciello + +[ Upstream commit 018d6711c26e4bd26e20a819fcc7f8ab902608f3 ] + +Dell Inspiron 14 2-in-1 has two ACPI nodes under GPP1 both with _ADR of +0, both without _HID. It's ambiguous which the kernel should take, but +it seems to take "DEV0". Unfortunately "DEV0" is missing the device +property `StorageD3Enable` which is present on "NVME". + +To avoid this causing problems for suspend, add a quirk for this system +to behave like `StorageD3Enable` property was found. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216440 +Reported-and-tested-by: Luya Tshimbalanga +Signed-off-by: Mario Limonciello +Reviewed-by: Hans de Goede +Signed-off-by: Rafael J. Wysocki +Stable-dep-of: e79a10652bbd ("ACPI: x86: Force StorageD3Enable on more products") +Signed-off-by: Sasha Levin +--- + drivers/acpi/x86/utils.c | 19 ++++++++++++++++++- + 1 file changed, 18 insertions(+), 1 deletion(-) + +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index b3fb428461c6f..3a3f09b6cbfc9 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -198,7 +198,24 @@ static const struct x86_cpu_id storage_d3_cpu_ids[] = { + {} + }; + ++static const struct dmi_system_id force_storage_d3_dmi[] = { ++ { ++ /* ++ * _ADR is ambiguous between GPP1.DEV0 and GPP1.NVME ++ * but .NVME is needed to get StorageD3Enable node ++ * https://bugzilla.kernel.org/show_bug.cgi?id=216440 ++ */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 14 7425 2-in-1"), ++ } ++ }, ++ {} ++}; ++ + bool force_storage_d3(void) + { +- return x86_match_cpu(storage_d3_cpu_ids); ++ const struct dmi_system_id *dmi_id = dmi_first_match(force_storage_d3_dmi); ++ ++ return dmi_id || x86_match_cpu(storage_d3_cpu_ids); + } +-- +2.43.0 + diff --git a/queue-5.10/acpi-x86-add-another-system-to-quirk-list-for-forcin.patch b/queue-5.10/acpi-x86-add-another-system-to-quirk-list-for-forcin.patch new file mode 100644 index 00000000000..f8f05114ee4 --- /dev/null +++ b/queue-5.10/acpi-x86-add-another-system-to-quirk-list-for-forcin.patch @@ -0,0 +1,47 @@ +From 2afdeab1a4952c29921b13844366e6f163cf8160 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Oct 2022 07:11:36 -0500 +Subject: ACPI: x86: Add another system to quirk list for forcing + StorageD3Enable + +From: Mario Limonciello + +[ Upstream commit 2124becad797245d49252d2d733aee0322233d7e ] + +commit 018d6711c26e4 ("ACPI: x86: Add a quirk for Dell Inspiron 14 2-in-1 +for StorageD3Enable") introduced a quirk to allow a system with ambiguous +use of _ADR 0 to force StorageD3Enable. + +Julius Brockmann reports that Inspiron 16 5625 suffers that same symptoms. +Add this other system to the list as well. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216440 +Reported-and-tested-by: Julius Brockmann +Signed-off-by: Mario Limonciello +Signed-off-by: Rafael J. Wysocki +Stable-dep-of: e79a10652bbd ("ACPI: x86: Force StorageD3Enable on more products") +Signed-off-by: Sasha Levin +--- + drivers/acpi/x86/utils.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index 3a3f09b6cbfc9..222b951ff56ae 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -210,6 +210,12 @@ static const struct dmi_system_id force_storage_d3_dmi[] = { + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 14 7425 2-in-1"), + } + }, ++ { ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 16 5625"), ++ } ++ }, + {} + }; + +-- +2.43.0 + diff --git a/queue-5.10/acpi-x86-force-storaged3enable-on-more-products.patch b/queue-5.10/acpi-x86-force-storaged3enable-on-more-products.patch new file mode 100644 index 00000000000..cae2a9fe0c6 --- /dev/null +++ b/queue-5.10/acpi-x86-force-storaged3enable-on-more-products.patch @@ -0,0 +1,83 @@ +From 40f3301c093bad8983cf7f2bcea5736480e3f2d4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 13:45:02 -0500 +Subject: ACPI: x86: Force StorageD3Enable on more products + +From: Mario Limonciello + +[ Upstream commit e79a10652bbd320649da705ca1ea0c04351af403 ] + +A Rembrandt-based HP thin client is reported to have problems where +the NVME disk isn't present after resume from s2idle. + +This is because the NVME disk wasn't put into D3 at suspend, and +that happened because the StorageD3Enable _DSD was missing in the BIOS. + +As AMD's architecture requires that the NVME is in D3 for s2idle, adjust +the criteria for force_storage_d3 to match *all* Zen SoCs when the FADT +advertises low power idle support. + +This will ensure that any future products with this BIOS deficiency don't +need to be added to the allow list of overrides. + +Cc: All applicable +Signed-off-by: Mario Limonciello +Acked-by: Hans de Goede +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/acpi/x86/utils.c | 24 ++++++++++-------------- + 1 file changed, 10 insertions(+), 14 deletions(-) + +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index 7d6083d40bf6b..aa4f233373afc 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -179,16 +179,16 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s + } + + /* +- * AMD systems from Renoir and Lucienne *require* that the NVME controller ++ * AMD systems from Renoir onwards *require* that the NVME controller + * is put into D3 over a Modern Standby / suspend-to-idle cycle. + * + * This is "typically" accomplished using the `StorageD3Enable` + * property in the _DSD that is checked via the `acpi_storage_d3` function +- * but this property was introduced after many of these systems launched +- * and most OEM systems don't have it in their BIOS. ++ * but some OEM systems still don't have it in their BIOS. + * + * The Microsoft documentation for StorageD3Enable mentioned that Windows has +- * a hardcoded allowlist for D3 support, which was used for these platforms. ++ * a hardcoded allowlist for D3 support as well as a registry key to override ++ * the BIOS, which has been used for these cases. + * + * This allows quirking on Linux in a similar fashion. + * +@@ -201,17 +201,13 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s + * https://bugzilla.kernel.org/show_bug.cgi?id=216773 + * https://bugzilla.kernel.org/show_bug.cgi?id=217003 + * 2) On at least one HP system StorageD3Enable is missing on the second NVME +- disk in the system. ++ * disk in the system. ++ * 3) On at least one HP Rembrandt system StorageD3Enable is missing on the only ++ * NVME device. + */ +-static const struct x86_cpu_id storage_d3_cpu_ids[] = { +- X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */ +- X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */ +- X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */ +- X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */ +- {} +-}; +- + bool force_storage_d3(void) + { +- return x86_match_cpu(storage_d3_cpu_ids); ++ if (!cpu_feature_enabled(X86_FEATURE_ZEN)) ++ return false; ++ return acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0; + } +-- +2.43.0 + diff --git a/queue-5.10/acpi-x86-utils-add-cezanne-to-the-list-for-forcing-s.patch b/queue-5.10/acpi-x86-utils-add-cezanne-to-the-list-for-forcing-s.patch new file mode 100644 index 00000000000..f828882cc16 --- /dev/null +++ b/queue-5.10/acpi-x86-utils-add-cezanne-to-the-list-for-forcing-s.patch @@ -0,0 +1,94 @@ +From cf02536e043a675494577bcf4e1fad913a95124f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Feb 2023 16:11:28 -0600 +Subject: ACPI: x86: utils: Add Cezanne to the list for forcing StorageD3Enable + +From: Mario Limonciello + +[ Upstream commit e2a56364485e7789e7b8f342637c7f3a219f7ede ] + +commit 018d6711c26e4 ("ACPI: x86: Add a quirk for Dell Inspiron 14 2-in-1 +for StorageD3Enable") introduced a quirk to allow a system with ambiguous +use of _ADR 0 to force StorageD3Enable. + +It was reported that several more Dell systems suffered the same symptoms. +As the list is continuing to grow but these are all Cezanne systems, +instead add Cezanne to the CPU list to apply the StorageD3Enable property +and remove the whole list. + +It was also reported that an HP system only has StorageD3Enable on the ACPI +device for the first NVME disk, not the second. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=217003 +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216773 +Reported-by: David Alvarez Lombardi +Reported-by: dbilios@stdio.gr +Reported-and-tested-by: Elvis Angelaccio +Tested-by: victor.bonnelle@proton.me +Tested-by: hurricanepootis@protonmail.com +Signed-off-by: Mario Limonciello +Signed-off-by: Rafael J. Wysocki +Stable-dep-of: e79a10652bbd ("ACPI: x86: Force StorageD3Enable on more products") +Signed-off-by: Sasha Levin +--- + drivers/acpi/x86/utils.c | 37 +++++++++++++------------------------ + 1 file changed, 13 insertions(+), 24 deletions(-) + +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index 222b951ff56ae..f1dd086d0b87d 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -191,37 +191,26 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s + * a hardcoded allowlist for D3 support, which was used for these platforms. + * + * This allows quirking on Linux in a similar fashion. ++ * ++ * Cezanne systems shouldn't *normally* need this as the BIOS includes ++ * StorageD3Enable. But for two reasons we have added it. ++ * 1) The BIOS on a number of Dell systems have ambiguity ++ * between the same value used for _ADR on ACPI nodes GPP1.DEV0 and GPP1.NVME. ++ * GPP1.NVME is needed to get StorageD3Enable node set properly. ++ * https://bugzilla.kernel.org/show_bug.cgi?id=216440 ++ * https://bugzilla.kernel.org/show_bug.cgi?id=216773 ++ * https://bugzilla.kernel.org/show_bug.cgi?id=217003 ++ * 2) On at least one HP system StorageD3Enable is missing on the second NVME ++ disk in the system. + */ + static const struct x86_cpu_id storage_d3_cpu_ids[] = { + X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */ + X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */ +- {} +-}; +- +-static const struct dmi_system_id force_storage_d3_dmi[] = { +- { +- /* +- * _ADR is ambiguous between GPP1.DEV0 and GPP1.NVME +- * but .NVME is needed to get StorageD3Enable node +- * https://bugzilla.kernel.org/show_bug.cgi?id=216440 +- */ +- .matches = { +- DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), +- DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 14 7425 2-in-1"), +- } +- }, +- { +- .matches = { +- DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), +- DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 16 5625"), +- } +- }, ++ X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */ + {} + }; + + bool force_storage_d3(void) + { +- const struct dmi_system_id *dmi_id = dmi_first_match(force_storage_d3_dmi); +- +- return dmi_id || x86_match_cpu(storage_d3_cpu_ids); ++ return x86_match_cpu(storage_d3_cpu_ids); + } +-- +2.43.0 + diff --git a/queue-5.10/acpi-x86-utils-add-picasso-to-the-list-for-forcing-s.patch b/queue-5.10/acpi-x86-utils-add-picasso-to-the-list-for-forcing-s.patch new file mode 100644 index 00000000000..e45e588e635 --- /dev/null +++ b/queue-5.10/acpi-x86-utils-add-picasso-to-the-list-for-forcing-s.patch @@ -0,0 +1,43 @@ +From 1555e131f47377f9a38d6b670d93d9c020bb5985 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 31 Mar 2023 11:08:42 -0500 +Subject: ACPI: x86: utils: Add Picasso to the list for forcing StorageD3Enable + +From: Mario Limonciello + +[ Upstream commit 10b6b4a8ac6120ec36555fd286eed577f7632e3b ] + +Picasso was the first APU that introduced s2idle support from AMD, +and it was predating before vendors started to use `StorageD3Enable` +in their firmware. + +Windows doesn't have problems with this hardware and NVME so it was +likely on the list of hardcoded CPUs to use this behavior in Windows. + +Add it to the list for Linux to avoid NVME resume issues. + +Reported-by: Stuart Axon +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449 +Signed-off-by: Mario Limonciello +Signed-off-by: Rafael J. Wysocki +Stable-dep-of: e79a10652bbd ("ACPI: x86: Force StorageD3Enable on more products") +Signed-off-by: Sasha Levin +--- + drivers/acpi/x86/utils.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c +index f1dd086d0b87d..7d6083d40bf6b 100644 +--- a/drivers/acpi/x86/utils.c ++++ b/drivers/acpi/x86/utils.c +@@ -204,6 +204,7 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s + disk in the system. + */ + static const struct x86_cpu_id storage_d3_cpu_ids[] = { ++ X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */ + X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */ + X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */ + X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */ +-- +2.43.0 + diff --git a/queue-5.10/series b/queue-5.10/series index 17872579ab0..676139abe80 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -247,3 +247,10 @@ pci-add-pci_error_response-and-related-definitions.patch x86-amd_nb-check-for-invalid-smn-reads.patch cifs-missed-ref-counting-smb-session-in-find.patch smb-client-fix-deadlock-in-smb2_find_smb_tcon.patch +x86-mm-numa-use-numa_no_node-when-calling-memblock_s.patch +acpi-add-quirks-for-amd-renoir-lucienne-cpus-to-forc.patch +acpi-x86-add-a-quirk-for-dell-inspiron-14-2-in-1-for.patch +acpi-x86-add-another-system-to-quirk-list-for-forcin.patch +acpi-x86-utils-add-cezanne-to-the-list-for-forcing-s.patch +acpi-x86-utils-add-picasso-to-the-list-for-forcing-s.patch +acpi-x86-force-storaged3enable-on-more-products.patch diff --git a/queue-5.10/x86-mm-numa-use-numa_no_node-when-calling-memblock_s.patch b/queue-5.10/x86-mm-numa-use-numa_no_node-when-calling-memblock_s.patch new file mode 100644 index 00000000000..65560841d8e --- /dev/null +++ b/queue-5.10/x86-mm-numa-use-numa_no_node-when-calling-memblock_s.patch @@ -0,0 +1,58 @@ +From 3f3923f87ef0003550849db873edeef43cbaf941 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 09:42:05 +0200 +Subject: x86/mm/numa: Use NUMA_NO_NODE when calling memblock_set_node() + +From: Jan Beulich + +[ Upstream commit 3ac36aa7307363b7247ccb6f6a804e11496b2b36 ] + +memblock_set_node() warns about using MAX_NUMNODES, see + + e0eec24e2e19 ("memblock: make memblock_set_node() also warn about use of MAX_NUMNODES") + +for details. + +Reported-by: Narasimhan V +Signed-off-by: Jan Beulich +Cc: stable@vger.kernel.org +[bp: commit message] +Signed-off-by: Borislav Petkov (AMD) +Reviewed-by: Mike Rapoport (IBM) +Tested-by: Paul E. McKenney +Link: https://lore.kernel.org/r/20240603141005.23261-1-bp@kernel.org +Link: https://lore.kernel.org/r/abadb736-a239-49e4-ab42-ace7acdd4278@suse.com +Signed-off-by: Mike Rapoport (IBM) +Signed-off-by: Sasha Levin +--- + arch/x86/mm/numa.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c +index 62a119170376b..74a117cbbd3c9 100644 +--- a/arch/x86/mm/numa.c ++++ b/arch/x86/mm/numa.c +@@ -523,7 +523,7 @@ static void __init numa_clear_kernel_node_hotplug(void) + for_each_reserved_mem_region(mb_region) { + int nid = memblock_get_region_node(mb_region); + +- if (nid != MAX_NUMNODES) ++ if (nid != NUMA_NO_NODE) + node_set(nid, reserved_nodemask); + } + +@@ -643,9 +643,9 @@ static int __init numa_init(int (*init_func)(void)) + nodes_clear(node_online_map); + memset(&numa_meminfo, 0, sizeof(numa_meminfo)); + WARN_ON(memblock_set_node(0, ULLONG_MAX, &memblock.memory, +- MAX_NUMNODES)); ++ NUMA_NO_NODE)); + WARN_ON(memblock_set_node(0, ULLONG_MAX, &memblock.reserved, +- MAX_NUMNODES)); ++ NUMA_NO_NODE)); + /* In case that parsing SRAT failed. */ + WARN_ON(memblock_clear_hotplug(0, ULLONG_MAX)); + numa_reset_distance(); +-- +2.43.0 +