From: Jagannadha Sutradharudu Teki Date: Fri, 4 Jan 2013 15:35:14 +0000 (+0530) Subject: xilinx: Remove ep107 board support X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=91be481710df018663eb54b05cd83c09168d2539;p=thirdparty%2Fu-boot.git xilinx: Remove ep107 board support This patch removes ep107 board references from u-boot tree as it is a legacy board and currently not tested u-boot on these boards. Signed-off-by: Jagannadha Sutradharudu Teki --- diff --git a/board/xilinx/zynq/lowlevel_init.S b/board/xilinx/zynq/lowlevel_init.S index 3524f1f7098..65fabdf480d 100644 --- a/board/xilinx/zynq/lowlevel_init.S +++ b/board/xilinx/zynq/lowlevel_init.S @@ -64,16 +64,6 @@ lowlevel_init: ldr r2, =0x767B str r2, [r1] -#ifdef CONFIG_EP107 - # this should not be needed after EP107 - - # Do nothing if DDR already running - ldr r1, =(XPSS_DDR_CTRL_BASEADDR + 0) - ldr r2, [r1] - ldr r3, =0x201 - cmp r2, r3 - bne doit -#endif mov pc, lr doit: diff --git a/boards.cfg b/boards.cfg index 68593ec9aab..9ff0e7656e9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -264,8 +264,6 @@ tricorder arm armv7 tricorder corscie twister arm armv7 twister technexion omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 -zynq_ep107 arm armv7 zynq xilinx zynq -zynq_ep107_dual_qspi arm armv7 zynq xilinx zynq zynq_ep107:XILINX_PSS_QSPI_USE_DUAL_FLASH zynq_zc770_XM010 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM010 zynq_zc770_XM011 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM011 zynq_zc770_XM011_n16b arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM011,XILINX_ZYNQ_NAND_BUSWIDTH_16 diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 2ab4abdefab..5596e8f0915 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -387,18 +387,13 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) #else /* PHY Setup */ -#ifdef CONFIG_EP107 - /* "add delay to RGMII rx interface" */ - phywrite(dev, priv->phyaddr, 20, 0xc93); - phywrite(EmacPssInstancePtr, priv->phyaddr, 20, 0xc93); -#else phywrite(dev, priv->phyaddr, 22, 2); /* page 2 */ /* rx clock transition when data stable */ phywrite(dev, priv->phyaddr, 21, 0x3030); phywrite(dev, priv->phyaddr, 22, 0); /* page 0 */ -#endif + u16 tmp; /* link speed advertisement for autonegotiation */ diff --git a/drivers/net/zynq_gem_wrap.c b/drivers/net/zynq_gem_wrap.c index d7ea98ad42a..0af5c0fa9c9 100644 --- a/drivers/net/zynq_gem_wrap.c +++ b/drivers/net/zynq_gem_wrap.c @@ -277,15 +277,6 @@ int Xgmac_init(struct eth_device *dev, bd_t * bis) tmp |= (1 << 10); /* MAC pause implemented */ phy_wr(EmacPssInstancePtr, 4, tmp); -#ifdef CONFIG_EP107 - /* Extended PHY specific control register */ - tmp = phy_rd(EmacPssInstancePtr, 20); - tmp |= (7 << 9); /* max number of gigabit attempts */ - tmp |= (1 << 8); /* enable downshift */ - tmp |= (1 << 7); /* RGMII receive timing internally delayed */ - tmp |= (1 << 1); /* RGMII transmit clock internally delayed */ - phy_wr(EmacPssInstancePtr, 20, tmp); -#else /* Copper specific control register 1 */ tmp = phy_rd(EmacPssInstancePtr, 16); tmp |= (7 << 12); /* max number of gigabit attempts */ @@ -299,7 +290,6 @@ int Xgmac_init(struct eth_device *dev, bd_t * bis) tmp |= (1 << 4); /* RGMII transmit clock internally delayed */ phy_wr(EmacPssInstancePtr, 21, tmp); phy_wr(EmacPssInstancePtr, 22, 0); /* page 0 */ -#endif /* Control register */ tmp = phy_rd(EmacPssInstancePtr, 0); @@ -308,16 +298,10 @@ int Xgmac_init(struct eth_device *dev, bd_t * bis) phy_wr(EmacPssInstancePtr, 0, tmp); /***** Try to establish a link at the highest speed possible *****/ -#ifdef CONFIG_EP107 - /* CR-659040: - * Advertise link speed as 100Mbps for ep107 targets - */ - Xgmac_set_eth_advertise(EmacPssInstancePtr, 100); -#else /* CR-659040 */ /* Could be 1000 if an unknown bug is fixed */ Xgmac_set_eth_advertise(EmacPssInstancePtr, 1000); -#endif + phy_rst(EmacPssInstancePtr); /* Attempt auto-negotiation */ @@ -377,21 +361,12 @@ int Xgmac_init(struct eth_device *dev, bd_t * bis) Out32(0xF8000138, ((0 << 4) | (1 << 0))); /* Set divisors for appropriate frequency in GEM0_CLK_CTRL */ -#ifdef CONFIG_EP107 - if (link_speed == 1000) /* 125MHz */ - Out32(0xF8000140, ((1 << 20) | (48 << 8) | (1 << 4) | (1 << 0))); - else if (link_speed == 100) /* 25 MHz */ - Out32(0xF8000140, ((1 << 20) | (48 << 8) | (0 << 4) | (1 << 0))); - else /* 2.5 MHz */ - Out32(0xF8000140, ((1 << 20) | (48 << 8) | (3 << 4) | (1 << 0))); -#else if (link_speed == 1000) /* 125MHz */ Out32(0xF8000140, ((1 << 20) | (8 << 8) | (0 << 4) | (1 << 0))); else if (link_speed == 100) /* 25 MHz */ Out32(0xF8000140, ((1 << 20) | (40 << 8) | (0 << 4) | (1 << 0))); else /* 2.5 MHz */ Out32(0xF8000140, ((10 << 20) | (40 << 8) | (0 << 4) | (1 << 0))); -#endif /* SLCR lock */ Out32(0xF8000004, 0x767B); diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 9146ee92985..f78fed86d9c 100755 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -1418,15 +1418,6 @@ int xqspips_check_is_dual_flash(void __iomem *regs_base) u32 mio_pin_index; void *mio_base; -#ifdef CONFIG_EP107 -#ifdef CONFIG_XILINX_PSS_QSPI_USE_DUAL_FLASH - is_dual = 1; -#else - is_dual = 0; -#endif - return is_dual; -#endif - mio_base = regs_base + 0x700; /* checking single QSPI MIO's */ diff --git a/include/configs/zynq_ep107.h b/include/configs/zynq_ep107.h deleted file mode 100644 index 34b57832764..00000000000 --- a/include/configs/zynq_ep107.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * (C) Copyright 2012 Xilinx - * - * Configuration settings for the Xilinx Zynq EP107 board. - * See zynq_common.h for Zynq common configs - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_ZYNQ_EP107_H -#define __CONFIG_ZYNQ_EP107_H - -#define CONFIG_EP107 /* Board */ - -#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) - -#define CONFIG_ZYNQ_SERIAL_UART0 -#define CONFIG_PHY_ADDR 23 - -#define CONFIG_ZYNQ_GEM_OLD -#define CONFIG_XGMAC_PHY_ADDR CONFIG_PHY_ADDR -#define CONFIG_SYS_ENET - -#define CONFIG_CPU_FREQ_HZ 12500000 - -#define CONFIG_MMC -#define CONFIG_ZYNQ_SPI -#define CONFIG_NAND_ZYNQ - -#include - -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "ethaddr=00:0a:35:00:01:22\0" \ - "kernel_size=0x140000\0" \ - "ramdisk_size=0x200000\0" \ - "nand_kernel_size=0x400000\0" \ - "nand_ramdisk_size=0x400000\0" \ - "norboot=echo Copying Linux from NOR flash to RAM...;" \ - "cp 0xE2100000 0x8000 ${kernel_size};" \ - "cp 0xE2600000 0x1000000 0x8000;" \ - "echo Copying ramdisk...;" \ - "cp 0xE3000000 0x800000 ${ramdisk_size};" \ - "go 0x8000\0" \ - "qspiboot=echo Copying Linux from QSPI flash to RAM...;" \ - "cp 0xFC100000 0x8000 ${kernel_size};" \ - "cp 0xFC600000 0x1000000 0x8000;" \ - "echo Copying ramdisk...;" \ - "cp 0xFC800000 0x800000 ${ramdisk_size};" \ - "go 0x8000\0" \ - "sdboot=echo Copying Linux from SD to RAM...;" \ - "mmcinfo;" \ - "fatload mmc 0 0x8000 zImage;" \ - "fatload mmc 0 0x1000000 devicetree.dtb;" \ - "fatload mmc 0 0x800000 ramdisk8M.image.gz;" \ - "go 0x8000\0" \ - "nandboot=echo Copying Linux from NAND flash to RAM...;" \ - "nand read 0x8000 0x200000 ${nand_kernel_size};" \ - "nand read 0x1000000 0x700000 0x20000;" \ - "echo Copying ramdisk...;" \ - "nand read 0x800000 0x900000 ${nand_ramdisk_size};" \ - "go 0x8000\0" \ - "jtagboot=echo TFTPing Linux to RAM...;" \ - "tftp 0x8000 zImage;" \ - "tftp 0x1000000 devicetree.dtb;" \ - "tftp 0x800000 ramdisk8M.image.gz;" \ - "go 0x8000\0" - -/* Place a Xilinx Boot ROM header in u-boot image? */ -#define CONFIG_ZYNQ_XILINX_FLASH_HEADER -#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE - -#endif /* __CONFIG_ZYNQ_EP107_H */