From: Greg Kroah-Hartman Date: Thu, 13 Apr 2023 14:46:04 +0000 (+0200) Subject: drop 2 drm amdgpu patches X-Git-Tag: v5.15.107~2 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=93b3fc939a0e3f04a4f1216462695ddae3bab85f;p=thirdparty%2Fkernel%2Fstable-queue.git drop 2 drm amdgpu patches --- diff --git a/queue-5.15/drm-amdgpu-fix-amdgpu_job_free_resources-v2.patch b/queue-5.15/drm-amdgpu-fix-amdgpu_job_free_resources-v2.patch deleted file mode 100644 index 389686349fd..00000000000 --- a/queue-5.15/drm-amdgpu-fix-amdgpu_job_free_resources-v2.patch +++ /dev/null @@ -1,50 +0,0 @@ -From e92b352cf7fc95f802a0b5a710069af4daa04e40 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 12 Jan 2023 14:46:00 +0100 -Subject: drm/amdgpu: fix amdgpu_job_free_resources v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Christian König - -[ Upstream commit 1427a720273976a81d13d9d9fa60d53ce881cbd7 ] - -It can be that neither fence were initialized when we run out of UVD -streams for example. - -v2: fix typo breaking compile - -Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2324 -Signed-off-by: Christian König -Reviewed-by: Alex Deucher -Signed-off-by: Alex Deucher -Signed-off-by: Sasha Levin ---- - drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c -index de29518673dd3..90a83aaa9908c 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c -@@ -135,8 +135,14 @@ void amdgpu_job_free_resources(struct amdgpu_job *job) - else - hw_fence = &job->hw_fence; - -- /* use sched fence if available */ -- f = job->base.s_fence ? &job->base.s_fence->finished : hw_fence; -+ /* Check if any fences where initialized */ -+ if (job->base.s_fence && job->base.s_fence->finished.ops) -+ f = &job->base.s_fence->finished; -+ else if (job->hw_fence.ops) -+ f = &job->hw_fence; -+ else -+ f = NULL; -+ - for (i = 0; i < job->num_ibs; ++i) - amdgpu_ib_free(ring->adev, &job->ibs[i], f); - } --- -2.39.2 - diff --git a/queue-5.15/drm-amdgpu-prevent-race-between-late-signaled-fences.patch b/queue-5.15/drm-amdgpu-prevent-race-between-late-signaled-fences.patch deleted file mode 100644 index 308fc442cb5..00000000000 --- a/queue-5.15/drm-amdgpu-prevent-race-between-late-signaled-fences.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 99466fc2f9a85035bbdad1a89e942297b5d042c4 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sat, 18 Jun 2022 00:28:50 -0400 -Subject: drm/amdgpu: Prevent race between late signaled fences and GPU reset. -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Andrey Grodzovsky - -[ Upstream commit 9e225fb9e636b31b97e9d35324c2f9e43ee0aab4 ] - -Problem: -After we start handling timed out jobs we assume there fences won't be -signaled but we cannot be sure and sometimes they fire late. We need -to prevent concurrent accesses to fence array from -amdgpu_fence_driver_clear_job_fences during GPU reset and amdgpu_fence_process -from a late EOP interrupt. - -Fix: -Before accessing fence array in GPU disable EOP interrupt and flush -all pending interrupt handlers for amdgpu device's interrupt line. - -v2: Switch from irq_get/put to full enable/disable_irq for amdgpu - -Signed-off-by: Andrey Grodzovsky -Acked-by: Christian König -Signed-off-by: Alex Deucher -Stable-dep-of: 1427a7202739 ("drm/amdgpu: fix amdgpu_job_free_resources v2") -Signed-off-by: Sasha Levin ---- - drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++++ - drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 18 ++++++++++++++++++ - drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + - 3 files changed, 23 insertions(+) - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -index 2f51789d98181..8711d39fc2f71 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -@@ -4609,6 +4609,8 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, - amdgpu_virt_fini_data_exchange(adev); - } - -+ amdgpu_fence_driver_isr_toggle(adev, true); -+ - /* block all schedulers and reset given job's ring */ - for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { - struct amdgpu_ring *ring = adev->rings[i]; -@@ -4631,6 +4633,8 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, - amdgpu_fence_driver_force_completion(ring); - } - -+ amdgpu_fence_driver_isr_toggle(adev, false); -+ - if (job && job->vm) - drm_sched_increase_karma(&job->base); - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c -index bbd6f7a123033..f3d7094184530 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c -@@ -569,6 +569,24 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) - } - } - -+/* Will either stop and flush handlers for amdgpu interrupt or reanble it */ -+void amdgpu_fence_driver_isr_toggle(struct amdgpu_device *adev, bool stop) -+{ -+ int i; -+ -+ for (i = 0; i < AMDGPU_MAX_RINGS; i++) { -+ struct amdgpu_ring *ring = adev->rings[i]; -+ -+ if (!ring || !ring->fence_drv.initialized || !ring->fence_drv.irq_src) -+ continue; -+ -+ if (stop) -+ disable_irq(adev->irq.irq); -+ else -+ enable_irq(adev->irq.irq); -+ } -+} -+ - void amdgpu_fence_driver_sw_fini(struct amdgpu_device *adev) - { - unsigned int i, j; -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h -index e713d31619fe7..fc87a1fea8b44 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h -@@ -131,6 +131,7 @@ signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring, - uint32_t wait_seq, - signed long timeout); - unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring); -+void amdgpu_fence_driver_isr_toggle(struct amdgpu_device *adev, bool stop); - - /* - * Rings. --- -2.39.2 - diff --git a/queue-5.15/series b/queue-5.15/series index 4b65332e1ca..e8529234278 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -10,8 +10,6 @@ iavf-return-errno-code-instead-of-status-code.patch iavf-iavf_main-actually-log-src-mask-when-talking-ab.patch serial-8250_exar-derive-nr_ports-from-pci-id-for-acc.patch serial-exar-add-support-for-sealevel-7xxxc-serial-ca.patch -drm-amdgpu-prevent-race-between-late-signaled-fences.patch -drm-amdgpu-fix-amdgpu_job_free_resources-v2.patch bpf-hash-map-avoid-deadlock-with-suitable-hash-mask.patch gpio-gpio_regmap-select-regmap-instead-of-depending-.patch drivers-vmbus-check-for-channel-allocation-before-lo.patch