From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 26 Nov 2015 09:30:50 +0000 (+0100)
Subject: net: gem: Sync pointer conversions with mainline
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=959f63544377b2230a56f3190573799a35c11df8;p=thirdparty%2Fu-boot.git

net: gem: Sync pointer conversions with mainline

"driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep"
(sha1: 5b47d407e477b9995127aacca2d9a4665e2fde23)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 9f53d20a52c..afa565c3cb7 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -354,13 +354,13 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 		for (i = 0; i < RX_BUF; i++) {
 			priv->rx_bd[i].status = 0xF0000000;
 			priv->rx_bd[i].addr =
-					((unsigned long)(priv->rxbuffers) +
+					((ulong)(priv->rxbuffers) +
 							(i * PKTSIZE_ALIGN));
 		}
 		/* WRAP bit to last BD */
 		priv->rx_bd[--i].addr |= ZYNQ_GEM_RXBUF_WRAP_MASK;
 		/* Write RxBDs to IP */
-		writel((unsigned long)priv->rx_bd, &regs->rxqbase);
+		writel((ulong)priv->rx_bd, &regs->rxqbase);
 
 		/* Setup for DMA Configuration register */
 		writel(ZYNQ_GEM_DMACR_INIT, &regs->dmacr);
@@ -385,8 +385,8 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 		flush_dcache_range((ulong)&dummy_rx_bd, (ulong)&dummy_rx_bd +
 				   sizeof(dummy_rx_bd));
 
-		writel((unsigned long)dummy_tx_bd, &regs->transmit_q1_ptr);
-		writel((unsigned long)dummy_rx_bd, &regs->receive_q1_ptr);
+		writel((ulong)dummy_tx_bd, &regs->transmit_q1_ptr);
+		writel((ulong)dummy_rx_bd, &regs->receive_q1_ptr);
 
 		priv->init++;
 	}
@@ -479,7 +479,7 @@ static inline int wait_for_bit(const char *func, u32 *reg, const u32 mask,
 
 static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
 {
-	unsigned long addr, size;
+	u32 addr, size;
 	struct zynq_gem_priv *priv = dev->priv;
 	struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
 	struct emac_bd *current_bd = &priv->tx_bd[1];
@@ -487,7 +487,7 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
 	/* Setup Tx BD */
 	memset(priv->tx_bd, 0, sizeof(struct emac_bd));
 
-	priv->tx_bd->addr = (unsigned long)ptr;
+	priv->tx_bd->addr = (ulong)ptr;
 	priv->tx_bd->status = (len & ZYNQ_GEM_TXBUF_FRMLEN_MASK) |
 			       ZYNQ_GEM_TXBUF_LAST_MASK;
 	/* Dummy descriptor to mark it as the last in descriptor chain */
@@ -497,14 +497,14 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
 			     ZYNQ_GEM_TXBUF_USED_MASK;
 
 	/* setup BD */
-	writel((unsigned long)priv->tx_bd, &regs->txqbase);
+	writel((ulong)priv->tx_bd, &regs->txqbase);
 
-	addr = (unsigned long)ptr;
+	addr = (ulong)ptr;
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	size = roundup(len, ARCH_DMA_MINALIGN);
 	flush_dcache_range(addr, addr + size);
 
-	addr = (unsigned long)priv->rxbuffers;
+	addr = (ulong)priv->rxbuffers;
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
 	flush_dcache_range(addr, addr + size);
@@ -540,10 +540,10 @@ static int zynq_gem_recv(struct eth_device *dev)
 
 	frame_len = current_bd->status & ZYNQ_GEM_RXBUF_LEN_MASK;
 	if (frame_len) {
-		unsigned long addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
+		u32 addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
 		addr &= ~(ARCH_DMA_MINALIGN - 1);
 
-		net_process_received_packet((u8 *)addr, frame_len);
+		net_process_received_packet((u8 *)(ulong)addr, frame_len);
 
 		if (current_bd->status & ZYNQ_GEM_RXBUF_SOF_MASK)
 			priv->rx_first_buf = priv->rxbd_current;
@@ -622,8 +622,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
 
 	/* Initialize the bd spaces for tx and rx bd's */
 	priv->tx_bd = (struct emac_bd *)bd_space;
-	priv->rx_bd = (struct emac_bd *)((unsigned long)bd_space +
-					 BD_SEPRN_SPACE);
+	priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
 
 	priv->phyaddr = phy_addr;
 	priv->emio = emio;