From: Michael Meissner Date: Tue, 20 Nov 2012 19:29:02 +0000 (+0000) Subject: rs6000.md (movdf_hardfloat32): Add a comment explaining the register ordering prefere... X-Git-Tag: releases/gcc-4.8.0~1881 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=96ceaa374efabc4d137c416fcdd62f9f158abbde;p=thirdparty%2Fgcc.git rs6000.md (movdf_hardfloat32): Add a comment explaining the register ordering preferences. 2012-11-20 Michael Meissner * config/rs6000/rs6000.md (movdf_hardfloat32): Add a comment explaining the register ordering preferences. From-SVN: r193673 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09ab535d6a69..30a611274d3b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-11-20 Michael Meissner + + * config/rs6000/rs6000.md (movdf_hardfloat32): Add a comment + explaining the register ordering preferences. + 2012-11-20 Aldy Hernandez PR tree-optimization/55350 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 25682036de53..7719ec3bad8e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8018,6 +8018,14 @@ ;; Don't have reload use general registers to load a constant. It is ;; less efficient than loading the constant into an FP register, since ;; it will probably be used there. + +;; The move constraints are ordered to prefer floating point registers before +;; general purpose registers to avoid doing a store and a load to get the value +;; into a floating point register when it is needed for a floating point +;; operation. Prefer traditional floating point registers over VSX registers, +;; since the D-form version of the memory instructions does not need a GPR for +;; reloading. + (define_insn "*movdf_hardfloat32" [(set (match_operand:DF 0 "nonimmediate_operand" "=m,d,d,ws,?wa,Z,?Z,ws,?wa,wa,Y,r,!r,!r,!r,!r") (match_operand:DF 1 "input_operand" "d,m,d,Z,Z,ws,wa,ws,wa,j,r,Y,r,G,H,F"))]