From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Tue, 29 Aug 2023 06:48:32 +0000 (+0800)
Subject: vect test: Remove xfail for riscv
X-Git-Tag: basepoints/gcc-15~6600
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=97aafa9cbb68ffa23aa9f018cc5cb30648a72427;p=thirdparty%2Fgcc.git

vect test: Remove xfail for riscv

We are planning to enable "vect" testsuite with scalable vector auto-vectorization.

This case XPASS:
XPASS: gcc.dg/vect/no-scevccp-outer-12.c scan-tree-dump-times vect "OUTER LOOP VECTORIZED." 1

like ARM SVE.
gcc/testsuite/ChangeLog:

	* gcc.dg/vect/no-scevccp-outer-12.c: Add riscv xfail.
---

diff --git a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
index e9ec4ca0da31..c2d3031bc0ce 100644
--- a/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
+++ b/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
@@ -47,4 +47,4 @@ int main (void)
 }
 
 /* Until we support multiple types in the inner loop  */
-/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! aarch64*-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { aarch64*-*-* riscv*-*-* } } } } } */