From: Philippe Mathieu-Daudé Date: Wed, 18 Mar 2026 10:31:18 +0000 (+0100) Subject: target/riscv: Replace MO_TE by mo_endian (Zalasr extension) X-Git-Tag: v11.1.0-rc0~149^2~35 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=9aa565e744d36f2e5552ff92fd1f3bf34624a9d4;p=thirdparty%2Fqemu.git target/riscv: Replace MO_TE by mo_endian (Zalasr extension) Replace compile-time MO_TE evaluation by runtime mo_endian() one, which expand target endianness from DisasContext. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-ID: <20260318103122.97244-14-philmd@linaro.org> Signed-off-by: Alistair Francis --- diff --git a/target/riscv/insn_trans/trans_rvzalasr.c.inc b/target/riscv/insn_trans/trans_rvzalasr.c.inc index 2b1f73f650b..0f307affecf 100644 --- a/target/riscv/insn_trans/trans_rvzalasr.c.inc +++ b/target/riscv/insn_trans/trans_rvzalasr.c.inc @@ -29,7 +29,7 @@ static bool gen_load_acquire(DisasContext *ctx, arg_lb_aqrl *a, MemOp memop) return false; } - memop |= MO_ALIGN | MO_TE; + memop |= MO_ALIGN | mo_endian(ctx); memop |= (ctx->cfg_ptr->ext_zama16b) ? MO_ATOM_WITHIN16 : 0; tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop); @@ -79,7 +79,7 @@ static bool gen_store_release(DisasContext *ctx, arg_sb_aqrl *a, MemOp memop) return false; } - memop |= MO_ALIGN | MO_TE; + memop |= MO_ALIGN | mo_endian(ctx); memop |= (ctx->cfg_ptr->ext_zama16b) ? MO_ATOM_WITHIN16 : 0; /* Add a memory barrier implied by RL (mandatory) and AQ (optional) */