From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 9 Feb 2017 13:43:53 +0000 (+0100)
Subject: arm64: zynqmp: Use VPLL to generate clock for DP
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=9b38278d6ce8739b441ca5514ea7f06420d4395a;p=thirdparty%2Fu-boot.git

arm64: zynqmp: Use VPLL to generate clock for DP

There is no need to generate clock with si570 when zynqmp clock driver
is in place.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts
index 7e7a9603caa..2a5ce7dc9aa 100644
--- a/arch/arm/dts/zynqmp-zcu102.dts
+++ b/arch/arm/dts/zynqmp-zcu102.dts
@@ -944,7 +944,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 
 &xilinx_drm {
 	status = "okay";
-	clocks = <&si570_1>;
 };
 
 &xlnx_dp {
@@ -956,7 +955,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 
 &xlnx_dp_sub {
 	status = "okay";
-	xlnx,vid-clk-pl;
 };
 
 &xlnx_dp_snd_pcm0 {