From: Sasha Levin Date: Mon, 2 Oct 2023 11:02:53 +0000 (-0400) Subject: Fixes for 5.10 X-Git-Tag: v6.5.6~67 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=9c81ef5bf37cc0edb992e5f8bfea94fccf0d5d9e;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.10 Signed-off-by: Sasha Levin --- diff --git a/queue-5.10/arm-dts-am335x-guardian-update-beeper-label.patch b/queue-5.10/arm-dts-am335x-guardian-update-beeper-label.patch new file mode 100644 index 00000000000..5e409fe8313 --- /dev/null +++ b/queue-5.10/arm-dts-am335x-guardian-update-beeper-label.patch @@ -0,0 +1,53 @@ +From 8411cd8b9eef048a85bb3cfa33eabf63ff77aa7d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 25 Mar 2022 10:06:05 +0000 +Subject: ARM: dts: am335x: Guardian: Update beeper label + +From: Gireesh Hiremath + +[ Upstream commit b5bf6b434575d32aeaa70c82ec84b3cec92e2973 ] + + * Update lable pwm to guardian beeper + +Signed-off-by: Gireesh Hiremath +Message-Id: <20220325100613.1494-8-Gireesh.Hiremath@in.bosch.com> +Signed-off-by: Tony Lindgren +Stable-dep-of: ac08bda1569b ("ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am335x-guardian.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-guardian.dts b/arch/arm/boot/dts/am335x-guardian.dts +index 1918766c1f809..b113edab76955 100644 +--- a/arch/arm/boot/dts/am335x-guardian.dts ++++ b/arch/arm/boot/dts/am335x-guardian.dts +@@ -100,11 +100,11 @@ + + }; + +- pwm7: dmtimer-pwm { ++ guardian_beeper: dmtimer-pwm@7 { + compatible = "ti,omap-dmtimer-pwm"; + ti,timers = <&timer7>; + pinctrl-names = "default"; +- pinctrl-0 = <&dmtimer7_pins>; ++ pinctrl-0 = <&guardian_beeper_pins>; + ti,clock-source = <0x01>; + }; + +@@ -343,9 +343,9 @@ + >; + }; + +- dmtimer7_pins: pinmux_dmtimer7_pins { ++ guardian_beeper_pins: pinmux_dmtimer7_pins { + pinctrl-single,pins = < +- AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) ++ AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */ + >; + }; + +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-motorola-mapphone-add-1.2ghz-opp.patch b/queue-5.10/arm-dts-motorola-mapphone-add-1.2ghz-opp.patch new file mode 100644 index 00000000000..6aa6ca2b448 --- /dev/null +++ b/queue-5.10/arm-dts-motorola-mapphone-add-1.2ghz-opp.patch @@ -0,0 +1,66 @@ +From b6030c4ee91545114c2b503a068f00fbbcc44517 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Dec 2020 10:42:32 +0200 +Subject: ARM: dts: motorola-mapphone: Add 1.2GHz OPP + +From: Carl Philipp Klemm + +[ Upstream commit 19e367147ea8864dff1fb153cfab6d8e8da10324 ] + +The omap4430 HS HIGH performance devces support 1.2GHz opp, lower speed +variants do not. However for mapphone devices Motorola seems to have +decided that this does not really matter for the SoC variants they have +tested to use, and decided to clock all devices, including the ones with +STANDARD performance chips at 1.2GHz upon release of the 3.0.8 vendor +kernel shiped with Android 4.0. Therefore it seems safe to do the same, +but let's only do it for Motorola devices as the others have not been +tested. + +Note that we prevent overheating with the passive cooling device +cpu_alert0 configured in the dts file that starts lowering the speed as +needed. + +This also removes the "failed to find current OPP for freq 1200000000" +warning. + +Cc: Merlijn Wajer +Cc: Pavel Machek +Cc: Sebastian Reichel +Signed-off-by: Carl Philipp Klemm +[tony@atomide.com: made motorola specific, updated comments] +Signed-off-by: Tony Lindgren +Stable-dep-of: ac08bda1569b ("ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/motorola-mapphone-common.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/arm/boot/dts/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +index 807042a293d0a..ab0672131c212 100644 +--- a/arch/arm/boot/dts/motorola-mapphone-common.dtsi ++++ b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +@@ -200,6 +200,21 @@ + temperature = <80000>; /* millicelsius */ + }; + ++&cpu0 { ++ /* ++ * Note that the 1.2GiHz mode is enabled for all SoC variants for ++ * the Motorola Android Linux v3.0.8 based kernel. ++ */ ++ operating-points = < ++ /* kHz uV */ ++ 300000 1025000 ++ 600000 1200000 ++ 800000 1313000 ++ 1008000 1375000 ++ 1200000 1375000 ++ >; ++}; ++ + &dss { + status = "okay"; + }; +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-motorola-mapphone-configure-lower-temperatur.patch b/queue-5.10/arm-dts-motorola-mapphone-configure-lower-temperatur.patch new file mode 100644 index 00000000000..2e8d2bb40e8 --- /dev/null +++ b/queue-5.10/arm-dts-motorola-mapphone-configure-lower-temperatur.patch @@ -0,0 +1,56 @@ +From a3dcd8ff8bcfefb91b5145a816ab59551ffe9e5e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 30 Dec 2020 10:42:31 +0200 +Subject: ARM: dts: motorola-mapphone: Configure lower temperature passive + cooling + +From: Tony Lindgren + +[ Upstream commit 5c3db2d4d4ed747e714387362afe007e6ae5e2d3 ] + +The current cooling device temperature is too high at 100C as we have a +battery on the device right next to the SoC as pointed out by Carl Philipp +Klemm . Let's configure the max temperature to 80C. + +As we only have a tshut interrupt and no talert interrupt on 4430, we have +a passive cooling device configured for 4430. However, we want the poll +interval to be 10 seconds instead of 1 second for power management. The +value of 10 seconds seems like plenty of time to notice the temperature +increase above the 75C temperatures. Having the bandgap temperature change +seems to take several tens of seconds because of heat dissipation above +75C range as monitored with a full CPU load. + +Cc: Carl Philipp Klemm +Cc: Merlijn Wajer +Cc: Pavel Machek +Cc: Sebastian Reichel +Suggested-by: Carl Philipp Klemm +Signed-off-by: Tony Lindgren +Stable-dep-of: ac08bda1569b ("ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/motorola-mapphone-common.dtsi | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/boot/dts/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +index 5f8f77cfbe59f..807042a293d0a 100644 +--- a/arch/arm/boot/dts/motorola-mapphone-common.dtsi ++++ b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +@@ -192,6 +192,14 @@ + }; + }; + ++&cpu_thermal { ++ polling-delay = <10000>; /* milliseconds */ ++}; ++ ++&cpu_alert0 { ++ temperature = <80000>; /* millicelsius */ ++}; ++ + &dss { + status = "okay"; + }; +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-motorola-mapphone-drop-second-ti-wlcore-comp.patch b/queue-5.10/arm-dts-motorola-mapphone-drop-second-ti-wlcore-comp.patch new file mode 100644 index 00000000000..f282d27777a --- /dev/null +++ b/queue-5.10/arm-dts-motorola-mapphone-drop-second-ti-wlcore-comp.patch @@ -0,0 +1,39 @@ +From eb34745dcc3626af9b737d057149c60285677999 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 3 Dec 2021 15:10:43 +0100 +Subject: ARM: dts: motorola-mapphone: Drop second ti,wlcore compatible value + +From: Geert Uytterhoeven + +[ Upstream commit 7ebe6e99f7702dad342486e5b30d989a0a6499af ] + +The TI wlcore DT bindings specify using a single compatible value for +each variant, and the Linux kernel driver matches against the first +compatible value since commit 078b30da3f074f2e ("wlcore: add wl1285 +compatible") in v4.13. + +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Sebastian Reichel +Signed-off-by: Tony Lindgren +Stable-dep-of: ac08bda1569b ("ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/motorola-mapphone-common.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +index ab0672131c212..4227b7f49e46c 100644 +--- a/arch/arm/boot/dts/motorola-mapphone-common.dtsi ++++ b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +@@ -407,7 +407,7 @@ + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { +- compatible = "ti,wl1285", "ti,wl1283"; ++ compatible = "ti,wl1285"; + reg = <2>; + /* gpio_100 with gpmc_wait2 pad as wakeirq */ + interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>, +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-omap-correct-indentation.patch b/queue-5.10/arm-dts-omap-correct-indentation.patch new file mode 100644 index 00000000000..c6a8f7916e6 --- /dev/null +++ b/queue-5.10/arm-dts-omap-correct-indentation.patch @@ -0,0 +1,393 @@ +From 536ac75e0bcb314575e746141dbf90e3107234fa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 2 Oct 2022 11:20:02 +0200 +Subject: ARM: dts: omap: correct indentation + +From: Krzysztof Kozlowski + +[ Upstream commit 8ae9c7a69fa14e95d032e64d8d758e3f85bee132 ] + +Do not use spaces for indentation. + +Link: https://lore.kernel.org/r/20221002092002.68880-1-krzysztof.kozlowski@linaro.org +Signed-off-by: Krzysztof Kozlowski +Stable-dep-of: 6469b2feade8 ("ARM: dts: ti: omap: Fix bandgap thermal cells addressing for omap3/4") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi | 6 +-- + arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi | 6 +-- + arch/arm/boot/dts/omap3-cm-t3517.dts | 12 ++--- + arch/arm/boot/dts/omap3-gta04.dtsi | 6 +-- + arch/arm/boot/dts/omap3-ldp.dts | 2 +- + arch/arm/boot/dts/omap3-n900.dts | 38 +++++++------- + arch/arm/boot/dts/omap3-zoom3.dts | 44 ++++++++-------- + arch/arm/boot/dts/omap4-cpu-thermal.dtsi | 24 ++++----- + arch/arm/boot/dts/omap5-cm-t54.dts | 64 +++++++++++------------ + 9 files changed, 101 insertions(+), 101 deletions(-) + +diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi +index ded7e8fec9eba..9cf52650f0731 100644 +--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi ++++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi +@@ -8,9 +8,9 @@ + + / { + vddvario: regulator-vddvario { +- compatible = "regulator-fixed"; +- regulator-name = "vddvario"; +- regulator-always-on; ++ compatible = "regulator-fixed"; ++ regulator-name = "vddvario"; ++ regulator-always-on; + }; + + vdd33a: regulator-vdd33a { +diff --git a/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi +index e7534fe9c53cf..bc8961f3690f0 100644 +--- a/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi ++++ b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi +@@ -12,9 +12,9 @@ + + / { + vddvario: regulator-vddvario { +- compatible = "regulator-fixed"; +- regulator-name = "vddvario"; +- regulator-always-on; ++ compatible = "regulator-fixed"; ++ regulator-name = "vddvario"; ++ regulator-always-on; + }; + + vdd33a: regulator-vdd33a { +diff --git a/arch/arm/boot/dts/omap3-cm-t3517.dts b/arch/arm/boot/dts/omap3-cm-t3517.dts +index 3b8349094baa6..f25c0a84a190c 100644 +--- a/arch/arm/boot/dts/omap3-cm-t3517.dts ++++ b/arch/arm/boot/dts/omap3-cm-t3517.dts +@@ -11,12 +11,12 @@ + model = "CompuLab CM-T3517"; + compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; + +- vmmc: regulator-vmmc { +- compatible = "regulator-fixed"; +- regulator-name = "vmmc"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- }; ++ vmmc: regulator-vmmc { ++ compatible = "regulator-fixed"; ++ regulator-name = "vmmc"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + + wl12xx_vmmc2: wl12xx_vmmc2 { + compatible = "regulator-fixed"; +diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi +index e61e5ddbf2027..0333ca0e87fe3 100644 +--- a/arch/arm/boot/dts/omap3-gta04.dtsi ++++ b/arch/arm/boot/dts/omap3-gta04.dtsi +@@ -332,7 +332,7 @@ + OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ + OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ + >; +- }; ++ }; + + gps_pins: pinmux_gps_pins { + pinctrl-single,pins = < +@@ -866,8 +866,8 @@ + }; + + &hdqw1w { +- pinctrl-names = "default"; +- pinctrl-0 = <&hdq_pins>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdq_pins>; + }; + + /* image signal processor within OMAP3 SoC */ +diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts +index 9c6a927245904..b898e2f6f41dc 100644 +--- a/arch/arm/boot/dts/omap3-ldp.dts ++++ b/arch/arm/boot/dts/omap3-ldp.dts +@@ -301,5 +301,5 @@ + + &vaux1 { + /* Needed for ads7846 */ +- regulator-name = "vcc"; ++ regulator-name = "vcc"; + }; +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index d40c3d2c4914e..fdd929bc65d79 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -236,27 +236,27 @@ + pinctrl-single,pins = < + + /* address lines */ +- OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ +- OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ +- OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ ++ OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ ++ OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ ++ OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ + + /* data lines, gpmc_d0..d7 not muxable according to TRM */ +- OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ +- OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ +- OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ +- OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ +- OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ +- OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ +- OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ +- OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ ++ OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ ++ OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ ++ OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ ++ OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ ++ OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ ++ OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ ++ OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ ++ OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ + + /* + * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable + * according to TRM. OneNAND seems to require PIN_INPUT on clock. + */ +- OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ +- OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ +- >; ++ OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ ++ OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ ++ >; + }; + + i2c1_pins: pinmux_i2c1_pins { +@@ -738,12 +738,12 @@ + + si4713: si4713@63 { + compatible = "silabs,si4713"; +- reg = <0x63>; ++ reg = <0x63>; + +- interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */ +- reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */ +- vio-supply = <&vio>; +- vdd-supply = <&vaux1>; ++ interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */ ++ reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */ ++ vio-supply = <&vio>; ++ vdd-supply = <&vaux1>; + }; + + bq24150a: bq24150a@6b { +diff --git a/arch/arm/boot/dts/omap3-zoom3.dts b/arch/arm/boot/dts/omap3-zoom3.dts +index 0482676d18306..ce58b1f208e81 100644 +--- a/arch/arm/boot/dts/omap3-zoom3.dts ++++ b/arch/arm/boot/dts/omap3-zoom3.dts +@@ -23,9 +23,9 @@ + }; + + vddvario: regulator-vddvario { +- compatible = "regulator-fixed"; +- regulator-name = "vddvario"; +- regulator-always-on; ++ compatible = "regulator-fixed"; ++ regulator-name = "vddvario"; ++ regulator-always-on; + }; + + vdd33a: regulator-vdd33a { +@@ -84,28 +84,28 @@ + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < +- OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ +- OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ +- OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ +- OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ ++ OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ ++ OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ ++ OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ ++ OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ + >; + }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < +- OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ +- OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ +- OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ +- OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ ++ OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ ++ OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ ++ OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ ++ OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < +- OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ +- OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ +- OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ +- OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ ++ OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ ++ OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ ++ OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ ++ OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ + >; + }; + +@@ -205,22 +205,22 @@ + }; + + &uart1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart1_pins>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; + }; + + &uart2 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart2_pins>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; + }; + + &uart3 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart3_pins>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; + }; + + &uart4 { +- status = "disabled"; ++ status = "disabled"; + }; + + &usb_otg_hs { +diff --git a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +index 4d7eeb133dadd..801b4f10350c1 100644 +--- a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +@@ -13,20 +13,20 @@ cpu_thermal: cpu_thermal { + polling-delay = <1000>; /* milliseconds */ + + /* sensor ID */ +- thermal-sensors = <&bandgap 0>; ++ thermal-sensors = <&bandgap 0>; + + cpu_trips: trips { +- cpu_alert0: cpu_alert { +- temperature = <100000>; /* millicelsius */ +- hysteresis = <2000>; /* millicelsius */ +- type = "passive"; +- }; +- cpu_crit: cpu_crit { +- temperature = <125000>; /* millicelsius */ +- hysteresis = <2000>; /* millicelsius */ +- type = "critical"; +- }; +- }; ++ cpu_alert0: cpu_alert { ++ temperature = <100000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ cpu_crit: cpu_crit { ++ temperature = <125000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; + + cpu_cooling_maps: cooling-maps { + map0 { +diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts +index e62ea8b6d53fd..af288d63a26a4 100644 +--- a/arch/arm/boot/dts/omap5-cm-t54.dts ++++ b/arch/arm/boot/dts/omap5-cm-t54.dts +@@ -84,36 +84,36 @@ + }; + + lcd0: display { +- compatible = "startek,startek-kd050c", "panel-dpi"; +- label = "lcd"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&lcd_pins>; +- +- enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>; +- +- panel-timing { +- clock-frequency = <33000000>; +- hactive = <800>; +- vactive = <480>; +- hfront-porch = <40>; +- hback-porch = <40>; +- hsync-len = <43>; +- vback-porch = <29>; +- vfront-porch = <13>; +- vsync-len = <3>; +- hsync-active = <0>; +- vsync-active = <0>; +- de-active = <1>; +- pixelclk-active = <1>; +- }; +- +- port { +- lcd_in: endpoint { +- remote-endpoint = <&dpi_lcd_out>; +- }; +- }; +- }; ++ compatible = "startek,startek-kd050c", "panel-dpi"; ++ label = "lcd"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcd_pins>; ++ ++ enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>; ++ ++ panel-timing { ++ clock-frequency = <33000000>; ++ hactive = <800>; ++ vactive = <480>; ++ hfront-porch = <40>; ++ hback-porch = <40>; ++ hsync-len = <43>; ++ vback-porch = <29>; ++ vfront-porch = <13>; ++ vsync-len = <3>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <1>; ++ pixelclk-active = <1>; ++ }; ++ ++ port { ++ lcd_in: endpoint { ++ remote-endpoint = <&dpi_lcd_out>; ++ }; ++ }; ++ }; + + hdmi0: connector0 { + compatible = "hdmi-connector"; +@@ -644,8 +644,8 @@ + }; + + &usb3 { +- extcon = <&extcon_usb3>; +- vbus-supply = <&smps10_out1_reg>; ++ extcon = <&extcon_usb3>; ++ vbus-supply = <&smps10_out1_reg>; + }; + + &cpu0 { +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-ti-omap-fix-bandgap-thermal-cells-addressing.patch b/queue-5.10/arm-dts-ti-omap-fix-bandgap-thermal-cells-addressing.patch new file mode 100644 index 00000000000..d01e6324af5 --- /dev/null +++ b/queue-5.10/arm-dts-ti-omap-fix-bandgap-thermal-cells-addressing.patch @@ -0,0 +1,89 @@ +From 173582c3069b5ce598a5ef0b9bad7559409e8c63 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 11 Sep 2023 07:07:38 +0300 +Subject: ARM: dts: ti: omap: Fix bandgap thermal cells addressing for omap3/4 + +From: Tony Lindgren + +[ Upstream commit 6469b2feade8fd82d224dd3734e146536f3e9f0e ] + +Fix "thermal_sys: cpu_thermal: Failed to read thermal-sensors cells: -2" +error on boot for omap3/4. This is caused by wrong addressing in the dts +for bandgap sensor for single sensor instances. + +Note that omap4-cpu-thermal.dtsi is shared across omap4/5 and dra7, so +we can't just change the addressing in omap4-cpu-thermal.dtsi. + +Cc: Ivaylo Dimitrov +Cc: Carl Philipp Klemm +Cc: Merlijn Wajer +Cc: Pavel Machek +Reviewed-by: Sebastian Reichel +Fixes: a761d517bbb1 ("ARM: dts: omap3: Add cpu_thermal zone") +Fixes: 0bbf6c54d100 ("arm: dts: add omap4 CPU thermal data") +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap3-cpu-thermal.dtsi | 3 +-- + arch/arm/boot/dts/omap4-cpu-thermal.dtsi | 5 ++++- + arch/arm/boot/dts/omap443x.dtsi | 1 + + arch/arm/boot/dts/omap4460.dtsi | 1 + + 4 files changed, 7 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi +index 1ba79932a79fc..4d2684e4ae06e 100644 +--- a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi +@@ -12,8 +12,7 @@ cpu_thermal: cpu_thermal { + polling-delay = <1000>; /* milliseconds */ + coefficients = <0 20000>; + +- /* sensor ID */ +- thermal-sensors = <&bandgap 0>; ++ thermal-sensors = <&bandgap>; + + cpu_trips: trips { + cpu_alert0: cpu_alert { +diff --git a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +index 801b4f10350c1..d484ec1e4fd86 100644 +--- a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +@@ -12,7 +12,10 @@ cpu_thermal: cpu_thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + +- /* sensor ID */ ++ /* ++ * See 44xx files for single sensor addressing, omap5 and dra7 need ++ * also sensor ID for addressing. ++ */ + thermal-sensors = <&bandgap 0>; + + cpu_trips: trips { +diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi +index 1095fc9011add..8677cc63cbebc 100644 +--- a/arch/arm/boot/dts/omap443x.dtsi ++++ b/arch/arm/boot/dts/omap443x.dtsi +@@ -69,6 +69,7 @@ + }; + + &cpu_thermal { ++ thermal-sensors = <&bandgap>; + coefficients = <0 20000>; + }; + +diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi +index 21ddff965c83e..acad1d6d1fd5b 100644 +--- a/arch/arm/boot/dts/omap4460.dtsi ++++ b/arch/arm/boot/dts/omap4460.dtsi +@@ -86,6 +86,7 @@ + }; + + &cpu_thermal { ++ thermal-sensors = <&bandgap>; + coefficients = <348 (-9301)>; + }; + +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-ti-omap-motorola-mapphone-fix-abe_clkctrl-wa.patch b/queue-5.10/arm-dts-ti-omap-motorola-mapphone-fix-abe_clkctrl-wa.patch new file mode 100644 index 00000000000..7e3da78041e --- /dev/null +++ b/queue-5.10/arm-dts-ti-omap-motorola-mapphone-fix-abe_clkctrl-wa.patch @@ -0,0 +1,56 @@ +From ccc5b83d1a0301a1a550679f3ffcb7d1ffcc82d8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 11 Sep 2023 07:07:38 +0300 +Subject: ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on + boot + +From: Tony Lindgren + +[ Upstream commit ac08bda1569b06b7a62c7b4dd00d4c3b28ceaaec ] + +Commit 0840242e8875 ("ARM: dts: Configure clock parent for pwm vibra") +attempted to fix the PWM settings but ended up causin an additional clock +reparenting error: + +clk: failed to reparent abe-clkctrl:0060:24 to sys_clkin_ck: -22 + +Only timer9 is in the PER domain and can use the sys_clkin_ck clock source. +For timer8, the there is no sys_clkin_ck available as it's in the ABE +domain, instead it should use syc_clk_div_ck. However, for power +management, we want to use the always on sys_32k_ck instead. + +Cc: Ivaylo Dimitrov +Cc: Carl Philipp Klemm +Cc: Merlijn Wajer +Cc: Pavel Machek +Reviewed-by: Sebastian Reichel +Fixes: 0840242e8875 ("ARM: dts: Configure clock parent for pwm vibra") +Depends-on: 61978617e905 ("ARM: dts: Add minimal support for Droid Bionic xt875") +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/motorola-mapphone-common.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +index 2b9ae5242cdf0..8cb26b924d3ca 100644 +--- a/arch/arm/boot/dts/motorola-mapphone-common.dtsi ++++ b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +@@ -739,12 +739,12 @@ + /* Configure pwm clock source for timers 8 & 9 */ + &timer8 { + assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; +- assigned-clock-parents = <&sys_clkin_ck>; ++ assigned-clock-parents = <&sys_32k_ck>; + }; + + &timer9 { + assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; +- assigned-clock-parents = <&sys_clkin_ck>; ++ assigned-clock-parents = <&sys_32k_ck>; + }; + + /* +-- +2.40.1 + diff --git a/queue-5.10/arm-dts-unify-pwm-omap-dmtimer-node-names.patch b/queue-5.10/arm-dts-unify-pwm-omap-dmtimer-node-names.patch new file mode 100644 index 00000000000..dff108bcafa --- /dev/null +++ b/queue-5.10/arm-dts-unify-pwm-omap-dmtimer-node-names.patch @@ -0,0 +1,117 @@ +From d32d27f246a6adc0e49f136d5dcf1845ed8a95e6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 18 Nov 2022 14:19:24 +0200 +Subject: ARM: dts: Unify pwm-omap-dmtimer node names + +From: Tony Lindgren + +[ Upstream commit 4f15fc7c0f28ffcd6e9a56396db6edcdfa4c9925 ] + +There is no reg property for pwm-omap-dmtimer. + +Cc: Krzysztof Kozlowski +Cc: Rob Herring +Signed-off-by: Tony Lindgren +Stable-dep-of: ac08bda1569b ("ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am335x-guardian.dts | 3 ++- + arch/arm/boot/dts/am3517-evm.dts | 2 +- + arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi | 2 +- + arch/arm/boot/dts/motorola-mapphone-common.dtsi | 4 ++-- + arch/arm/boot/dts/omap3-gta04.dtsi | 2 +- + arch/arm/boot/dts/omap3-n900.dts | 2 +- + 6 files changed, 8 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-guardian.dts b/arch/arm/boot/dts/am335x-guardian.dts +index b113edab76955..9594276acf9d2 100644 +--- a/arch/arm/boot/dts/am335x-guardian.dts ++++ b/arch/arm/boot/dts/am335x-guardian.dts +@@ -100,8 +100,9 @@ + + }; + +- guardian_beeper: dmtimer-pwm@7 { ++ guardian_beeper: pwm-7 { + compatible = "ti,omap-dmtimer-pwm"; ++ #pwm-cells = <3>; + ti,timers = <&timer7>; + pinctrl-names = "default"; + pinctrl-0 = <&guardian_beeper_pins>; +diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts +index c8b80f156ec98..9cc1ae36c4204 100644 +--- a/arch/arm/boot/dts/am3517-evm.dts ++++ b/arch/arm/boot/dts/am3517-evm.dts +@@ -150,7 +150,7 @@ + enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */ + }; + +- pwm11: dmtimer-pwm@11 { ++ pwm11: pwm-11 { + compatible = "ti,omap-dmtimer-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; +diff --git a/arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi b/arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi +index 533a47bc4a531..1386a5e63eff7 100644 +--- a/arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi ++++ b/arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi +@@ -59,7 +59,7 @@ + }; + }; + +- pwm10: dmtimer-pwm { ++ pwm10: pwm-10 { + compatible = "ti,omap-dmtimer-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; +diff --git a/arch/arm/boot/dts/motorola-mapphone-common.dtsi b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +index 4227b7f49e46c..2b9ae5242cdf0 100644 +--- a/arch/arm/boot/dts/motorola-mapphone-common.dtsi ++++ b/arch/arm/boot/dts/motorola-mapphone-common.dtsi +@@ -156,7 +156,7 @@ + dais = <&mcbsp2_port>, <&mcbsp3_port>; + }; + +- pwm8: dmtimer-pwm-8 { ++ pwm8: pwm-8 { + pinctrl-names = "default"; + pinctrl-0 = <&vibrator_direction_pin>; + +@@ -166,7 +166,7 @@ + ti,clock-source = <0x01>; + }; + +- pwm9: dmtimer-pwm-9 { ++ pwm9: pwm-9 { + pinctrl-names = "default"; + pinctrl-0 = <&vibrator_enable_pin>; + +diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi +index 0333ca0e87fe3..68e56b50652a9 100644 +--- a/arch/arm/boot/dts/omap3-gta04.dtsi ++++ b/arch/arm/boot/dts/omap3-gta04.dtsi +@@ -147,7 +147,7 @@ + pinctrl-0 = <&backlight_pins>; + }; + +- pwm11: dmtimer-pwm { ++ pwm11: pwm-11 { + compatible = "ti,omap-dmtimer-pwm"; + ti,timers = <&timer11>; + #pwm-cells = <3>; +diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts +index fdd929bc65d79..7dafd69b7d359 100644 +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -156,7 +156,7 @@ + io-channel-names = "temp", "bsi", "vbat"; + }; + +- pwm9: dmtimer-pwm { ++ pwm9: pwm-9 { + compatible = "ti,omap-dmtimer-pwm"; + #pwm-cells = <3>; + ti,timers = <&timer9>; +-- +2.40.1 + diff --git a/queue-5.10/bus-ti-sysc-fix-missing-am35xx-soc-matching.patch b/queue-5.10/bus-ti-sysc-fix-missing-am35xx-soc-matching.patch new file mode 100644 index 00000000000..26245c04c7f --- /dev/null +++ b/queue-5.10/bus-ti-sysc-fix-missing-am35xx-soc-matching.patch @@ -0,0 +1,83 @@ +From e90224fbaf5b79b4b19c47832d63e136f6e1ec14 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 6 Sep 2023 18:34:42 -0500 +Subject: bus: ti-sysc: Fix missing AM35xx SoC matching + +From: Adam Ford + +[ Upstream commit 11729caa520950e17cd81bc43ffc477c46cf791e ] + +Commit feaa8baee82a ("bus: ti-sysc: Implement SoC revision handling") +created a list of SoC types searching for strings based on names +and wildcards which associates the SoC to different families. + +The OMAP34xx and OMAP35xx are treated as SOC_3430 while +OMAP36xx and OMAP37xx are treated as SOC_3630, but the AM35xx +isn't listed. + +The AM35xx is mostly an OMAP3430, and a later commit a12315d6d270 +("bus: ti-sysc: Make omap3 gpt12 quirk handling SoC specific") looks +for the SOC type and behaves in a certain way if it's SOC_3430. + +This caused a regression on the AM3517 causing it to return two +errors: + + ti-sysc: probe of 48318000.target-module failed with error -16 + ti-sysc: probe of 49032000.target-module failed with error -16 + +Fix this by treating the creating SOC_AM35 and inserting it between +the SOC_3430 and SOC_3630. If it is treaed the same way as the +SOC_3430 when checking the status of sysc_check_active_timer, +the error conditions will disappear. + +Fixes: a12315d6d270 ("bus: ti-sysc: Make omap3 gpt12 quirk handling SoC specific") +Fixes: feaa8baee82a ("bus: ti-sysc: Implement SoC revision handling") +Signed-off-by: Adam Ford +Message-ID: <20230906233442.270835-1-aford173@gmail.com> +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + drivers/bus/ti-sysc.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 24d589b43dfe7..5dba06ed61bf8 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -38,6 +38,7 @@ enum sysc_soc { + SOC_2420, + SOC_2430, + SOC_3430, ++ SOC_AM35, + SOC_3630, + SOC_4430, + SOC_4460, +@@ -1818,7 +1819,7 @@ static void sysc_pre_reset_quirk_dss(struct sysc *ddata) + dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n", + __func__, val, irq_mask); + +- if (sysc_soc->soc == SOC_3430) { ++ if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) { + /* Clear DSS_SDI_CONTROL */ + sysc_write(ddata, 0x44, 0); + +@@ -2959,6 +2960,7 @@ static void ti_sysc_idle(struct work_struct *work) + static const struct soc_device_attribute sysc_soc_match[] = { + SOC_FLAG("OMAP242*", SOC_2420), + SOC_FLAG("OMAP243*", SOC_2430), ++ SOC_FLAG("AM35*", SOC_AM35), + SOC_FLAG("OMAP3[45]*", SOC_3430), + SOC_FLAG("OMAP3[67]*", SOC_3630), + SOC_FLAG("OMAP443*", SOC_4430), +@@ -3146,7 +3148,7 @@ static int sysc_check_active_timer(struct sysc *ddata) + * can be dropped if we stop supporting old beagleboard revisions + * A to B4 at some point. + */ +- if (sysc_soc->soc == SOC_3430) ++ if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) + error = -ENXIO; + else + error = -EBUSY; +-- +2.40.1 + diff --git a/queue-5.10/bus-ti-sysc-fix-sysc_quirk_swsup_sidle_act-handling-.patch b/queue-5.10/bus-ti-sysc-fix-sysc_quirk_swsup_sidle_act-handling-.patch new file mode 100644 index 00000000000..c46108b608a --- /dev/null +++ b/queue-5.10/bus-ti-sysc-fix-sysc_quirk_swsup_sidle_act-handling-.patch @@ -0,0 +1,85 @@ +From 48cd9d2587c0c77c4181c6b8b36296db810c69c8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 7 Sep 2023 08:53:28 +0300 +Subject: bus: ti-sysc: Fix SYSC_QUIRK_SWSUP_SIDLE_ACT handling for uart + wake-up + +From: Tony Lindgren + +[ Upstream commit e5deb8f76e64d94ccef715e75ebafffd0c312d80 ] + +The uarts should be tagged with SYSC_QUIRK_SWSUP_SIDLE instead of +SYSC_QUIRK_SWSUP_SIDLE_ACT. The difference is that SYSC_QUIRK_SWSUP_SIDLE +is used to force idle target modules rather than block idle during usage. + +The SYSC_QUIRK_SWSUP_SIDLE_ACT should disable autoidle and wake-up when +a target module is active, and configure autoidle and wake-up when a +target module is inactive. We are missing configuring the target module +on sysc_disable_module(), and missing toggling of the wake-up bit. + +Let's fix the issue to allow uart wake-up to work. + +Fixes: fb685f1c190e ("bus: ti-sysc: Handle swsup idle mode quirks") +Tested-by: Dhruva Gole +Tested-by: Kevin Hilman +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + drivers/bus/ti-sysc.c | 22 +++++++++++++++++----- + 1 file changed, 17 insertions(+), 5 deletions(-) + +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 5dba06ed61bf8..ef8c7bfd79a8f 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -1114,6 +1114,11 @@ static int sysc_enable_module(struct device *dev) + if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE | + SYSC_QUIRK_SWSUP_SIDLE_ACT)) { + best_mode = SYSC_IDLE_NO; ++ ++ /* Clear WAKEUP */ ++ if (regbits->enwkup_shift >= 0 && ++ ddata->cfg.sysc_val & BIT(regbits->enwkup_shift)) ++ reg &= ~BIT(regbits->enwkup_shift); + } else { + best_mode = fls(ddata->cfg.sidlemodes) - 1; + if (best_mode > SYSC_IDLE_MASK) { +@@ -1234,6 +1239,13 @@ static int sysc_disable_module(struct device *dev) + } + } + ++ if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) { ++ /* Set WAKEUP */ ++ if (regbits->enwkup_shift >= 0 && ++ ddata->cfg.sysc_val & BIT(regbits->enwkup_shift)) ++ reg |= BIT(regbits->enwkup_shift); ++ } ++ + reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift); + reg |= best_mode << regbits->sidle_shift; + if (regbits->autoidle_shift >= 0 && +@@ -1497,16 +1509,16 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { + SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff, + SYSC_QUIRK_LEGACY_IDLE), + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), + /* Uarts on omap4 and later */ + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), + + /* Quirks that need to be set based on the module address */ + SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff, +-- +2.40.1 + diff --git a/queue-5.10/bus-ti-sysc-use-fsleep-instead-of-usleep_range-in-sy.patch b/queue-5.10/bus-ti-sysc-use-fsleep-instead-of-usleep_range-in-sy.patch new file mode 100644 index 00000000000..4ccc6ec2d6c --- /dev/null +++ b/queue-5.10/bus-ti-sysc-use-fsleep-instead-of-usleep_range-in-sy.patch @@ -0,0 +1,49 @@ +From d17c5a78fdfed3ec3888b4730e290207759ddeed Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 21 Aug 2023 16:24:18 +0200 +Subject: bus: ti-sysc: Use fsleep() instead of usleep_range() in sysc_reset() + +From: Julien Panis + +[ Upstream commit d929b2b7464f95ec01e47f560b1e687482ba8929 ] + +The am335x-evm started producing boot errors because of subtle timing +changes: + +Unhandled fault: external abort on non-linefetch (0x1008) at 0xf03c1010 +... +sysc_reset from sysc_probe+0xf60/0x1514 +sysc_probe from platform_probe+0x5c/0xbc +... + +The fix consists in using the appropriate sleep function in sysc reset. +For flexible sleeping, fsleep is recommended. Here, sysc delay parameter +can take any value in [0 - 255] us range. As a result, fsleep() should +be used, calling udelay() for a sysc delay lower than 10 us. + +Signed-off-by: Julien Panis +Fixes: e709ed70d122 ("bus: ti-sysc: Fix missing reset delay handling") +Message-ID: <20230821-fix-ti-sysc-reset-v1-1-5a0a5d8fae55@baylibre.com> +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + drivers/bus/ti-sysc.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 5e8c078efd22a..24d589b43dfe7 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -2085,8 +2085,7 @@ static int sysc_reset(struct sysc *ddata) + } + + if (ddata->cfg.srst_udelay) +- usleep_range(ddata->cfg.srst_udelay, +- ddata->cfg.srst_udelay * 2); ++ fsleep(ddata->cfg.srst_udelay); + + if (ddata->post_reset_quirk) + ddata->post_reset_quirk(ddata); +-- +2.40.1 + diff --git a/queue-5.10/clk-tegra-fix-error-return-case-for-recalc_rate.patch b/queue-5.10/clk-tegra-fix-error-return-case-for-recalc_rate.patch new file mode 100644 index 00000000000..5c1f724f4fb --- /dev/null +++ b/queue-5.10/clk-tegra-fix-error-return-case-for-recalc_rate.patch @@ -0,0 +1,40 @@ +From 7b5c8553b8e8912fdcea08ddc49b7bb5d9796823 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Sep 2023 14:29:50 +0300 +Subject: clk: tegra: fix error return case for recalc_rate + +From: Timo Alho + +[ Upstream commit a47b44fbb13f5e7a981b4515dcddc93a321ae89c ] + +tegra-bpmp clocks driver makes implicit conversion of signed error +code to unsigned value in recalc_rate operation. The behavior for +recalc_rate, according to it's specification, should be that "If the +driver cannot figure out a rate for this clock, it must return 0." + +Fixes: ca6f2796eef7 ("clk: tegra: Add BPMP clock driver") +Signed-off-by: Timo Alho +Signed-off-by: Mikko Perttunen +Link: https://lore.kernel.org/r/20230912112951.2330497-1-cyndis@kapsi.fi +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/tegra/clk-bpmp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c +index a66263b6490d3..00845044c98ef 100644 +--- a/drivers/clk/tegra/clk-bpmp.c ++++ b/drivers/clk/tegra/clk-bpmp.c +@@ -159,7 +159,7 @@ static unsigned long tegra_bpmp_clk_recalc_rate(struct clk_hw *hw, + + err = tegra_bpmp_clk_transfer(clk->bpmp, &msg); + if (err < 0) +- return err; ++ return 0; + + return response.rate; + } +-- +2.40.1 + diff --git a/queue-5.10/gpio-pmic-eic-sprd-add-can_sleep-flag-for-pmic-eic-c.patch b/queue-5.10/gpio-pmic-eic-sprd-add-can_sleep-flag-for-pmic-eic-c.patch new file mode 100644 index 00000000000..00c3d5c92ed --- /dev/null +++ b/queue-5.10/gpio-pmic-eic-sprd-add-can_sleep-flag-for-pmic-eic-c.patch @@ -0,0 +1,39 @@ +From e17296b4943c3f6052335438627964e69a50ce7b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Sep 2023 20:25:27 +0800 +Subject: gpio: pmic-eic-sprd: Add can_sleep flag for PMIC EIC chip + +From: Wenhua Lin + +[ Upstream commit 26d9e5640d2130ee16df7b1fb6a908f460ab004c ] + +The drivers uses a mutex and I2C bus access in its PMIC EIC chip +get implementation. This means these functions can sleep and the PMIC EIC +chip should set the can_sleep property to true. + +This will ensure that a warning is printed when trying to get the +value from a context that potentially can't sleep. + +Fixes: 348f3cde84ab ("gpio: Add Spreadtrum PMIC EIC driver support") +Signed-off-by: Wenhua Lin +Signed-off-by: Bartosz Golaszewski +Signed-off-by: Sasha Levin +--- + drivers/gpio/gpio-pmic-eic-sprd.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpio/gpio-pmic-eic-sprd.c b/drivers/gpio/gpio-pmic-eic-sprd.c +index 9382851905662..e969ce9131ddf 100644 +--- a/drivers/gpio/gpio-pmic-eic-sprd.c ++++ b/drivers/gpio/gpio-pmic-eic-sprd.c +@@ -338,6 +338,7 @@ static int sprd_pmic_eic_probe(struct platform_device *pdev) + pmic_eic->chip.set_config = sprd_pmic_eic_set_config; + pmic_eic->chip.set = sprd_pmic_eic_set; + pmic_eic->chip.get = sprd_pmic_eic_get; ++ pmic_eic->chip.can_sleep = true; + + pmic_eic->intc.name = dev_name(&pdev->dev); + pmic_eic->intc.irq_mask = sprd_pmic_eic_irq_mask; +-- +2.40.1 + diff --git a/queue-5.10/i2c-npcm7xx-fix-callback-completion-ordering.patch b/queue-5.10/i2c-npcm7xx-fix-callback-completion-ordering.patch new file mode 100644 index 00000000000..89829dc6648 --- /dev/null +++ b/queue-5.10/i2c-npcm7xx-fix-callback-completion-ordering.patch @@ -0,0 +1,77 @@ +From 14587d969b7fce596af0a473a8decd5999c5f726 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 23 Sep 2023 18:02:14 -0700 +Subject: i2c: npcm7xx: Fix callback completion ordering + +From: William A. Kennington III + +[ Upstream commit 92e73d807b68b2214fcafca4e130b5300a9d4b3c ] + +Sometimes, our completions race with new master transfers and override +the bus->operation and bus->master_or_slave variables. This causes +transactions to timeout and kernel crashes less frequently. + +To remedy this, we re-order all completions to the very end of the +function. + +Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver") +Signed-off-by: William A. Kennington III +Reviewed-by: Tali Perry +Signed-off-by: Wolfram Sang +Signed-off-by: Sasha Levin +--- + drivers/i2c/busses/i2c-npcm7xx.c | 17 +++++++---------- + 1 file changed, 7 insertions(+), 10 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c +index c1b6797372409..73c808ef1bfe5 100644 +--- a/drivers/i2c/busses/i2c-npcm7xx.c ++++ b/drivers/i2c/busses/i2c-npcm7xx.c +@@ -675,6 +675,7 @@ static void npcm_i2c_callback(struct npcm_i2c *bus, + { + struct i2c_msg *msgs; + int msgs_num; ++ bool do_complete = false; + + msgs = bus->msgs; + msgs_num = bus->msgs_num; +@@ -701,23 +702,17 @@ static void npcm_i2c_callback(struct npcm_i2c *bus, + msgs[1].flags & I2C_M_RD) + msgs[1].len = info; + } +- if (completion_done(&bus->cmd_complete) == false) +- complete(&bus->cmd_complete); +- break; +- ++ do_complete = true; ++ break; + case I2C_NACK_IND: + /* MASTER transmit got a NACK before tx all bytes */ + bus->cmd_err = -ENXIO; +- if (bus->master_or_slave == I2C_MASTER) +- complete(&bus->cmd_complete); +- ++ do_complete = true; + break; + case I2C_BUS_ERR_IND: + /* Bus error */ + bus->cmd_err = -EAGAIN; +- if (bus->master_or_slave == I2C_MASTER) +- complete(&bus->cmd_complete); +- ++ do_complete = true; + break; + case I2C_WAKE_UP_IND: + /* I2C wake up */ +@@ -731,6 +726,8 @@ static void npcm_i2c_callback(struct npcm_i2c *bus, + if (bus->slave) + bus->master_or_slave = I2C_SLAVE; + #endif ++ if (do_complete) ++ complete(&bus->cmd_complete); + } + + static u8 npcm_i2c_fifo_usage(struct npcm_i2c *bus) +-- +2.40.1 + diff --git a/queue-5.10/power-supply-ucs1002-fix-error-code-in-ucs1002_get_p.patch b/queue-5.10/power-supply-ucs1002-fix-error-code-in-ucs1002_get_p.patch new file mode 100644 index 00000000000..53eba2c12e4 --- /dev/null +++ b/queue-5.10/power-supply-ucs1002-fix-error-code-in-ucs1002_get_p.patch @@ -0,0 +1,39 @@ +From e92bb5a289025143366ea44a4a4083eaebe78414 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 19 Jun 2023 12:44:17 +0300 +Subject: power: supply: ucs1002: fix error code in ucs1002_get_property() + +From: Dan Carpenter + +[ Upstream commit e35059949daa83f8dadf710d0f829ab3c3a72fe2 ] + +This function is supposed to return 0 for success instead of returning +the val->intval. This makes it the same as the other case statements +in this function. + +Fixes: 81196e2e57fc ("power: supply: ucs1002: fix some health status issues") +Signed-off-by: Dan Carpenter +Link: https://lore.kernel.org/r/687f64a4-4c6e-4536-8204-98ad1df934e5@moroto.mountain +Signed-off-by: Sebastian Reichel +Signed-off-by: Sasha Levin +--- + drivers/power/supply/ucs1002_power.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/power/supply/ucs1002_power.c b/drivers/power/supply/ucs1002_power.c +index ef673ec3db568..332cb50d9fb4f 100644 +--- a/drivers/power/supply/ucs1002_power.c ++++ b/drivers/power/supply/ucs1002_power.c +@@ -384,7 +384,8 @@ static int ucs1002_get_property(struct power_supply *psy, + case POWER_SUPPLY_PROP_USB_TYPE: + return ucs1002_get_usb_type(info, val); + case POWER_SUPPLY_PROP_HEALTH: +- return val->intval = info->health; ++ val->intval = info->health; ++ return 0; + case POWER_SUPPLY_PROP_PRESENT: + val->intval = info->present; + return 0; +-- +2.40.1 + diff --git a/queue-5.10/series b/queue-5.10/series index cc2baf2c4a4..2367e58e497 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -88,3 +88,23 @@ ata-ahci-rename-board_ahci_mobile.patch ata-ahci-add-elkhart-lake-ahci-controller.patch btrfs-reset-destination-buffer-when-read_extent_buff.patch mips-alchemy-only-build-mmc-support-helpers-if-au1xm.patch +bus-ti-sysc-use-fsleep-instead-of-usleep_range-in-sy.patch +bus-ti-sysc-fix-missing-am35xx-soc-matching.patch +clk-tegra-fix-error-return-case-for-recalc_rate.patch +treewide-replace-gplv2-boilerplate-reference-with-sp.patch +arm-dts-omap-correct-indentation.patch +arm-dts-ti-omap-fix-bandgap-thermal-cells-addressing.patch +arm-dts-motorola-mapphone-configure-lower-temperatur.patch +arm-dts-motorola-mapphone-add-1.2ghz-opp.patch +arm-dts-motorola-mapphone-drop-second-ti-wlcore-comp.patch +arm-dts-am335x-guardian-update-beeper-label.patch +arm-dts-unify-pwm-omap-dmtimer-node-names.patch +arm-dts-ti-omap-motorola-mapphone-fix-abe_clkctrl-wa.patch +bus-ti-sysc-fix-sysc_quirk_swsup_sidle_act-handling-.patch +power-supply-ucs1002-fix-error-code-in-ucs1002_get_p.patch +xtensa-add-default-definition-for-xchal_have_div32.patch +xtensa-iss-network-make-functions-static.patch +xtensa-boot-don-t-add-include-dirs.patch +xtensa-boot-lib-fix-function-prototypes.patch +gpio-pmic-eic-sprd-add-can_sleep-flag-for-pmic-eic-c.patch +i2c-npcm7xx-fix-callback-completion-ordering.patch diff --git a/queue-5.10/treewide-replace-gplv2-boilerplate-reference-with-sp.patch b/queue-5.10/treewide-replace-gplv2-boilerplate-reference-with-sp.patch new file mode 100644 index 00000000000..2541d247671 --- /dev/null +++ b/queue-5.10/treewide-replace-gplv2-boilerplate-reference-with-sp.patch @@ -0,0 +1,2910 @@ +From 34db56dd1c0845ac8c4898f52bed7b12ab56d684 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 Jun 2022 16:11:14 +0200 +Subject: treewide: Replace GPLv2 boilerplate/reference with SPDX - + gpl-2.0_56.RULE (part 1) + +From: Thomas Gleixner + +[ Upstream commit 0fdebc5ec2ca492d69df2d93a6a7abade4941aae ] + +Based on the normalized pattern: + + this file is licensed under the terms of the gnu general public + license version 2 this program is licensed as is without any warranty + of any kind whether express or implied + +extracted by the scancode license scanner the SPDX license identifier + + GPL-2.0-only + +has been chosen to replace the boilerplate/reference. + +Reviewed-by: Allison Randal +Signed-off-by: Thomas Gleixner +Signed-off-by: Greg Kroah-Hartman +Stable-dep-of: 6469b2feade8 ("ARM: dts: ti: omap: Fix bandgap thermal cells addressing for omap3/4") +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am33xx.dtsi | 5 +---- + arch/arm/boot/dts/am3517.dtsi | 5 +---- + arch/arm/boot/dts/am4372.dtsi | 5 +---- + arch/arm/boot/dts/artpec6-devboard.dts | 9 ++------- + arch/arm/boot/dts/dm814x.dtsi | 6 +----- + arch/arm/boot/dts/dm816x.dtsi | 6 +----- + arch/arm/boot/dts/dra62x.dtsi | 6 +----- + arch/arm/boot/dts/dra7-dspeve-thermal.dtsi | 5 +---- + arch/arm/boot/dts/dra7-iva-thermal.dtsi | 5 +---- + arch/arm/boot/dts/imx6q-gk802.dts | 9 ++------- + arch/arm/boot/dts/omap2.dtsi | 5 +---- + arch/arm/boot/dts/omap2420.dtsi | 5 +---- + arch/arm/boot/dts/omap2430.dtsi | 5 +---- + arch/arm/boot/dts/omap3-cpu-thermal.dtsi | 5 +---- + arch/arm/boot/dts/omap3.dtsi | 5 +---- + arch/arm/boot/dts/omap34xx.dtsi | 5 +---- + arch/arm/boot/dts/omap36xx.dtsi | 5 +---- + arch/arm/boot/dts/omap4-cpu-thermal.dtsi | 5 +---- + arch/arm/boot/dts/omap443x.dtsi | 5 +---- + arch/arm/boot/dts/omap4460.dtsi | 5 +---- + arch/arm/boot/dts/omap5-core-thermal.dtsi | 5 +---- + arch/arm/boot/dts/omap5-gpu-thermal.dtsi | 5 +---- + arch/arm/boot/dts/orion5x-lacie-d2-network.dts | 5 +---- + .../arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 9 ++------- + arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts | 5 +---- + arch/arm/boot/dts/orion5x-mv88f5181.dtsi | 9 ++------- + arch/arm/boot/dts/orion5x-mv88f5182.dtsi | 9 ++------- + arch/arm/boot/dts/orion5x-netgear-wnr854t.dts | 9 ++------- + arch/arm/boot/dts/orion5x-rd88f5182-nas.dts | 9 ++------- + arch/arm/boot/dts/orion5x.dtsi | 9 ++------- + arch/arm/include/asm/hardware/cache-aurora-l2.h | 5 +---- + arch/arm/include/asm/hardware/cache-feroceon-l2.h | 6 +----- + arch/arm/include/asm/hardware/cache-tauros2.h | 5 +---- + arch/arm/mach-davinci/board-da830-evm.c | 6 ++---- + arch/arm/mach-davinci/board-da850-evm.c | 6 ++---- + arch/arm/mach-davinci/board-dm355-evm.c | 6 ++---- + arch/arm/mach-davinci/board-dm355-leopard.c | 5 +---- + arch/arm/mach-davinci/board-dm644x-evm.c | 6 ++---- + arch/arm/mach-davinci/board-dm646x-evm.c | 7 +------ + arch/arm/mach-davinci/board-mityomapl138.c | 5 +---- + arch/arm/mach-davinci/board-neuros-osd2.c | 5 +---- + arch/arm/mach-davinci/board-omapl138-hawk.c | 5 +---- + arch/arm/mach-davinci/common.c | 6 ++---- + arch/arm/mach-davinci/cpuidle.h | 5 +---- + arch/arm/mach-davinci/da830.c | 6 ++---- + arch/arm/mach-davinci/da850.c | 6 ++---- + arch/arm/mach-davinci/dm355.c | 6 ++---- + arch/arm/mach-davinci/dm644x.c | 6 ++---- + arch/arm/mach-davinci/dm646x.c | 6 ++---- + arch/arm/mach-davinci/include/mach/common.h | 6 ++---- + arch/arm/mach-davinci/include/mach/cputype.h | 6 ++---- + arch/arm/mach-davinci/include/mach/da8xx.h | 6 ++---- + arch/arm/mach-davinci/include/mach/hardware.h | 6 ++---- + arch/arm/mach-davinci/include/mach/serial.h | 6 ++---- + arch/arm/mach-davinci/mux.c | 6 ++---- + arch/arm/mach-davinci/mux.h | 6 ++---- + arch/arm/mach-davinci/pm_domain.c | 5 +---- + arch/arm/mach-dove/bridge-regs.h | 9 ++------- + arch/arm/mach-dove/cm-a510.c | 5 +---- + arch/arm/mach-dove/common.c | 5 +---- + arch/arm/mach-dove/common.h | 5 +---- + arch/arm/mach-dove/dove-db-setup.c | 5 +---- + arch/arm/mach-dove/dove.h | 9 ++------- + arch/arm/mach-dove/irq.c | 5 +---- + arch/arm/mach-dove/irqs.h | 9 ++------- + arch/arm/mach-dove/mpp.c | 5 +---- + arch/arm/mach-dove/pcie.c | 5 +---- + arch/arm/mach-dove/pm.h | 6 +----- + arch/arm/mach-lpc18xx/board-dt.c | 5 +---- + arch/arm/mach-lpc32xx/pm.c | 6 ++---- + arch/arm/mach-lpc32xx/suspend.S | 6 ++---- + arch/arm/mach-mv78xx0/bridge-regs.h | 6 +----- + arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 5 +---- + arch/arm/mach-mv78xx0/common.c | 5 +---- + arch/arm/mach-mv78xx0/common.h | 5 +---- + arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 5 +---- + arch/arm/mach-mv78xx0/irq.c | 5 +---- + arch/arm/mach-mv78xx0/irqs.h | 9 ++------- + arch/arm/mach-mv78xx0/mpp.c | 5 +---- + arch/arm/mach-mv78xx0/mpp.h | 6 +----- + arch/arm/mach-mv78xx0/mv78xx0.h | 5 +---- + arch/arm/mach-mv78xx0/pcie.c | 5 +---- + arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 5 +---- + arch/arm/mach-mvebu/armada-370-xp.h | 5 +---- + arch/arm/mach-mvebu/board-v7.c | 5 +---- + arch/arm/mach-mvebu/coherency.c | 5 +---- + arch/arm/mach-mvebu/coherency.h | 6 +----- + arch/arm/mach-mvebu/coherency_ll.S | 5 +---- + arch/arm/mach-mvebu/common.h | 5 +---- + arch/arm/mach-mvebu/cpu-reset.c | 5 +---- + arch/arm/mach-mvebu/dove.c | 5 +---- + arch/arm/mach-mvebu/headsmp-a9.S | 5 +---- + arch/arm/mach-mvebu/headsmp.S | 5 +---- + arch/arm/mach-mvebu/kirkwood.c | 5 +---- + arch/arm/mach-mvebu/kirkwood.h | 5 +---- + arch/arm/mach-mvebu/mvebu-soc-id.c | 5 +---- + arch/arm/mach-mvebu/mvebu-soc-id.h | 5 +---- + arch/arm/mach-mvebu/platsmp-a9.c | 5 +---- + arch/arm/mach-mvebu/platsmp.c | 5 +---- + arch/arm/mach-mvebu/pm-board.c | 5 +---- + arch/arm/mach-mvebu/pm.c | 5 +---- + arch/arm/mach-mvebu/pmsu.c | 5 +---- + arch/arm/mach-mvebu/pmsu.h | 5 +---- + arch/arm/mach-mvebu/pmsu_ll.S | 5 +---- + arch/arm/mach-mvebu/system-controller.c | 5 +---- + arch/arm/mach-omap1/include/mach/mtd-xip.h | 6 ++---- + arch/arm/mach-omap1/pm_bus.c | 6 +----- + arch/arm/mach-omap2/prcm43xx.h | 5 +---- + arch/arm/mach-omap2/vc.c | 6 +----- + arch/arm/mach-orion5x/board-d2net.c | 5 +---- + arch/arm/mach-orion5x/board-dt.c | 5 +---- + arch/arm/mach-orion5x/board-rd88f5182.c | 5 +---- + arch/arm/mach-orion5x/bridge-regs.h | 9 ++------- + arch/arm/mach-orion5x/common.c | 5 +---- + arch/arm/mach-orion5x/db88f5281-setup.c | 5 +---- + arch/arm/mach-orion5x/irq.c | 5 +---- + arch/arm/mach-orion5x/irqs.h | 5 +---- + arch/arm/mach-orion5x/kurobox_pro-setup.c | 5 +---- + arch/arm/mach-orion5x/ls_hgl-setup.c | 5 +---- + arch/arm/mach-orion5x/mpp.c | 5 +---- + arch/arm/mach-orion5x/net2big-setup.c | 6 +----- + arch/arm/mach-orion5x/orion5x.h | 5 +---- + arch/arm/mach-orion5x/pci.c | 5 +---- + arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 5 +---- + arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 5 +---- + arch/arm/mach-orion5x/rd88f5182-setup.c | 5 +---- + arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 5 +---- + arch/arm/mach-orion5x/ts78xx-setup.c | 5 +---- + arch/arm/mach-orion5x/wnr854t-setup.c | 9 ++------- + arch/arm/mach-orion5x/wrt350n-v2-setup.c | 9 ++------- + arch/arm/mach-pxa/eseries.c | 7 +------ + arch/arm/mach-pxa/standby.S | 6 ++---- + arch/arm/mach-spear/generic.h | 5 +---- + arch/arm/mach-spear/include/mach/misc_regs.h | 5 +---- + arch/arm/mach-spear/include/mach/spear.h | 5 +---- + arch/arm/mach-spear/pl080.c | 5 +---- + arch/arm/mach-spear/pl080.h | 5 +---- + arch/arm/mach-spear/restart.c | 5 +---- + arch/arm/mach-spear/spear1310.c | 5 +---- + arch/arm/mach-spear/spear1340.c | 5 +---- + arch/arm/mach-spear/spear13xx.c | 5 +---- + arch/arm/mach-spear/spear300.c | 5 +---- + arch/arm/mach-spear/spear310.c | 5 +---- + arch/arm/mach-spear/spear320.c | 5 +---- + arch/arm/mach-spear/spear3xx.c | 5 +---- + arch/arm/mach-spear/spear6xx.c | 5 +---- + arch/arm/mach-spear/time.c | 5 +---- + arch/arm/mm/cache-feroceon-l2.c | 5 +---- + arch/arm/mm/cache-tauros2.c | 5 +---- + 149 files changed, 185 insertions(+), 656 deletions(-) + +diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi +index f09a61cac2dc9..a8e8d54eb15b7 100644 +--- a/arch/arm/boot/dts/am33xx.dtsi ++++ b/arch/arm/boot/dts/am33xx.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for AM33XX SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi +index de33c4f89f33d..cb316135bc7c9 100644 +--- a/arch/arm/boot/dts/am3517.dtsi ++++ b/arch/arm/boot/dts/am3517.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for am3517 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include "omap3.dtsi" +diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi +index 878406b120be6..03cd72207ec2b 100644 +--- a/arch/arm/boot/dts/am4372.dtsi ++++ b/arch/arm/boot/dts/am4372.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/artpec6-devboard.dts b/arch/arm/boot/dts/artpec6-devboard.dts +index d20d95359b284..042a9cc920c67 100644 +--- a/arch/arm/boot/dts/artpec6-devboard.dts ++++ b/arch/arm/boot/dts/artpec6-devboard.dts +@@ -1,10 +1,5 @@ +-/* +- * Axis ARTPEC-6 development board. +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Axis ARTPEC-6 development board. + + /dts-v1/; + #include "artpec6.dtsi" +diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi +index 7702e048e110f..379abf90c765d 100644 +--- a/arch/arm/boot/dts/dm814x.dtsi ++++ b/arch/arm/boot/dts/dm814x.dtsi +@@ -1,8 +1,4 @@ +-/* +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only + + #include + #include +diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi +index 1825d912b8ab4..1faf68dbd8a4e 100644 +--- a/arch/arm/boot/dts/dm816x.dtsi ++++ b/arch/arm/boot/dts/dm816x.dtsi +@@ -1,8 +1,4 @@ +-/* +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only + + #include + #include +diff --git a/arch/arm/boot/dts/dra62x.dtsi b/arch/arm/boot/dts/dra62x.dtsi +index cc4878aaa8ea8..cfefa670515cc 100644 +--- a/arch/arm/boot/dts/dra62x.dtsi ++++ b/arch/arm/boot/dts/dra62x.dtsi +@@ -1,8 +1,4 @@ +-/* +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only + + #include "dm814x.dtsi" + +diff --git a/arch/arm/boot/dts/dra7-dspeve-thermal.dtsi b/arch/arm/boot/dts/dra7-dspeve-thermal.dtsi +index e75569383dd80..747ff0db90c7d 100644 +--- a/arch/arm/boot/dts/dra7-dspeve-thermal.dtsi ++++ b/arch/arm/boot/dts/dra7-dspeve-thermal.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for DRA7x SoC DSPEVE thermal + * + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/dra7-iva-thermal.dtsi b/arch/arm/boot/dts/dra7-iva-thermal.dtsi +index a7077321613f0..0a31313065df4 100644 +--- a/arch/arm/boot/dts/dra7-iva-thermal.dtsi ++++ b/arch/arm/boot/dts/dra7-iva-thermal.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for DRA7x SoC IVA thermal + * + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/imx6q-gk802.dts b/arch/arm/boot/dts/imx6q-gk802.dts +index ccc2487d47ca9..2fda68f9d3f64 100644 +--- a/arch/arm/boot/dts/imx6q-gk802.dts ++++ b/arch/arm/boot/dts/imx6q-gk802.dts +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2013 Philipp Zabel +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2013 Philipp Zabel + + /dts-v1/; + #include +diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi +index f9c2a99388986..777e8c7fe3da4 100644 +--- a/arch/arm/boot/dts/omap2.dtsi ++++ b/arch/arm/boot/dts/omap2.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP2 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi +index 494bf6972005b..6f529e0656457 100644 +--- a/arch/arm/boot/dts/omap2420.dtsi ++++ b/arch/arm/boot/dts/omap2420.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP2420 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include "omap2.dtsi" +diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi +index d19d8ba3b6070..e3ea9d6481b03 100644 +--- a/arch/arm/boot/dts/omap2430.dtsi ++++ b/arch/arm/boot/dts/omap2430.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP243x SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include "omap2.dtsi" +diff --git a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi +index 1ed8378593745..1ba79932a79fc 100644 +--- a/arch/arm/boot/dts/omap3-cpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap3-cpu-thermal.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP3 SoC CPU thermal + * + * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi +index c5b9da0d7e6ce..744e878ef7b3e 100644 +--- a/arch/arm/boot/dts/omap3.dtsi ++++ b/arch/arm/boot/dts/omap3.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi +index feaa43b785354..8ad68af655b06 100644 +--- a/arch/arm/boot/dts/omap34xx.dtsi ++++ b/arch/arm/boot/dts/omap34xx.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP34xx/OMAP35xx SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi +index 05fe5ed127b01..372f861dc929f 100644 +--- a/arch/arm/boot/dts/omap36xx.dtsi ++++ b/arch/arm/boot/dts/omap36xx.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +index 03d054b2bf9af..4d7eeb133dadd 100644 +--- a/arch/arm/boot/dts/omap4-cpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap4-cpu-thermal.dtsi +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP4/5 SoC CPU thermal + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ + * Contact: Eduardo Valentin +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi +index dd8ef58cbaed4..1095fc9011add 100644 +--- a/arch/arm/boot/dts/omap443x.dtsi ++++ b/arch/arm/boot/dts/omap443x.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP443x SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include "omap4.dtsi" +diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi +index 2d3e54901b6ea..21ddff965c83e 100644 +--- a/arch/arm/boot/dts/omap4460.dtsi ++++ b/arch/arm/boot/dts/omap4460.dtsi +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP4460 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + #include "omap4.dtsi" + +diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi +index 02e76338bfbc0..e0d8e39a0014b 100644 +--- a/arch/arm/boot/dts/omap5-core-thermal.dtsi ++++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP543x SoC CORE thermal + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ + * Contact: Eduardo Valentin +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi +index bf8fa9372e575..1b4b7d9136c84 100644 +--- a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi ++++ b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree Source for OMAP543x SoC GPU thermal + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ + * Contact: Eduardo Valentin +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/boot/dts/orion5x-lacie-d2-network.dts b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts +index 422958d13d42f..03471d30bfd95 100644 +--- a/arch/arm/boot/dts/orion5x-lacie-d2-network.dts ++++ b/arch/arm/boot/dts/orion5x-lacie-d2-network.dts +@@ -1,10 +1,7 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (C) 2014 Thomas Petazzoni + * Copyright (C) 2009 Simon Guinot +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + /dts-v1/; +diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +index 0043e0040153c..f17e25ac98ddb 100644 +--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts ++++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2012 Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2012 Thomas Petazzoni + + /* + * TODO: add Orion USB device port init when kernel.org support is added. +diff --git a/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts +index 0ca6208a267de..d57859998350d 100644 +--- a/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts ++++ b/arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts +@@ -1,10 +1,7 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (C) 2014 Thomas Petazzoni + * Copyright (C) Sylver Bruneau +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + /dts-v1/; +diff --git a/arch/arm/boot/dts/orion5x-mv88f5181.dtsi b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi +index f667012b26ca1..819f9efb7058d 100644 +--- a/arch/arm/boot/dts/orion5x-mv88f5181.dtsi ++++ b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2016 Jamie Lentin +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2016 Jamie Lentin + + #include "orion5x.dtsi" + +diff --git a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi +index d1ed71c602096..86b87fb26dc9a 100644 +--- a/arch/arm/boot/dts/orion5x-mv88f5182.dtsi ++++ b/arch/arm/boot/dts/orion5x-mv88f5182.dtsi +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2014 Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2014 Thomas Petazzoni + + #include "orion5x.dtsi" + +diff --git a/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts +index ea081afa469d9..4f4888ec91380 100644 +--- a/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts ++++ b/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2016 Jamie Lentin +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2016 Jamie Lentin + + /dts-v1/; + +diff --git a/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts +index 487324f7c54e7..fd78aa02a3c5b 100644 +--- a/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts ++++ b/arch/arm/boot/dts/orion5x-rd88f5182-nas.dts +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2014 Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2014 Thomas Petazzoni + + /dts-v1/; + +diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi +index 61e631b3fd8bb..2d41f5c166ee7 100644 +--- a/arch/arm/boot/dts/orion5x.dtsi ++++ b/arch/arm/boot/dts/orion5x.dtsi +@@ -1,10 +1,5 @@ +-/* +- * Copyright (C) 2012 Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (C) 2012 Thomas Petazzoni + + #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) + +diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/include/asm/hardware/cache-aurora-l2.h +index 39769ffa00512..9694808ee97ce 100644 +--- a/arch/arm/include/asm/hardware/cache-aurora-l2.h ++++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * AURORA shared L2 cache controller support + * +@@ -5,10 +6,6 @@ + * + * Yehuda Yitschak + * Gregory CLEMENT +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ASM_ARM_HARDWARE_AURORA_L2_H +diff --git a/arch/arm/include/asm/hardware/cache-feroceon-l2.h b/arch/arm/include/asm/hardware/cache-feroceon-l2.h +index 12e1588dc4f13..eb2e7b7f70a87 100644 +--- a/arch/arm/include/asm/hardware/cache-feroceon-l2.h ++++ b/arch/arm/include/asm/hardware/cache-feroceon-l2.h +@@ -1,13 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/include/asm/hardware/cache-feroceon-l2.h + * + * Copyright (C) 2008 Marvell Semiconductor +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + extern void __init feroceon_l2_init(int l2_wt_override); + extern int __init feroceon_of_init(void); +- +diff --git a/arch/arm/include/asm/hardware/cache-tauros2.h b/arch/arm/include/asm/hardware/cache-tauros2.h +index 295e2e40151b1..4e493facaa317 100644 +--- a/arch/arm/include/asm/hardware/cache-tauros2.h ++++ b/arch/arm/include/asm/hardware/cache-tauros2.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/include/asm/hardware/cache-tauros2.h + * + * Copyright (C) 2008 Marvell Semiconductor +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define CACHE_TAUROS2_PREFETCH_ON (1 << 0) +diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c +index a20ba12d876c6..bc8350c85e5ae 100644 +--- a/arch/arm/mach-davinci/board-da830-evm.c ++++ b/arch/arm/mach-davinci/board-da830-evm.c +@@ -1,13 +1,11 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DA830/OMAP L137 EVM board + * + * Author: Mark A. Greer + * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c + * +- * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007, 2009 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c +index 7f7f6bae21c2d..1601a74261a67 100644 +--- a/arch/arm/mach-davinci/board-da850-evm.c ++++ b/arch/arm/mach-davinci/board-da850-evm.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DA850/OMAP-L138 EVM board + * +@@ -6,10 +7,7 @@ + * Derived from: arch/arm/mach-davinci/board-da830-evm.c + * Original Copyrights follow: + * +- * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007, 2009 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c +index 3c5a9e3c128ab..debc912b133fa 100644 +--- a/arch/arm/mach-davinci/board-dm355-evm.c ++++ b/arch/arm/mach-davinci/board-dm355-evm.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci EVM board support + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c +index e475b2113e70f..7c8307d590a40 100644 +--- a/arch/arm/mach-davinci/board-dm355-leopard.c ++++ b/arch/arm/mach-davinci/board-dm355-leopard.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * DM355 leopard board support + * + * Based on board-dm355-evm.c +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c +index 7755cccec550c..a3b8cf40f6bee 100644 +--- a/arch/arm/mach-davinci/board-dm644x-evm.c ++++ b/arch/arm/mach-davinci/board-dm644x-evm.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci EVM board support + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c +index 952ddabc743e0..5beb6b256f903 100644 +--- a/arch/arm/mach-davinci/board-dm646x-evm.c ++++ b/arch/arm/mach-davinci/board-dm646x-evm.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci DM646X EVM board + * +@@ -5,11 +6,6 @@ + * Copyright (C) 2006 Texas Instruments. + * + * (C) 2007-2008, MontaVista Software, Inc. +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. +- * + */ + + /************************************************************************** +@@ -869,4 +865,3 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") + .init_late = davinci_init_late, + .dma_zone_size = SZ_128M, + MACHINE_END +- +diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c +index 5205008c8061b..169ee82d35f5b 100644 +--- a/arch/arm/mach-davinci/board-mityomapl138.c ++++ b/arch/arm/mach-davinci/board-mityomapl138.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Critical Link MityOMAP-L138 SoM + * + * Copyright (C) 2010 Critical Link LLC - https://www.criticallink.com +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of +- * any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "MityOMAPL138: " fmt +diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c +index b4843f68bb575..ae0bce8655b44 100644 +--- a/arch/arm/mach-davinci/board-neuros-osd2.c ++++ b/arch/arm/mach-davinci/board-neuros-osd2.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Neuros Technologies OSD2 board support + * +@@ -18,10 +19,6 @@ + * + * For more information please refer to + * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c +index 88df8011a4e6b..f3e85d16f56a8 100644 +--- a/arch/arm/mach-davinci/board-omapl138-hawk.c ++++ b/arch/arm/mach-davinci/board-omapl138-hawk.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Hawkboard.org based on TI's OMAP-L138 Platform + * + * Initial code: Syed Mohammed Khasim + * + * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of +- * any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c +index ae61d19f9b3af..5c2760723fcfb 100644 +--- a/arch/arm/mach-davinci/common.c ++++ b/arch/arm/mach-davinci/common.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Code commons to all DaVinci SoCs. + * + * Author: Mark A. Greer + * +- * 2009 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2009 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/cpuidle.h b/arch/arm/mach-davinci/cpuidle.h +index 0d9193aefab51..976d43073597e 100644 +--- a/arch/arm/mach-davinci/cpuidle.h ++++ b/arch/arm/mach-davinci/cpuidle.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * TI DaVinci cpuidle platform support + * + * 2009 (C) Texas Instruments, Inc. https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + #ifndef _MACH_DAVINCI_CPUIDLE_H + #define _MACH_DAVINCI_CPUIDLE_H +diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c +index 018ab4b549f1d..cd07415dc5350 100644 +--- a/arch/arm/mach-davinci/da830.c ++++ b/arch/arm/mach-davinci/da830.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DA830/OMAP L137 chip specific setup + * + * Author: Mark A. Greer + * +- * 2009 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2009 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c +index 68156e7239a68..aedf020b62ed1 100644 +--- a/arch/arm/mach-davinci/da850.c ++++ b/arch/arm/mach-davinci/da850.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DA850/OMAP-L138 chip specific setup + * +@@ -6,10 +7,7 @@ + * Derived from: arch/arm/mach-davinci/da830.c + * Original Copyrights follow: + * +- * 2009 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2009 (c) MontaVista Software, Inc. + */ + + #include +diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c +index 5de72d2fa8f09..a49151bf37c46 100644 +--- a/arch/arm/mach-davinci/dm355.c ++++ b/arch/arm/mach-davinci/dm355.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci DM355 chip specific setup + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * +- * 2007 (c) Deep Root Systems, LLC. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) Deep Root Systems, LLC. + */ + + #include +diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c +index 24988939ae462..f9b82a6a16300 100644 +--- a/arch/arm/mach-davinci/dm644x.c ++++ b/arch/arm/mach-davinci/dm644x.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci DM644x chip specific setup + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * +- * 2007 (c) Deep Root Systems, LLC. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) Deep Root Systems, LLC. + */ + + #include +diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c +index 4ffd028ed9978..d85d8e9e13715 100644 +--- a/arch/arm/mach-davinci/dm646x.c ++++ b/arch/arm/mach-davinci/dm646x.c +@@ -1,12 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * TI DaVinci DM646x chip specific setup + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * +- * 2007 (c) Deep Root Systems, LLC. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) Deep Root Systems, LLC. + */ + + #include +diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h +index 139b83de011d3..772b51e0ac5eb 100644 +--- a/arch/arm/mach-davinci/include/mach/common.h ++++ b/arch/arm/mach-davinci/include/mach/common.h +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Header for code common to all DaVinci machines. + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + */ + + #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H +diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h +index 1fc84e21664d2..81de85757a938 100644 +--- a/arch/arm/mach-davinci/include/mach/cputype.h ++++ b/arch/arm/mach-davinci/include/mach/cputype.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * DaVinci CPU type detection + * +@@ -8,10 +9,7 @@ + * compiled in to the kernel, the macros return 0 so that + * resulting code can be optimized out. + * +- * 2009 (c) Deep Root Systems, LLC. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2009 (c) Deep Root Systems, LLC. + */ + #ifndef _ASM_ARCH_CPU_H + #define _ASM_ARCH_CPU_H +diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h +index 1618b30661a9b..f138f6d33d4aa 100644 +--- a/arch/arm/mach-davinci/include/mach/da8xx.h ++++ b/arch/arm/mach-davinci/include/mach/da8xx.h +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Chip specific defines for DA8XX/OMAP L1XX SoC + * + * Author: Mark A. Greer + * +- * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007, 2009-2010 (c) MontaVista Software, Inc. + */ + #ifndef __ASM_ARCH_DAVINCI_DA8XX_H + #define __ASM_ARCH_DAVINCI_DA8XX_H +diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h +index 16bb42291d39d..7848b6a240b48 100644 +--- a/arch/arm/mach-davinci/include/mach/hardware.h ++++ b/arch/arm/mach-davinci/include/mach/hardware.h +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Hardware definitions common to all DaVinci family processors + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * +- * 2007 (c) Deep Root Systems, LLC. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) Deep Root Systems, LLC. + */ + #ifndef __ASM_ARCH_HARDWARE_H + #define __ASM_ARCH_HARDWARE_H +diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h +index d4b4aa87964f0..85fda53ffd205 100644 +--- a/arch/arm/mach-davinci/include/mach/serial.h ++++ b/arch/arm/mach-davinci/include/mach/serial.h +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * DaVinci serial device definitions + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + */ + #ifndef __ASM_ARCH_SERIAL_H + #define __ASM_ARCH_SERIAL_H +diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c +index 6a2ff0a654a5b..0d8ac2f936617 100644 +--- a/arch/arm/mach-davinci/mux.c ++++ b/arch/arm/mach-davinci/mux.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Utility to set the DAVINCI MUX register from a table in mux.h + * +@@ -8,10 +9,7 @@ + * + * Written by Tony Lindgren + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + * + * Copyright (C) 2008 Texas Instruments. + */ +diff --git a/arch/arm/mach-davinci/mux.h b/arch/arm/mach-davinci/mux.h +index 5aad1e7dd2103..558b9c1b32c06 100644 +--- a/arch/arm/mach-davinci/mux.h ++++ b/arch/arm/mach-davinci/mux.h +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Pin-multiplex helper macros for TI DaVinci family devices + * + * Author: Vladimir Barinov, MontaVista Software, Inc. + * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2007 (c) MontaVista Software, Inc. + * + * Copyright (C) 2008 Texas Instruments. + */ +diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c +index e251fd593bfd1..6b21d5bd999c6 100644 +--- a/arch/arm/mach-davinci/pm_domain.c ++++ b/arch/arm/mach-davinci/pm_domain.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Runtime PM support code for DaVinci + * + * Author: Kevin Hilman + * + * Copyright (C) 2012 Texas Instruments, Inc. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-dove/bridge-regs.h b/arch/arm/mach-dove/bridge-regs.h +index ace0b0bfbf114..6fbc152d0950d 100644 +--- a/arch/arm/mach-dove/bridge-regs.h ++++ b/arch/arm/mach-dove/bridge-regs.h +@@ -1,10 +1,5 @@ +-/* +- * Mbus-L to Mbus Bridge Registers +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* Mbus-L to Mbus Bridge Registers */ + + #ifndef __ASM_ARCH_BRIDGE_REGS_H + #define __ASM_ARCH_BRIDGE_REGS_H +diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c +index 9f25c993d8637..beb532537c225 100644 +--- a/arch/arm/mach-dove/cm-a510.c ++++ b/arch/arm/mach-dove/cm-a510.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/cm-a510.c + * +@@ -5,10 +6,6 @@ + * Konstantin Sinyuk + * + * Based on Marvell DB-MV88AP510-BP Development Board Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c +index dbe970e378953..cd4ae7e4768dd 100644 +--- a/arch/arm/mach-dove/common.c ++++ b/arch/arm/mach-dove/common.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/common.c + * + * Core functions for Marvell Dove 88AP510 System On Chip +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h +index 1d725224d1461..57ebc413d68c2 100644 +--- a/arch/arm/mach-dove/common.h ++++ b/arch/arm/mach-dove/common.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-dove/common.h + * + * Core functions for Marvell Dove 88AP510 System On Chip +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ARCH_DOVE_COMMON_H +diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c +index 418ab21b9d9b2..d5bf540405772 100644 +--- a/arch/arm/mach-dove/dove-db-setup.c ++++ b/arch/arm/mach-dove/dove-db-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/dove-db-setup.c + * + * Marvell DB-MV88AP510-BP Development Board Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-dove/dove.h b/arch/arm/mach-dove/dove.h +index 320ed1696abdc..e5054e3b0b782 100644 +--- a/arch/arm/mach-dove/dove.h ++++ b/arch/arm/mach-dove/dove.h +@@ -1,10 +1,5 @@ +-/* +- * Generic definitions for Marvell Dove 88AP510 SoC +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* Generic definitions for Marvell Dove 88AP510 SoC */ + + #ifndef __ASM_ARCH_DOVE_H + #define __ASM_ARCH_DOVE_H +diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c +index 31ccbcee26274..0c851a11183d2 100644 +--- a/arch/arm/mach-dove/irq.c ++++ b/arch/arm/mach-dove/irq.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/irq.c + * + * Dove IRQ handling. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-dove/irqs.h b/arch/arm/mach-dove/irqs.h +index a0742179faffe..5467098c70428 100644 +--- a/arch/arm/mach-dove/irqs.h ++++ b/arch/arm/mach-dove/irqs.h +@@ -1,10 +1,5 @@ +-/* +- * IRQ definitions for Marvell Dove 88AP510 SoC +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* IRQ definitions for Marvell Dove 88AP510 SoC */ + + #ifndef __ASM_ARCH_IRQS_H + #define __ASM_ARCH_IRQS_H +diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c +index 6acd8488bb05f..93cb137da5f86 100644 +--- a/arch/arm/mach-dove/mpp.c ++++ b/arch/arm/mach-dove/mpp.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/mpp.c + * + * MPP functions for Marvell Dove SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c +index ee91ac6b5ebf1..cff5c77aa7a6c 100644 +--- a/arch/arm/mach-dove/pcie.c ++++ b/arch/arm/mach-dove/pcie.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-dove/pcie.c + * + * PCIe functions for Marvell Dove 88AP510 SoC +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-dove/pm.h b/arch/arm/mach-dove/pm.h +index 01267746d7072..a4c3aba1e2d0d 100644 +--- a/arch/arm/mach-dove/pm.h ++++ b/arch/arm/mach-dove/pm.h +@@ -1,8 +1,4 @@ +-/* +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ + + #ifndef __ASM_ARCH_PM_H + #define __ASM_ARCH_PM_H +diff --git a/arch/arm/mach-lpc18xx/board-dt.c b/arch/arm/mach-lpc18xx/board-dt.c +index fdcee78d1bc4c..4729eb83401ae 100644 +--- a/arch/arm/mach-lpc18xx/board-dt.c ++++ b/arch/arm/mach-lpc18xx/board-dt.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree board file for NXP LPC18xx/43xx + * + * Copyright (C) 2015 Joachim Eastwood +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c +index b27fa1b9f56c1..2572bd89a5e8d 100644 +--- a/arch/arm/mach-lpc32xx/pm.c ++++ b/arch/arm/mach-lpc32xx/pm.c +@@ -1,13 +1,11 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-lpc32xx/pm.c + * + * Original authors: Vitaly Wool, Dmitry Chigirev + * Modified by Kevin Wells + * +- * 2005 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2005 (c) MontaVista Software, Inc. + */ + + /* +diff --git a/arch/arm/mach-lpc32xx/suspend.S b/arch/arm/mach-lpc32xx/suspend.S +index 3f0a8282ef6fd..a95c5e0e40384 100644 +--- a/arch/arm/mach-lpc32xx/suspend.S ++++ b/arch/arm/mach-lpc32xx/suspend.S +@@ -1,13 +1,11 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-lpc32xx/suspend.S + * + * Original authors: Dmitry Chigirev, Vitaly Wool + * Modified by Kevin Wells + * +- * 2005 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2005 (c) MontaVista Software, Inc. + */ + #include + #include +diff --git a/arch/arm/mach-mv78xx0/bridge-regs.h b/arch/arm/mach-mv78xx0/bridge-regs.h +index 2f54e1753d45e..d57ac967c4b39 100644 +--- a/arch/arm/mach-mv78xx0/bridge-regs.h ++++ b/arch/arm/mach-mv78xx0/bridge-regs.h +@@ -1,8 +1,4 @@ +-/* +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ + + #ifndef __ASM_ARCH_BRIDGE_REGS_H + #define __ASM_ARCH_BRIDGE_REGS_H +diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +index e112f2e7cc9a9..9aa765d4cdc8a 100644 +--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c ++++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c + * + * Buffalo WXL (Terastation Duo) Setup routines + * + * sebastien requiem +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c +index dd762d1b083fd..461a68945c26e 100644 +--- a/arch/arm/mach-mv78xx0/common.c ++++ b/arch/arm/mach-mv78xx0/common.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78xx0/common.c + * + * Core functions for Marvell MV78xx0 SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h +index 6889af26077da..d8c6c2400e278 100644 +--- a/arch/arm/mach-mv78xx0/common.h ++++ b/arch/arm/mach-mv78xx0/common.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-mv78xx0/common.h + * + * Core functions for Marvell MV78xx0 SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ARCH_MV78XX0_COMMON_H +diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +index cf16e08d4cf5b..da633a33a0c12 100644 +--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c ++++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78xx0/db78x00-bp-setup.c + * + * Marvell DB-78x00-BP Development Board Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c +index 788569e960e15..da7a219e2ef55 100644 +--- a/arch/arm/mach-mv78xx0/irq.c ++++ b/arch/arm/mach-mv78xx0/irq.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78xx0/irq.c + * + * MV78xx0 IRQ handling. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-mv78xx0/irqs.h b/arch/arm/mach-mv78xx0/irqs.h +index 67e0fe730a13f..12b357d383d88 100644 +--- a/arch/arm/mach-mv78xx0/irqs.h ++++ b/arch/arm/mach-mv78xx0/irqs.h +@@ -1,10 +1,5 @@ +-/* +- * IRQ definitions for Marvell MV78xx0 SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* IRQ definitions for Marvell MV78xx0 SoCs */ + + #ifndef __ASM_ARCH_IRQS_H + #define __ASM_ARCH_IRQS_H +diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c +index 72843c02e95ac..aff0e612cbba5 100644 +--- a/arch/arm/mach-mv78xx0/mpp.c ++++ b/arch/arm/mach-mv78xx0/mpp.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78x00/mpp.c + * + * MPP functions for Marvell MV78x00 SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-mv78xx0/mpp.h b/arch/arm/mach-mv78xx0/mpp.h +index 3752302ae2ee3..47db52f45546e 100644 +--- a/arch/arm/mach-mv78xx0/mpp.h ++++ b/arch/arm/mach-mv78xx0/mpp.h +@@ -1,12 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins + * +- * + * sebastien requiem +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MV78X00_MPP_H +diff --git a/arch/arm/mach-mv78xx0/mv78xx0.h b/arch/arm/mach-mv78xx0/mv78xx0.h +index c1a9a1d1b2957..3f19bef7d7ace 100644 +--- a/arch/arm/mach-mv78xx0/mv78xx0.h ++++ b/arch/arm/mach-mv78xx0/mv78xx0.h +@@ -1,10 +1,7 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Generic definitions for Marvell MV78xx0 SoC flavors: + * MV781x0 and MV782x0. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ASM_ARCH_MV78XX0_H +diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c +index 636d84b404664..c07f1641179bd 100644 +--- a/arch/arm/mach-mv78xx0/pcie.c ++++ b/arch/arm/mach-mv78xx0/pcie.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78xx0/pcie.c + * + * PCIe functions for Marvell MV78xx0 SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +index 308ab71ec8221..80ca8b1a81de2 100644 +--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c ++++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mv78x00/rd78x00-masa-setup.c + * + * Marvell RD-78x00-mASA Development Board Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h +index 09413b6784099..c96ecdafe31f1 100644 +--- a/arch/arm/mach-mvebu/armada-370-xp.h ++++ b/arch/arm/mach-mvebu/armada-370-xp.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Generic definitions for Marvell Armada_370_XP SoCs + * +@@ -6,10 +7,6 @@ + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_ARMADA_370_XP_H +diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c +index d2df5ef9382b4..fd5d0c8ff6958 100644 +--- a/arch/arm/mach-mvebu/board-v7.c ++++ b/arch/arm/mach-mvebu/board-v7.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Device Tree support for Armada 370 and XP platforms. + * +@@ -6,10 +7,6 @@ + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c +index 49e3c8d20c2fa..883dab1b54f3d 100644 +--- a/arch/arm/mach-mvebu/coherency.c ++++ b/arch/arm/mach-mvebu/coherency.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Coherency fabric (Aurora) support for Armada 370, 375, 38x and XP + * platforms. +@@ -8,10 +9,6 @@ + * Gregory Clement + * Thomas Petazzoni + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * The Armada 370, 375, 38x and XP SOCs have a coherency fabric which is + * responsible for ensuring hardware coherency between all CPUs and between + * CPUs and I/O masters. This file initializes the coherency fabric and +diff --git a/arch/arm/mach-mvebu/coherency.h b/arch/arm/mach-mvebu/coherency.h +index 6067f14263f79..cae866ab48673 100644 +--- a/arch/arm/mach-mvebu/coherency.h ++++ b/arch/arm/mach-mvebu/coherency.h +@@ -1,14 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-mvebu/include/mach/coherency.h + * +- * + * Coherency fabric (Aurora) support for Armada 370 and XP platforms. + * + * Copyright (C) 2012 Marvell +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_370_XP_COHERENCY_H +diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S +index a3a64bf972507..eb81656e32d47 100644 +--- a/arch/arm/mach-mvebu/coherency_ll.S ++++ b/arch/arm/mach-mvebu/coherency_ll.S +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Coherency fabric: low level functions + * +@@ -5,10 +6,6 @@ + * + * Gregory CLEMENT + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * This file implements the assembly function to add a CPU to the + * coherency fabric. This function is called by each of the secondary + * CPUs during their early boot in an SMP kernel, this why this +diff --git a/arch/arm/mach-mvebu/common.h b/arch/arm/mach-mvebu/common.h +index 6b775492cfadc..fbfa3c4f30df7 100644 +--- a/arch/arm/mach-mvebu/common.h ++++ b/arch/arm/mach-mvebu/common.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Core functions for Marvell System On Chip + * +@@ -6,10 +7,6 @@ + * Lior Amsalem + * Gregory CLEMENT + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ARCH_MVEBU_COMMON_H +diff --git a/arch/arm/mach-mvebu/cpu-reset.c b/arch/arm/mach-mvebu/cpu-reset.c +index f33a31c6aff8b..66b6c0c6ce1de 100644 +--- a/arch/arm/mach-mvebu/cpu-reset.c ++++ b/arch/arm/mach-mvebu/cpu-reset.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (C) 2014 Marvell + * + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "mvebu-cpureset: " fmt +diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c +index d076c5771adc2..c938ba725d3e9 100644 +--- a/arch/arm/mach-mvebu/dove.c ++++ b/arch/arm/mach-mvebu/dove.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-mvebu/dove.c + * + * Marvell Dove 88AP510 System On Chip FDT Board +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S +index b093a196e8017..df723cf85caec 100644 +--- a/arch/arm/mach-mvebu/headsmp-a9.S ++++ b/arch/arm/mach-mvebu/headsmp-a9.S +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * SMP support: Entry point for secondary CPUs of Marvell EBU + * Cortex-A9 based SOCs (Armada 375 and Armada 38x). +@@ -6,10 +7,6 @@ + * + * Gregory CLEMENT + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S +index 2c4032e368bad..f05c59dad32ac 100644 +--- a/arch/arm/mach-mvebu/headsmp.S ++++ b/arch/arm/mach-mvebu/headsmp.S +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * SMP support: Entry point for secondary CPUs + * +@@ -7,10 +8,6 @@ + * Gregory CLEMENT + * Thomas Petazzoni + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * This file implements the assembly entry point for secondary CPUs in + * an SMP kernel. The only thing we need to do is to add the CPU to + * the coherency fabric by writing to 2 registers. Currently the base +diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c +index ceaad6d5927e5..5ca2253a76d0e 100644 +--- a/arch/arm/mach-mvebu/kirkwood.c ++++ b/arch/arm/mach-mvebu/kirkwood.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright 2012 (C), Jason Cooper + * + * arch/arm/mach-mvebu/kirkwood.c + * + * Flattened Device Tree board initialization +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/kirkwood.h b/arch/arm/mach-mvebu/kirkwood.h +index 89f3d1f516435..15135994ce2f2 100644 +--- a/arch/arm/mach-mvebu/kirkwood.h ++++ b/arch/arm/mach-mvebu/kirkwood.h +@@ -1,12 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-mvebu/kirkwood.h + * + * Generic definitions for Marvell Kirkwood SoC flavors: + * 88F6180, 88F6192 and 88F6281. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 +diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c +index a99434bcee849..f436c7b8c7aee 100644 +--- a/arch/arm/mach-mvebu/mvebu-soc-id.c ++++ b/arch/arm/mach-mvebu/mvebu-soc-id.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * ID and revision information for mvebu SoCs + * +@@ -5,10 +6,6 @@ + * + * Gregory CLEMENT + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * All the mvebu SoCs have information related to their variant and + * revision that can be read from the PCI control register. This is + * done before the PCI initialization to avoid any conflict. Once the +diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.h b/arch/arm/mach-mvebu/mvebu-soc-id.h +index e124a0b82a3e7..225649b2288a2 100644 +--- a/arch/arm/mach-mvebu/mvebu-soc-id.h ++++ b/arch/arm/mach-mvebu/mvebu-soc-id.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Marvell EBU SoC ID and revision definitions. + * + * Copyright (C) 2014 Marvell Semiconductor +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __LINUX_MVEBU_SOC_ID_H +diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c +index d715dec1c197d..785ee2af5baab 100644 +--- a/arch/arm/mach-mvebu/platsmp-a9.c ++++ b/arch/arm/mach-mvebu/platsmp-a9.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Symmetric Multi Processing (SMP) support for Marvell EBU Cortex-A9 + * based SOCs (Armada 375/38x). +@@ -6,10 +7,6 @@ + * + * Gregory CLEMENT + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c +index c130497dc6cc4..18384ea6862cf 100644 +--- a/arch/arm/mach-mvebu/platsmp.c ++++ b/arch/arm/mach-mvebu/platsmp.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Symmetric Multi Processing (SMP) support for Armada XP + * +@@ -8,10 +9,6 @@ + * Gregory CLEMENT + * Thomas Petazzoni + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency + * This file implements the routines for preparing the SMP infrastructure + * and waking up the secondary CPUs +diff --git a/arch/arm/mach-mvebu/pm-board.c b/arch/arm/mach-mvebu/pm-board.c +index 0705525116996..7fa1806acd659 100644 +--- a/arch/arm/mach-mvebu/pm-board.c ++++ b/arch/arm/mach-mvebu/pm-board.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Board-level suspend/resume support. + * + * Copyright (C) 2014-2015 Marvell + * + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/pm.c b/arch/arm/mach-mvebu/pm.c +index c487be61d6d8c..b149d9b775050 100644 +--- a/arch/arm/mach-mvebu/pm.c ++++ b/arch/arm/mach-mvebu/pm.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Suspend/resume support. Currently supporting Armada XP only. + * + * Copyright (C) 2014 Marvell + * + * Thomas Petazzoni +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c +index 73d5d72dfc3e5..af27a7156675a 100644 +--- a/arch/arm/mach-mvebu/pmsu.c ++++ b/arch/arm/mach-mvebu/pmsu.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Power Management Service Unit(PMSU) support for Armada 370/XP platforms. + * +@@ -7,10 +8,6 @@ + * Gregory Clement + * Thomas Petazzoni + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * The Armada 370 and Armada XP SOCs have a power management service + * unit which is responsible for powering down and waking up CPUs and + * other SOC units +diff --git a/arch/arm/mach-mvebu/pmsu.h b/arch/arm/mach-mvebu/pmsu.h +index ea79269c27023..1e847388e8dde 100644 +--- a/arch/arm/mach-mvebu/pmsu.h ++++ b/arch/arm/mach-mvebu/pmsu.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Power Management Service Unit (PMSU) support for Armada 370/XP platforms. + * + * Copyright (C) 2012 Marvell +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_MVEBU_PMSU_H +diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S +index 7aae9a25cfeb7..f7d21385fd88c 100644 +--- a/arch/arm/mach-mvebu/pmsu_ll.S ++++ b/arch/arm/mach-mvebu/pmsu_ll.S +@@ -1,12 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Copyright (C) 2014 Marvell + * + * Thomas Petazzoni + * Gregory Clement +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c +index 04d9ebe6a90a0..48224b6ed6dc7 100644 +--- a/arch/arm/mach-mvebu/system-controller.c ++++ b/arch/arm/mach-mvebu/system-controller.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * System controller support for Armada 370, 375 and XP platforms. + * +@@ -7,10 +8,6 @@ + * Gregory CLEMENT + * Thomas Petazzoni + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * The Armada 370, 375 and Armada XP SoCs have a range of + * miscellaneous registers, that do not belong to a particular device, + * but rather provide system-level features. This basic +diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/include/mach/mtd-xip.h +index d09b2bc4920fe..b163b8a65605b 100644 +--- a/arch/arm/mach-omap1/include/mach/mtd-xip.h ++++ b/arch/arm/mach-omap1/include/mach/mtd-xip.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * MTD primitives for XIP support. Architecture specific functions. + * +@@ -5,10 +6,7 @@ + * + * Author: Vladimir Barinov + * +- * (c) 2005 MontaVista Software, Inc. This file is licensed under the +- * terms of the GNU General Public License version 2. This program is +- * licensed "as is" without any warranty of any kind, whether express or +- * implied. ++ * (c) 2005 MontaVista Software, Inc. + */ + + #ifndef __ARCH_OMAP_MTD_XIP_H__ +diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c +index 667c1637ff919..c04619ac06312 100644 +--- a/arch/arm/mach-omap1/pm_bus.c ++++ b/arch/arm/mach-omap1/pm_bus.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Runtime PM support code for OMAP1 + * + * Author: Kevin Hilman, Deep Root Systems, LLC + * + * Copyright (C) 2010 Texas Instruments, Inc. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +@@ -43,4 +40,3 @@ static int __init omap1_pm_runtime_init(void) + return 0; + } + core_initcall(omap1_pm_runtime_init); +- +diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h +index 899da0ae98000..31860ffd28abc 100644 +--- a/arch/arm/mach-omap2/prcm43xx.h ++++ b/arch/arm/mach-omap2/prcm43xx.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * AM43x PRCM defines + * + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ +- * +- * This file is licensed under the terms of the GNU General Public License +- * version 2. This program is licensed "as is" without any warranty of any +- * kind, whether express or implied. + */ + + #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H +diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c +index 86f1ac4c24125..ea02d40405c4a 100644 +--- a/arch/arm/mach-omap2/vc.c ++++ b/arch/arm/mach-omap2/vc.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * OMAP Voltage Controller (VC) interface + * + * Copyright (C) 2011 Texas Instruments, Inc. +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +@@ -895,4 +892,3 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) + else if (cpu_is_omap44xx()) + omap4_vc_init_channel(voltdm); + } +- +diff --git a/arch/arm/mach-orion5x/board-d2net.c b/arch/arm/mach-orion5x/board-d2net.c +index a89376a5cd929..0297e302d7bc8 100644 +--- a/arch/arm/mach-orion5x/board-d2net.c ++++ b/arch/arm/mach-orion5x/board-d2net.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/board-d2net.c + * + * LaCie d2Network and Big Disk Network NAS setup + * + * Copyright (C) 2009 Simon Guinot +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c +index 3f651df3a71cf..be47492c6640d 100644 +--- a/arch/arm/mach-orion5x/board-dt.c ++++ b/arch/arm/mach-orion5x/board-dt.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright 2012 (C), Thomas Petazzoni + * + * arch/arm/mach-orion5x/board-dt.c + * + * Flattened Device Tree board initialization +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/board-rd88f5182.c b/arch/arm/mach-orion5x/board-rd88f5182.c +index b7b0f52f4c0a0..596601367989a 100644 +--- a/arch/arm/mach-orion5x/board-rd88f5182.c ++++ b/arch/arm/mach-orion5x/board-rd88f5182.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/rd88f5182-setup.c + * + * Marvell Orion-NAS Reference Design Setup + * + * Maintainer: Ronen Shitrit +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/bridge-regs.h b/arch/arm/mach-orion5x/bridge-regs.h +index 305598eaaee15..fe85bc5b131fc 100644 +--- a/arch/arm/mach-orion5x/bridge-regs.h ++++ b/arch/arm/mach-orion5x/bridge-regs.h +@@ -1,10 +1,5 @@ +-/* +- * Orion CPU Bridge Registers +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* Orion CPU Bridge Registers */ + + #ifndef __ASM_ARCH_BRIDGE_REGS_H + #define __ASM_ARCH_BRIDGE_REGS_H +diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c +index 7bcb41137bbf6..2e711b7252c64 100644 +--- a/arch/arm/mach-orion5x/common.c ++++ b/arch/arm/mach-orion5x/common.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/common.c + * + * Core functions for Marvell Orion 5x SoCs + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c +index 39eae10ac8def..fe1a4cef1ba2d 100644 +--- a/arch/arm/mach-orion5x/db88f5281-setup.c ++++ b/arch/arm/mach-orion5x/db88f5281-setup.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/db88f5281-setup.c + * + * Marvell Orion-2 Development Board Setup + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c +index ac4af2283bef9..5b076eefe2b4a 100644 +--- a/arch/arm/mach-orion5x/irq.c ++++ b/arch/arm/mach-orion5x/irq.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/irq.c + * + * Core IRQ functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/irqs.h b/arch/arm/mach-orion5x/irqs.h +index 506c8e0b30c42..a70c47cfa6bcb 100644 +--- a/arch/arm/mach-orion5x/irqs.h ++++ b/arch/arm/mach-orion5x/irqs.h +@@ -1,11 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * IRQ definitions for Orion SoC + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ASM_ARCH_IRQS_H +diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c +index 83d43cff4bd77..acba066180801 100644 +--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c ++++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/kurobox_pro-setup.c + * + * Maintainer: Ronen Shitrit +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c +index 47ba6e0502f59..af07f617465f7 100644 +--- a/arch/arm/mach-orion5x/ls_hgl-setup.c ++++ b/arch/arm/mach-orion5x/ls_hgl-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/ls_hgl-setup.c + * + * Maintainer: Zhu Qingsen +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c +index 19ef185944158..b9855dce6ba0a 100644 +--- a/arch/arm/mach-orion5x/mpp.c ++++ b/arch/arm/mach-orion5x/mpp.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/mpp.c + * + * MPP functions for Marvell Orion 5x SoCs +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c +index bf6be4cfd2384..695cc683cd833 100644 +--- a/arch/arm/mach-orion5x/net2big-setup.c ++++ b/arch/arm/mach-orion5x/net2big-setup.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/net2big-setup.c + * + * LaCie 2Big Network NAS setup + * + * Copyright (C) 2009 Simon Guinot +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +@@ -432,4 +429,3 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network") + .fixup = tag_fixup_mem32, + .restart = orion5x_restart, + MACHINE_END +- +diff --git a/arch/arm/mach-orion5x/orion5x.h b/arch/arm/mach-orion5x/orion5x.h +index 2b66120fba86c..26f1ccb8cb281 100644 +--- a/arch/arm/mach-orion5x/orion5x.h ++++ b/arch/arm/mach-orion5x/orion5x.h +@@ -1,12 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * Generic definitions of Orion SoC flavors: + * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __ASM_ARCH_ORION5X_H +diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c +index 76951bfbacf57..fa62add8cf8a6 100644 +--- a/arch/arm/mach-orion5x/pci.c ++++ b/arch/arm/mach-orion5x/pci.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/pci.c + * + * PCI and PCIe functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +index c65ab7db36ad9..432fc8357d9e1 100644 +--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c ++++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c + * + * Marvell Orion-VoIP FXO Reference Design Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +index 76b8138d9d79b..d4b1a9c3cd362 100644 +--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c ++++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c + * + * Marvell Orion-VoIP GE Reference Design Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c +index fe3e67c81fb82..6ffcfc6445e24 100644 +--- a/arch/arm/mach-orion5x/rd88f5182-setup.c ++++ b/arch/arm/mach-orion5x/rd88f5182-setup.c +@@ -1,13 +1,10 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/rd88f5182-setup.c + * + * Marvell Orion-NAS Reference Design Setup + * + * Maintainer: Ronen Shitrit +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +index 5f388a1ed1e4c..93f74fd6b4dac 100644 +--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c ++++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c + * + * Marvell Orion-1-90 AP GE Reference Design Setup +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c +index a39764faf2a01..af810e7ccd796 100644 +--- a/arch/arm/mach-orion5x/ts78xx-setup.c ++++ b/arch/arm/mach-orion5x/ts78xx-setup.c +@@ -1,11 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-orion5x/ts78xx-setup.c + * + * Maintainer: Alexander Clouter +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c +index 83589a28a4911..e5f327054dd33 100644 +--- a/arch/arm/mach-orion5x/wnr854t-setup.c ++++ b/arch/arm/mach-orion5x/wnr854t-setup.c +@@ -1,10 +1,5 @@ +-/* +- * arch/arm/mach-orion5x/wnr854t-setup.c +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// arch/arm/mach-orion5x/wnr854t-setup.c + #include + #include + #include +diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c +index cea08d4a25974..e6a2da6662df5 100644 +--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c ++++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c +@@ -1,10 +1,5 @@ +-/* +- * arch/arm/mach-orion5x/wrt350n-v2-setup.c +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ ++// SPDX-License-Identifier: GPL-2.0-only ++// arch/arm/mach-orion5x/wrt350n-v2-setup.c + #include + #include + #include +diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c +index f37c44b6139d7..b9e235cb5a073 100644 +--- a/arch/arm/mach-pxa/eseries.c ++++ b/arch/arm/mach-pxa/eseries.c +@@ -1,13 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton +- * +- * This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. +- * + */ + + #include +diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S +index eab1645bb4adb..60d0d14d4a0fe 100644 +--- a/arch/arm/mach-pxa/standby.S ++++ b/arch/arm/mach-pxa/standby.S +@@ -1,12 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * PXA27x standby mode + * + * Author: David Burrage + * +- * 2005 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. ++ * 2005 (c) MontaVista Software, Inc. + */ + + #include +diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h +index 25b4c5e66e396..ab34d6c19d0c0 100644 +--- a/arch/arm/mach-spear/generic.h ++++ b/arch/arm/mach-spear/generic.h +@@ -1,13 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * spear machine family generic header file + * + * Copyright (C) 2009-2012 ST Microelectronics + * Rajeev Kumar + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_GENERIC_H +diff --git a/arch/arm/mach-spear/include/mach/misc_regs.h b/arch/arm/mach-spear/include/mach/misc_regs.h +index cfaf7c665b588..12a789bd896e0 100644 +--- a/arch/arm/mach-spear/include/mach/misc_regs.h ++++ b/arch/arm/mach-spear/include/mach/misc_regs.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/mach-spear3xx/include/mach/misc_regs.h + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_MISC_REGS_H +diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h +index 5ed841ccf8a38..432efd407c763 100644 +--- a/arch/arm/mach-spear/include/mach/spear.h ++++ b/arch/arm/mach-spear/include/mach/spear.h +@@ -1,13 +1,10 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * SPEAr3xx/6xx Machine family specific definition + * + * Copyright (C) 2009,2012 ST Microelectronics + * Rajeev Kumar + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __MACH_SPEAR_H +diff --git a/arch/arm/mach-spear/pl080.c b/arch/arm/mach-spear/pl080.c +index b4529f3e0ee97..35c929de46755 100644 +--- a/arch/arm/mach-spear/pl080.c ++++ b/arch/arm/mach-spear/pl080.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/plat-spear/pl080.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-spear/pl080.h b/arch/arm/mach-spear/pl080.h +index 608dec6725aea..3732d940dbfb6 100644 +--- a/arch/arm/mach-spear/pl080.h ++++ b/arch/arm/mach-spear/pl080.h +@@ -1,3 +1,4 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * arch/arm/plat-spear/include/plat/pl080.h + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #ifndef __PLAT_PL080_H +diff --git a/arch/arm/mach-spear/restart.c b/arch/arm/mach-spear/restart.c +index b4342155a7833..01f529675629f 100644 +--- a/arch/arm/mach-spear/restart.c ++++ b/arch/arm/mach-spear/restart.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/plat-spear/restart.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + #include + #include +diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c +index a7d4f136836fa..020b27e65aea0 100644 +--- a/arch/arm/mach-spear/spear1310.c ++++ b/arch/arm/mach-spear/spear1310.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear13xx/spear1310.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr1310: " fmt +diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c +index a212af90c0bc6..a391f154eff9b 100644 +--- a/arch/arm/mach-spear/spear1340.c ++++ b/arch/arm/mach-spear/spear1340.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear13xx/spear1340.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr1340: " fmt +diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c +index 31c43cabf3623..e287873f5187f 100644 +--- a/arch/arm/mach-spear/spear13xx.c ++++ b/arch/arm/mach-spear/spear13xx.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear13xx/spear13xx.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr13xx: " fmt +diff --git a/arch/arm/mach-spear/spear300.c b/arch/arm/mach-spear/spear300.c +index 325b89579be10..490df8aaad90c 100644 +--- a/arch/arm/mach-spear/spear300.c ++++ b/arch/arm/mach-spear/spear300.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear3xx/spear300.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr300: " fmt +diff --git a/arch/arm/mach-spear/spear310.c b/arch/arm/mach-spear/spear310.c +index 59e173dc85cf3..5ca325fc1b825 100644 +--- a/arch/arm/mach-spear/spear310.c ++++ b/arch/arm/mach-spear/spear310.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear3xx/spear310.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr310: " fmt +diff --git a/arch/arm/mach-spear/spear320.c b/arch/arm/mach-spear/spear320.c +index 0958f68a21e23..9b68fb9c3f000 100644 +--- a/arch/arm/mach-spear/spear320.c ++++ b/arch/arm/mach-spear/spear320.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear3xx/spear320.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr320: " fmt +diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c +index 8537fcffe5a86..505f2ed5e42b1 100644 +--- a/arch/arm/mach-spear/spear3xx.c ++++ b/arch/arm/mach-spear/spear3xx.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear3xx/spear3xx.c + * +@@ -5,10 +6,6 @@ + * + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #define pr_fmt(fmt) "SPEAr3xx: " fmt +diff --git a/arch/arm/mach-spear/spear6xx.c b/arch/arm/mach-spear/spear6xx.c +index c5fc110134ba6..11eb64a369807 100644 +--- a/arch/arm/mach-spear/spear6xx.c ++++ b/arch/arm/mach-spear/spear6xx.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mach-spear6xx/spear6xx.c + * +@@ -7,10 +8,6 @@ + * Rajeev Kumar + * + * Copyright 2012 Stefan Roese +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c +index d1fdb6066f7bb..6baf952fa902f 100644 +--- a/arch/arm/mach-spear/time.c ++++ b/arch/arm/mach-spear/time.c +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/plat-spear/time.c + * + * Copyright (C) 2010 ST Microelectronics + * Shiraz Hashim +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. + */ + + #include +diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c +index 5c1b7a7b9af63..25dbd84a1aafa 100644 +--- a/arch/arm/mm/cache-feroceon-l2.c ++++ b/arch/arm/mm/cache-feroceon-l2.c +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mm/cache-feroceon-l2.c - Feroceon L2 cache controller support + * + * Copyright (C) 2008 Marvell Semiconductor + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * References: + * - Unified Layer 2 Cache for Feroceon CPU Cores, + * Document ID MV-S104858-00, Rev. A, October 23 2007. +diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c +index 88255bea65e41..b1e1aba602f7f 100644 +--- a/arch/arm/mm/cache-tauros2.c ++++ b/arch/arm/mm/cache-tauros2.c +@@ -1,12 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only + /* + * arch/arm/mm/cache-tauros2.c - Tauros2 L2 cache controller support + * + * Copyright (C) 2008 Marvell Semiconductor + * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- * + * References: + * - PJ1 CPU Core Datasheet, + * Document ID MV-S104837-01, Rev 0.7, January 24 2008. +-- +2.40.1 + diff --git a/queue-5.10/xtensa-add-default-definition-for-xchal_have_div32.patch b/queue-5.10/xtensa-add-default-definition-for-xchal_have_div32.patch new file mode 100644 index 00000000000..8e92ce84eed --- /dev/null +++ b/queue-5.10/xtensa-add-default-definition-for-xchal_have_div32.patch @@ -0,0 +1,45 @@ +From 7de3b3aa9ebb229bc2443ace3d7460ecd178106f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Sep 2023 04:15:22 -0700 +Subject: xtensa: add default definition for XCHAL_HAVE_DIV32 + +From: Max Filippov + +[ Upstream commit 494e87ffa0159b3f879694a9231089707792a44d ] + +When variant FSF is set, XCHAL_HAVE_DIV32 is not defined. Add default +definition for that macro to prevent build warnings: + +arch/xtensa/lib/divsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef] + 9 | #if XCHAL_HAVE_DIV32 +arch/xtensa/lib/modsi3.S:9:5: warning: "XCHAL_HAVE_DIV32" is not defined, evaluates to 0 [-Wundef] + 9 | #if XCHAL_HAVE_DIV32 + +Fixes: 173d6681380a ("xtensa: remove extra header files") +Suggested-by: Randy Dunlap +Signed-off-by: Max Filippov +Reported-by: kernel test robot +Closes: lore.kernel.org/r/202309150556.t0yCdv3g-lkp@intel.com +Signed-off-by: Sasha Levin +--- + arch/xtensa/include/asm/core.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/xtensa/include/asm/core.h b/arch/xtensa/include/asm/core.h +index a4e40166ff4bb..0fa3649649e98 100644 +--- a/arch/xtensa/include/asm/core.h ++++ b/arch/xtensa/include/asm/core.h +@@ -6,6 +6,10 @@ + + #include + ++#ifndef XCHAL_HAVE_DIV32 ++#define XCHAL_HAVE_DIV32 0 ++#endif ++ + #ifndef XCHAL_HAVE_EXCLUSIVE + #define XCHAL_HAVE_EXCLUSIVE 0 + #endif +-- +2.40.1 + diff --git a/queue-5.10/xtensa-boot-don-t-add-include-dirs.patch b/queue-5.10/xtensa-boot-don-t-add-include-dirs.patch new file mode 100644 index 00000000000..ac604de2d1e --- /dev/null +++ b/queue-5.10/xtensa-boot-don-t-add-include-dirs.patch @@ -0,0 +1,43 @@ +From a826563f593417214c47315d6bfff2a318e582b1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Sep 2023 22:21:37 -0700 +Subject: xtensa: boot: don't add include-dirs + +From: Randy Dunlap + +[ Upstream commit 54d3d7d363823782c3444ddc41bb8cf1edc80514 ] + +Drop the -I options to prevent build warnings since there +is not boot/include directory: + +cc1: warning: arch/xtensa/boot/include: No such file or directory [-Wmissing-include-dirs] + +Fixes: 437374e9a950 ("restore arch/{ppc/xtensa}/boot cflags") +Fixes: 4bedea945451 ("xtensa: Architecture support for Tensilica Xtensa Part 2") +Signed-off-by: Randy Dunlap +Cc: Chris Zankel +Cc: Max Filippov +Message-Id: <20230920052139.10570-15-rdunlap@infradead.org> +Signed-off-by: Max Filippov +Signed-off-by: Sasha Levin +--- + arch/xtensa/boot/Makefile | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/xtensa/boot/Makefile b/arch/xtensa/boot/Makefile +index f6bb352f94b43..c8fd705d08b2c 100644 +--- a/arch/xtensa/boot/Makefile ++++ b/arch/xtensa/boot/Makefile +@@ -9,8 +9,7 @@ + + + # KBUILD_CFLAGS used when building rest of boot (takes effect recursively) +-KBUILD_CFLAGS += -fno-builtin -Iarch/$(ARCH)/boot/include +-HOSTFLAGS += -Iarch/$(ARCH)/boot/include ++KBUILD_CFLAGS += -fno-builtin + + BIG_ENDIAN := $(shell echo __XTENSA_EB__ | $(CC) -E - | grep -v "\#") + +-- +2.40.1 + diff --git a/queue-5.10/xtensa-boot-lib-fix-function-prototypes.patch b/queue-5.10/xtensa-boot-lib-fix-function-prototypes.patch new file mode 100644 index 00000000000..3b1bae0cdf6 --- /dev/null +++ b/queue-5.10/xtensa-boot-lib-fix-function-prototypes.patch @@ -0,0 +1,52 @@ +From f81530eb27130c7915812bc0a9e464063ee37e85 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Sep 2023 04:41:09 -0700 +Subject: xtensa: boot/lib: fix function prototypes + +From: Max Filippov + +[ Upstream commit f54d02c8f2cc4b46ba2a3bd8252a6750453b6f2b ] + +Add function prototype for gunzip() to the boot library code and make +exit() and zalloc() static. + +arch/xtensa/boot/lib/zmem.c:8:6: warning: no previous prototype for 'exit' [-Wmissing-prototypes] + 8 | void exit (void) +arch/xtensa/boot/lib/zmem.c:13:7: warning: no previous prototype for 'zalloc' [-Wmissing-prototypes] + 13 | void *zalloc(unsigned size) +arch/xtensa/boot/lib/zmem.c:35:6: warning: no previous prototype for 'gunzip' [-Wmissing-prototypes] + 35 | void gunzip (void *dst, int dstlen, unsigned char *src, int *lenp) + +Fixes: 4bedea945451 ("xtensa: Architecture support for Tensilica Xtensa Part 2") +Fixes: e7d163f76665 ("xtensa: Removed local copy of zlib and fixed O= support") +Suggested-by: Randy Dunlap +Signed-off-by: Max Filippov +Signed-off-by: Sasha Levin +--- + arch/xtensa/boot/lib/zmem.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/xtensa/boot/lib/zmem.c b/arch/xtensa/boot/lib/zmem.c +index e3ecd743c5153..b89189355122a 100644 +--- a/arch/xtensa/boot/lib/zmem.c ++++ b/arch/xtensa/boot/lib/zmem.c +@@ -4,13 +4,14 @@ + /* bits taken from ppc */ + + extern void *avail_ram, *end_avail; ++void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp); + +-void exit (void) ++static void exit(void) + { + for (;;); + } + +-void *zalloc(unsigned size) ++static void *zalloc(unsigned int size) + { + void *p = avail_ram; + +-- +2.40.1 + diff --git a/queue-5.10/xtensa-iss-network-make-functions-static.patch b/queue-5.10/xtensa-iss-network-make-functions-static.patch new file mode 100644 index 00000000000..f9ee7480f93 --- /dev/null +++ b/queue-5.10/xtensa-iss-network-make-functions-static.patch @@ -0,0 +1,53 @@ +From 6d61e023e72c0cb827d17ead653c7f829e49e6fa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 19 Sep 2023 22:21:36 -0700 +Subject: xtensa: iss/network: make functions static + +From: Randy Dunlap + +[ Upstream commit 1b59efeb59851277266318f4e0132aa61ce3455e ] + +Make 2 functions static to prevent build warnings: + +arch/xtensa/platforms/iss/network.c:204:16: warning: no previous prototype for 'tuntap_protocol' [-Wmissing-prototypes] + 204 | unsigned short tuntap_protocol(struct sk_buff *skb) +arch/xtensa/platforms/iss/network.c:444:6: warning: no previous prototype for 'iss_net_user_timer_expire' [-Wmissing-prototypes] + 444 | void iss_net_user_timer_expire(struct timer_list *unused) + +Fixes: 7282bee78798 ("xtensa: Architecture support for Tensilica Xtensa Part 8") +Fixes: d8479a21a98b ("xtensa: Convert timers to use timer_setup()") +Signed-off-by: Randy Dunlap +Cc: Chris Zankel +Cc: Max Filippov +Message-Id: <20230920052139.10570-14-rdunlap@infradead.org> +Signed-off-by: Max Filippov +Signed-off-by: Sasha Levin +--- + arch/xtensa/platforms/iss/network.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c +index 1270de83435eb..e8491ac0d5b93 100644 +--- a/arch/xtensa/platforms/iss/network.c ++++ b/arch/xtensa/platforms/iss/network.c +@@ -204,7 +204,7 @@ static int tuntap_write(struct iss_net_private *lp, struct sk_buff **skb) + return simc_write(lp->tp.info.tuntap.fd, (*skb)->data, (*skb)->len); + } + +-unsigned short tuntap_protocol(struct sk_buff *skb) ++static unsigned short tuntap_protocol(struct sk_buff *skb) + { + return eth_type_trans(skb, skb->dev); + } +@@ -477,7 +477,7 @@ static int iss_net_change_mtu(struct net_device *dev, int new_mtu) + return -EINVAL; + } + +-void iss_net_user_timer_expire(struct timer_list *unused) ++static void iss_net_user_timer_expire(struct timer_list *unused) + { + } + +-- +2.40.1 +