From: Heiko Stuebner Date: Sun, 1 Feb 2026 19:18:03 +0000 (+0100) Subject: arm64: dts: rockchip: add overlay for qnap-ts233 device revision X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=a12bd8d24f2f942a6684431af9f885b4a4ae84fe;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: rockchip: add overlay for qnap-ts233 device revision TS233 devices received a board revision adding gpios for per hard-disk presence-detection and power-control. These boards have a PCB-id of at least 12 (mainboard) and 11 (backplane), which can be read from an EEPROM. The presence detection is not really necessary and there are also no existing bindings for doing something with it. So add them as gpio hogs to at least document them and allow their state to be read from debugfs. The power-control is modelled as regulators, with the hdd1+hdd2 variants connected to the RK3568's SATA controllers as target-supplies. Signed-off-by: Heiko Stuebner Link: https://patch.msgid.link/20260201191804.41421-4-heiko@sntech.de Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 2183466883c78..bd0582f5d3247 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -151,6 +151,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-cm3j-rpi-cm4.dtb @@ -263,6 +264,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \ rk3399-rockpro64-screen.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtb +rk3568-qnap-ts233-pcb-12-11-dtbs := rk3568-qnap-ts233.dtb \ + rk3568-qnap-ts233-pcb-12-11.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtb rk3568-qnap-ts433-pcb-12-10-dtbs := rk3568-qnap-ts433.dtb \ rk3568-qnap-ts433-pcb-12-10.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso new file mode 100644 index 0000000000000..c7987171644c1 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device tree overlay for TS233 board PCBs-12-11 revision. + * + * Copyright (C) 2025 Heiko Stuebner + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + /* + * The default hardware-state of this gpio causes the drive + * to be already running when entering the kernel. + * regulator-boot-on is needed to prevent one additional + * power-cycle on the drive. + * + * With regulator-boot-on we get the expected 1 cycle + * per boot, without it we end up with 2 cycles as seen + * via smartctl. + */ + hdd1_pwr: regulator-hdd1-power { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdd1_power_pin>; + regulator-name = "hdd1-power"; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; + + hdd2_pwr: regulator-hdd2-power { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hdd2_power_pin>; + regulator-name = "hdd2-power"; + regulator-boot-on; + vin-supply = <&dc_12v>; + }; +}; + +&gpio2 { + hdd1-present-hog { + gpios = ; + gpio-hog; + input; + line-name = "hdd1-present"; + }; + + hdd2-present-hog { + gpios = ; + gpio-hog; + input; + line-name = "hdd2-present"; + }; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&hdd1_present_pin &hdd2_present_pin>; + + hdd-power { + hdd1_power_pin: hdd1-power-pin { + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdd2_power_pin: hdd2-power-pin { + rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdd-present { + hdd1_present_pin: hdd1-present-pin { + rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd2_present_pin: hdd2-present-pin { + rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sata1_port0 { + target-supply = <&hdd2_pwr>; +}; + +&sata2_port0 { + target-supply = <&hdd1_pwr>; +};