From: Luiz Angelo Daros de Luca Date: Fri, 7 Jan 2022 04:47:06 +0000 (-0300) Subject: ramips: ethernet: ralink: fix MT7620A_GDMA regs X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=a24bdc2e9f84622e7b86471a394e83ab96f2b09b;p=thirdparty%2Fopenwrt.git ramips: ethernet: ralink: fix MT7620A_GDMA regs Registers in MT7620A_GDMA_OFFSET range were incorrect, except for the first one GDM_FWD_CFG (which is actually the only one in use). The next and last register is GDM_SHPR_CFG. All others are not mentioned in docs. Signed-off-by: Luiz Angelo Daros de Luca Link: https://github.com/openwrt/openwrt/pull/23933 Signed-off-by: Robert Marko --- diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h index 151caae1dcc..95f4af25547 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h @@ -151,10 +151,7 @@ enum fe_work_flag { #define MT7620A_GDMA_OFFSET 0x0600 #endif #define MT7620A_GDMA1_FWD_CFG (MT7620A_GDMA_OFFSET + 0x00) -#define MT7620A_FE_GDMA1_SCH_CFG (MT7620A_GDMA_OFFSET + 0x04) -#define MT7620A_FE_GDMA1_SHPR_CFG (MT7620A_GDMA_OFFSET + 0x08) -#define MT7620A_FE_GDMA1_MAC_ADRL (MT7620A_GDMA_OFFSET + 0x0C) -#define MT7620A_FE_GDMA1_MAC_ADRH (MT7620A_GDMA_OFFSET + 0x10) +#define MT7620A_FE_GDMA1_SHPR_CFG (MT7620A_GDMA_OFFSET + 0x04) #define RT5350_TX_BASE_PTR0 (RT5350_PDMA_OFFSET + 0x00) #define RT5350_TX_MAX_CNT0 (RT5350_PDMA_OFFSET + 0x04)