From: Sasha Levin Date: Wed, 21 Jul 2021 10:46:16 +0000 (-0400) Subject: Fixes for 5.4 X-Git-Tag: v5.4.135~40 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=a81c77a0bbb24adf86a0dad11f8c82189679f2d6;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 5.4 Signed-off-by: Sasha Levin --- diff --git a/queue-5.4/arm-brcmstb-dts-fix-nand-nodes-names.patch b/queue-5.4/arm-brcmstb-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..7f6cfa0d2bd --- /dev/null +++ b/queue-5.4/arm-brcmstb-dts-fix-nand-nodes-names.patch @@ -0,0 +1,55 @@ +From 607d2853c8532ce2699f47190d058e1cdd88bcc2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:49 +0200 +Subject: ARM: brcmstb: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 9a800ce1aada6e0f56b78e4713f4858c8990c1f7 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 4 ++-- + arch/arm/boot/dts/bcm7445.dtsi | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts +index 8313b7cad542..f92d2cf85972 100644 +--- a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts ++++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts +@@ -14,10 +14,10 @@ + }; + }; + +-&nand { ++&nand_controller { + status = "okay"; + +- nandcs@1 { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <1>; + nand-ecc-step-size = <512>; +diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi +index 58f67c9b830b..5ac2042515b8 100644 +--- a/arch/arm/boot/dts/bcm7445.dtsi ++++ b/arch/arm/boot/dts/bcm7445.dtsi +@@ -148,7 +148,7 @@ + reg-names = "aon-ctrl", "aon-sram"; + }; + +- nand: nand@3e2800 { ++ nand_controller: nand-controller@3e2800 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +-- +2.30.2 + diff --git a/queue-5.4/arm-cygnus-dts-fix-nand-nodes-names.patch b/queue-5.4/arm-cygnus-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..62aeb654b8d --- /dev/null +++ b/queue-5.4/arm-cygnus-dts-fix-nand-nodes-names.patch @@ -0,0 +1,85 @@ +From 7382d9ef3ccb06e414efdebe852b7fc779ded0c5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:50 +0200 +Subject: ARM: Cygnus: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit e256b48a3b07ee1ae4bfa60abbf509ba8e386862 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +- + arch/arm/boot/dts/bcm911360_entphn.dts | 4 ++-- + arch/arm/boot/dts/bcm958300k.dts | 4 ++-- + arch/arm/boot/dts/bcm958305k.dts | 4 ++-- + 4 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi +index 1bc45cfd5453..9ca7b4241c97 100644 +--- a/arch/arm/boot/dts/bcm-cygnus.dtsi ++++ b/arch/arm/boot/dts/bcm-cygnus.dtsi +@@ -460,7 +460,7 @@ + status = "disabled"; + }; + +- nand: nand@18046000 { ++ nand_controller: nand-controller@18046000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x18046000 0x600>, <0xf8105408 0x600>, + <0x18046f00 0x20>; +diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts +index b2d323f4a5ab..a76c74b44bba 100644 +--- a/arch/arm/boot/dts/bcm911360_entphn.dts ++++ b/arch/arm/boot/dts/bcm911360_entphn.dts +@@ -82,8 +82,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts +index b4a1392bd5a6..dda3e11b711f 100644 +--- a/arch/arm/boot/dts/bcm958300k.dts ++++ b/arch/arm/boot/dts/bcm958300k.dts +@@ -60,8 +60,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts +index 3378683321d3..ea3c6b88b313 100644 +--- a/arch/arm/boot/dts/bcm958305k.dts ++++ b/arch/arm/boot/dts/bcm958305k.dts +@@ -68,8 +68,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@1 { ++&nand_controller { ++ nand@1 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch b/queue-5.4/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..c844641538c --- /dev/null +++ b/queue-5.4/arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,133 @@ +From 8ee18b7ca54ece6dac127e308659bf760057a84f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:54 +0300 +Subject: ARM: dts: am335x: align GPIO hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit fb97f63106f3174992a22fe5e42dda96a0810750 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am335x-boneblack-wireless.dts | 2 +- + arch/arm/boot/dts/am335x-boneblue.dts | 2 +- + arch/arm/boot/dts/am335x-bonegreen-wireless.dts | 4 ++-- + arch/arm/boot/dts/am335x-icev2.dts | 4 ++-- + arch/arm/boot/dts/am335x-shc.dts | 8 ++++---- + 5 files changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +index 3124d94c0b3c..3056c3e3e312 100644 +--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts ++++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts +@@ -102,7 +102,7 @@ + }; + + &gpio3 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts +index 2f6652ef9a15..8b98aa2d9588 100644 +--- a/arch/arm/boot/dts/am335x-boneblue.dts ++++ b/arch/arm/boot/dts/am335x-boneblue.dts +@@ -435,7 +435,7 @@ + }; + + &gpio3 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts +index 4092cd193b8a..8d85c6a851c3 100644 +--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts ++++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts +@@ -102,7 +102,7 @@ + }; + + &gpio1 { +- ls_buf_en { ++ ls-buf-en-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + output-high; +@@ -119,7 +119,7 @@ + /* an external pulldown on U21 pin 4. */ + + &gpio3 { +- bt_aud_in { ++ bt-aud-in-hog { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-low; +diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts +index 204bccfcc110..1e52dfe4f2d3 100644 +--- a/arch/arm/boot/dts/am335x-icev2.dts ++++ b/arch/arm/boot/dts/am335x-icev2.dts +@@ -445,14 +445,14 @@ + }; + + &gpio3 { +- p4 { ++ pr1-mii-ctl-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PR1_MII_CTRL"; + }; + +- p10 { ++ mux-mii-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */ +diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts +index 5b0368504015..852cf61478e6 100644 +--- a/arch/arm/boot/dts/am335x-shc.dts ++++ b/arch/arm/boot/dts/am335x-shc.dts +@@ -144,14 +144,14 @@ + }; + + &gpio1 { +- hmtc_rst { ++ hmtc-rst-hog { + gpio-hog; + gpios = <24 GPIO_ACTIVE_LOW>; + output-high; + line-name = "homematic_reset"; + }; + +- hmtc_prog { ++ hmtc-prog-hog { + gpio-hog; + gpios = <27 GPIO_ACTIVE_LOW>; + output-high; +@@ -160,14 +160,14 @@ + }; + + &gpio3 { +- zgb_rst { ++ zgb-rst-hog { + gpio-hog; + gpios = <18 GPIO_ACTIVE_LOW>; + output-low; + line-name = "zigbee_reset"; + }; + +- zgb_boot { ++ zgb-boot-hog { + gpio-hog; + gpios = <19 GPIO_ACTIVE_HIGH>; + output-high; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch b/queue-5.4/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..a45a994925d --- /dev/null +++ b/queue-5.4/arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,58 @@ +From 5fb6aa79fb3a40ee9ca6d244aa30017860748e4c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:55 +0300 +Subject: ARM: dts: am437x: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit bd551acdde3ad40da1a97391abd6e0db7852bf66 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am437x-gp-evm.dts | 4 ++-- + arch/arm/boot/dts/am43x-epos-evm.dts | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts +index 811c8cae315b..acc4c2760f46 100644 +--- a/arch/arm/boot/dts/am437x-gp-evm.dts ++++ b/arch/arm/boot/dts/am437x-gp-evm.dts +@@ -802,7 +802,7 @@ + pinctrl-0 = <&gpio0_pins>; + status = "okay"; + +- p23 { ++ sel-emmc-nand-hog { + gpio-hog; + gpios = <23 GPIO_ACTIVE_HIGH>; + /* SelEMMCorNAND selects between eMMC and NAND: +@@ -835,7 +835,7 @@ + status = "okay"; + ti,no-reset-on-init; + +- p8 { ++ sel-lcd-hdmi-hog { + /* + * SelLCDorHDMI selects between display and audio paths: + * Low: HDMI display with audio via HDMI +diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts +index a9f191d78b54..8a565d3f6824 100644 +--- a/arch/arm/boot/dts/am43x-epos-evm.dts ++++ b/arch/arm/boot/dts/am43x-epos-evm.dts +@@ -717,7 +717,7 @@ + pinctrl-0 = <&display_mux_pins>; + status = "okay"; + +- p1 { ++ sel-lcd-hdmi-hog { + /* + * SelLCDorHDMI selects between display and audio paths: + * Low: HDMI display with audio via HDMI +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch b/queue-5.4/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch new file mode 100644 index 00000000000..c02d75bd8e0 --- /dev/null +++ b/queue-5.4/arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch @@ -0,0 +1,58 @@ +From 5e45e18156e12ee7b0afd78c2df11c2ca609594a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 May 2021 01:24:10 +0300 +Subject: ARM: dts: am437x-gp-evm: fix ti,no-reset-on-init flag for gpios + +From: Grygorii Strashko + +[ Upstream commit 2566d5b8c1670f7d7a44cc1426d254147ec5c421 ] + +The ti,no-reset-on-init flag need to be at the interconnect target module +level for the modules that have it defined. +The ti-sysc driver handles this case, but produces warning, not a critical +issue. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am437x-gp-evm.dts | 5 ++++- + arch/arm/boot/dts/am437x-l4.dtsi | 2 +- + 2 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts +index acc4c2760f46..537c9eb8b748 100644 +--- a/arch/arm/boot/dts/am437x-gp-evm.dts ++++ b/arch/arm/boot/dts/am437x-gp-evm.dts +@@ -829,11 +829,14 @@ + status = "okay"; + }; + ++&gpio5_target { ++ ti,no-reset-on-init; ++}; ++ + &gpio5 { + pinctrl-names = "default"; + pinctrl-0 = <&display_mux_pins>; + status = "okay"; +- ti,no-reset-on-init; + + sel-lcd-hdmi-hog { + /* +diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi +index bbe15775fccd..6c2949991e29 100644 +--- a/arch/arm/boot/dts/am437x-l4.dtsi ++++ b/arch/arm/boot/dts/am437x-l4.dtsi +@@ -2077,7 +2077,7 @@ + }; + }; + +- target-module@22000 { /* 0x48322000, ap 116 64.0 */ ++ gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + ti,hwmods = "gpio6"; + reg = <0x22000 0x4>, +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch b/queue-5.4/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch new file mode 100644 index 00000000000..e204b690b0a --- /dev/null +++ b/queue-5.4/arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch @@ -0,0 +1,66 @@ +From 135eac08374fcf6d5a984db9540a37c6c1461942 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 May 2021 01:24:09 +0300 +Subject: ARM: dts: am57xx-cl-som-am57x: fix ti,no-reset-on-init flag for gpios + +From: Grygorii Strashko + +[ Upstream commit b644c5e01c870056e13a096e14b9a92075c8f682 ] + +The ti,no-reset-on-init flag need to be at the interconnect target module +level for the modules that have it defined. +The ti-sysc driver handles this case, but produces warning, not a critical +issue. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 5 ++--- + arch/arm/boot/dts/dra7-l4.dtsi | 4 ++-- + 2 files changed, 4 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +index 34ca761aeded..e86d4795e024 100644 +--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts ++++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +@@ -611,12 +611,11 @@ + >; + }; + +-&gpio3 { +- status = "okay"; ++&gpio3_target { + ti,no-reset-on-init; + }; + +-&gpio2 { ++&gpio2_target { + status = "okay"; + ti,no-reset-on-init; + }; +diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi +index bc702579488b..3f845a8531f4 100644 +--- a/arch/arm/boot/dts/dra7-l4.dtsi ++++ b/arch/arm/boot/dts/dra7-l4.dtsi +@@ -1326,7 +1326,7 @@ + }; + }; + +- target-module@55000 { /* 0x48055000, ap 13 0e.0 */ ++ gpio2_target: target-module@55000 { /* 0x48055000, ap 13 0e.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x55000 0x4>, + <0x55010 0x4>, +@@ -1359,7 +1359,7 @@ + }; + }; + +- target-module@57000 { /* 0x48057000, ap 15 06.0 */ ++ gpio3_target: target-module@57000 { /* 0x48057000, ap 15 06.0 */ + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x57000 0x4>, + <0x57010 0x4>, +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-bcm63xx-fix-nand-nodes-names.patch b/queue-5.4/arm-dts-bcm63xx-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..55e4c53bbf1 --- /dev/null +++ b/queue-5.4/arm-dts-bcm63xx-fix-nand-nodes-names.patch @@ -0,0 +1,55 @@ +From ed4a5b40afdcfa1fe062100d8668f84801adb0b8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:52 +0200 +Subject: ARM: dts: BCM63xx: Fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 75e2f012f6e34b93124d1d86eaa8f27df48e9ea0 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm63138.dtsi | 2 +- + arch/arm/boot/dts/bcm963138dvt.dts | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi +index 9c0325cf9e22..cca49a2e2d62 100644 +--- a/arch/arm/boot/dts/bcm63138.dtsi ++++ b/arch/arm/boot/dts/bcm63138.dtsi +@@ -203,7 +203,7 @@ + status = "disabled"; + }; + +- nand: nand@2000 { ++ nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; +diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts +index 5b177274f182..df5c8ab90627 100644 +--- a/arch/arm/boot/dts/bcm963138dvt.dts ++++ b/arch/arm/boot/dts/bcm963138dvt.dts +@@ -31,10 +31,10 @@ + status = "okay"; + }; + +-&nand { ++&nand_controller { + status = "okay"; + +- nandcs@0 { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch b/queue-5.4/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch new file mode 100644 index 00000000000..554332a75f5 --- /dev/null +++ b/queue-5.4/arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch @@ -0,0 +1,78 @@ +From ff4a7f89f4c26b207423a99b5c6ad33525bc783e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 May 2021 09:54:06 +0200 +Subject: ARM: dts: dra7x-evm: Align GPIO hog names with dt-schema + +From: Geert Uytterhoeven + +[ Upstream commit 0c149400c2f676e7b4cc68e517db29005a7a38c7 ] + +The dt-schema for nxp,pcf8575 expects GPIO hogs node names to end with a +'hog' suffix. + +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Laurent Pinchart +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/dra7-evm.dts | 2 +- + arch/arm/boot/dts/dra71-evm.dts | 2 +- + arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- + arch/arm/boot/dts/dra76-evm.dts | 2 +- + 4 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index de7f85efaa51..498ccb46bca8 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -332,7 +332,7 @@ + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts +index fabeb7704753..88178a64b04f 100644 +--- a/arch/arm/boot/dts/dra71-evm.dts ++++ b/arch/arm/boot/dts/dra71-evm.dts +@@ -158,7 +158,7 @@ + }; + + &pcf_hdmi { +- p0 { ++ hdmi-i2c-disable-hog { + /* + * PM_OEn to High: Disable routing I2C3 to PM_I2C + * With this PM_SEL(p3) should not matter +diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi +index 8641a3d7d8ad..3638e0cefe38 100644 +--- a/arch/arm/boot/dts/dra72-evm-common.dtsi ++++ b/arch/arm/boot/dts/dra72-evm-common.dtsi +@@ -261,7 +261,7 @@ + */ + lines-initial-states = <0x0f2b>; + +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts +index 1fb6f13fb5e2..9bcb91841a02 100644 +--- a/arch/arm/boot/dts/dra76-evm.dts ++++ b/arch/arm/boot/dts/dra76-evm.dts +@@ -292,7 +292,7 @@ + reg = <0x26>; + gpio-controller; + #gpio-cells = <2>; +- p1 { ++ hdmi-audio-hog { + /* vin6_sel_s0: high: VIN6, low: audio */ + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-gemini-add-device_type-on-pci.patch b/queue-5.4/arm-dts-gemini-add-device_type-on-pci.patch new file mode 100644 index 00000000000..48860bd5626 --- /dev/null +++ b/queue-5.4/arm-dts-gemini-add-device_type-on-pci.patch @@ -0,0 +1,33 @@ +From bb19198eedee8989ec4249184f71b61cd79806c7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 May 2021 18:52:28 +0000 +Subject: ARM: dts: gemini: add device_type on pci + +From: Corentin Labbe + +[ Upstream commit 483f3645b3f7acfd1c78a19d51b80c0656161974 ] + +Fixes DT warning on pci node by adding the missing device_type. + +Signed-off-by: Corentin Labbe +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/gemini.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi +index 8cf67b11751f..ef4f1c5323bd 100644 +--- a/arch/arm/boot/dts/gemini.dtsi ++++ b/arch/arm/boot/dts/gemini.dtsi +@@ -286,6 +286,7 @@ + clock-names = "PCLK", "PCICLK"; + pinctrl-names = "default"; + pinctrl-0 = <&pci_default_pins>; ++ device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-gemini-rename-mdio-to-the-right-name.patch b/queue-5.4/arm-dts-gemini-rename-mdio-to-the-right-name.patch new file mode 100644 index 00000000000..886611fea86 --- /dev/null +++ b/queue-5.4/arm-dts-gemini-rename-mdio-to-the-right-name.patch @@ -0,0 +1,90 @@ +From 03ab8caa3a83b1da78e84a209edd27536997bd24 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 28 Apr 2021 17:48:30 +0000 +Subject: ARM: dts: gemini: rename mdio to the right name + +From: Corentin Labbe + +[ Upstream commit fc5b59b945b546e27977e99a5ca6fe61179ff0d2 ] + +ethernet-phy is not the right name for mdio, fix it. + +Signed-off-by: Corentin Labbe +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/gemini-dlink-dns-313.dts | 2 +- + arch/arm/boot/dts/gemini-nas4220b.dts | 2 +- + arch/arm/boot/dts/gemini-rut1xx.dts | 2 +- + arch/arm/boot/dts/gemini-wbd111.dts | 2 +- + arch/arm/boot/dts/gemini-wbd222.dts | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +index 360642a02a48..d0bbf2b970df 100644 +--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts ++++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts +@@ -140,7 +140,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + /* Uses MDC and MDIO */ + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ +diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts +index 521714f38eed..e1020e07e136 100644 +--- a/arch/arm/boot/dts/gemini-nas4220b.dts ++++ b/arch/arm/boot/dts/gemini-nas4220b.dts +@@ -62,7 +62,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts +index 08091d2a64e1..0ebda4efd9d0 100644 +--- a/arch/arm/boot/dts/gemini-rut1xx.dts ++++ b/arch/arm/boot/dts/gemini-rut1xx.dts +@@ -56,7 +56,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts +index 3a2761dd460f..5602ba8f30f2 100644 +--- a/arch/arm/boot/dts/gemini-wbd111.dts ++++ b/arch/arm/boot/dts/gemini-wbd111.dts +@@ -68,7 +68,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts +index 52b4dbc0c072..a4a260c36d75 100644 +--- a/arch/arm/boot/dts/gemini-wbd222.dts ++++ b/arch/arm/boot/dts/gemini-wbd222.dts +@@ -67,7 +67,7 @@ + }; + }; + +- mdio0: ethernet-phy { ++ mdio0: mdio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-hurricane-2-fix-nand-nodes-names.patch b/queue-5.4/arm-dts-hurricane-2-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..ce5a2732ccb --- /dev/null +++ b/queue-5.4/arm-dts-hurricane-2-fix-nand-nodes-names.patch @@ -0,0 +1,37 @@ +From 240926d3131be35b50f6904941c5cc14d64a12ba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:53 +0200 +Subject: ARM: dts: Hurricane 2: Fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit a4528d9029e2eda16e4fc9b9da1de1fbec10ab26 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-hr2.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi +index dd71ab08136b..30574101471a 100644 +--- a/arch/arm/boot/dts/bcm-hr2.dtsi ++++ b/arch/arm/boot/dts/bcm-hr2.dtsi +@@ -179,7 +179,7 @@ + status = "disabled"; + }; + +- nand: nand@26000 { ++ nand_controller: nand-controller@26000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x26000 0x600>, + <0x11b408 0x600>, +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch b/queue-5.4/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch new file mode 100644 index 00000000000..d01e3c6041a --- /dev/null +++ b/queue-5.4/arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch @@ -0,0 +1,49 @@ +From d83da2f583506c262c51610db1448452b0637772 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 12 Apr 2021 08:24:50 +0200 +Subject: ARM: dts: imx6: phyFLEX: Fix UART hardware flow control + +From: Primoz Fiser + +[ Upstream commit 14cdc1f243d79e0b46be150502b7dba9c5a6bdfd ] + +Serial interface uart3 on phyFLEX board is capable of 5-wire connection +including signals RTS and CTS for hardware flow control. + +Fix signals UART3_CTS_B and UART3_RTS_B padmux assignments and add +missing property "uart-has-rtscts" to allow serial interface to be +configured and used with the hardware flow control. + +Signed-off-by: Primoz Fiser +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +index 6678b97b1007..3617089dbe36 100644 +--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +@@ -315,8 +315,8 @@ + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 +- MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 +- MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 + >; + }; + +@@ -403,6 +403,7 @@ + &uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; ++ uart-has-rtscts; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch b/queue-5.4/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch new file mode 100644 index 00000000000..ad392beab49 --- /dev/null +++ b/queue-5.4/arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch @@ -0,0 +1,49 @@ +From fdec93bd4cdba5d12c811823301b4b57f918dd07 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:56 +0300 +Subject: ARM: dts: omap3: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit cfb4ab3b5df86c6001127346d8331f5e87012f91 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap3-evm-processor-common.dtsi | 2 +- + arch/arm/boot/dts/omap3-gta04a5.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +index b4109f48ec18..e6ba30a21166 100644 +--- a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi ++++ b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +@@ -195,7 +195,7 @@ + * for bus switch SN74CB3Q3384A, level-shifter SN74AVC16T245DGGR, and 1.8V. + */ + &gpio2 { +- en_usb2_port { ++ en-usb2-port-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; /* gpio_61 */ + output-low; +diff --git a/arch/arm/boot/dts/omap3-gta04a5.dts b/arch/arm/boot/dts/omap3-gta04a5.dts +index fd84bbf3b9cc..9ce8d81250aa 100644 +--- a/arch/arm/boot/dts/omap3-gta04a5.dts ++++ b/arch/arm/boot/dts/omap3-gta04a5.dts +@@ -37,7 +37,7 @@ + }; + + &gpio5 { +- irda_en { ++ irda-en-hog { + gpio-hog; + gpios = <(175-160) GPIO_ACTIVE_HIGH>; + output-high; /* activate gpio_175 to disable IrDA receiver */ +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch b/queue-5.4/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch new file mode 100644 index 00000000000..c14cb685f2a --- /dev/null +++ b/queue-5.4/arm-dts-omap5-board-common-align-gpio-hog-names-with.patch @@ -0,0 +1,35 @@ +From 09a541f6d0bd755ad7898cab6d75c45f3119b8ba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 20:58:57 +0300 +Subject: ARM: dts: omap5-board-common: align gpio hog names with dt-schema + +From: Grygorii Strashko + +[ Upstream commit 4823117cb80eedf31ddbc126b9bd92e707bd9a26 ] + +The GPIO Hog dt-schema node naming convention expect GPIO hogs node names +to end with a 'hog' suffix. + +Signed-off-by: Grygorii Strashko +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/omap5-board-common.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi +index 68ac04641bdb..c73f32e8ca0f 100644 +--- a/arch/arm/boot/dts/omap5-board-common.dtsi ++++ b/arch/arm/boot/dts/omap5-board-common.dtsi +@@ -149,7 +149,7 @@ + + &gpio8 { + /* TI trees use GPIO instead of msecure, see also muxing */ +- p234 { ++ msecure-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch b/queue-5.4/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch new file mode 100644 index 00000000000..a44124a1a08 --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch @@ -0,0 +1,71 @@ +From 4fd2ecb8c3c18567928a592a2f08f04b06bc7e54 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 May 2021 11:02:29 +0200 +Subject: ARM: dts: rockchip: Fix IOMMU nodes properties on rk322x + +From: Benjamin Gaignard + +[ Upstream commit 6b023929666f0be5df75f5e0278d1b70effadf42 ] + +Add '#" to iommu-cells properties. +Remove useless interrupt-names properties + +Signed-off-by: Benjamin Gaignard +Link: https://lore.kernel.org/r/20210507090232.233049-4-benjamin.gaignard@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk322x.dtsi | 10 +++------- + 1 file changed, 3 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi +index 6bb78b19c555..140e22d74dcf 100644 +--- a/arch/arm/boot/dts/rk322x.dtsi ++++ b/arch/arm/boot/dts/rk322x.dtsi +@@ -570,10 +570,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20020800 0x100>; + interrupts = ; +- interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +@@ -581,10 +580,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20030480 0x40>, <0x200304c0 0x40>; + interrupts = ; +- interrupt-names = "vdec_mmu"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +@@ -614,7 +612,6 @@ + compatible = "rockchip,iommu"; + reg = <0x20053f00 0x100>; + interrupts = ; +- interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; +@@ -625,10 +622,9 @@ + compatible = "rockchip,iommu"; + reg = <0x20070800 0x100>; + interrupts = ; +- interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; +- iommu-cells = <0>; ++ #iommu-cells = <0>; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch b/queue-5.4/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch new file mode 100644 index 00000000000..a31a20c0ab8 --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch @@ -0,0 +1,57 @@ +From ddc2e2a2c4f229f9a5d807182d5028f874b6a78e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Jan 2021 12:02:20 +0100 +Subject: ARM: dts: rockchip: fix pinctrl sleep nodename for rk3036-kylin and + rk3288 + +From: Johan Jonker + +[ Upstream commit dfbfb86a43f9a5bbd166d88bca9e07ee4e1bff31 ] + +A test with the command below aimed at powerpc generates +notifications in the Rockchip ARM tree. + +Fix pinctrl "sleep" nodename by renaming it to "suspend" +for rk3036-kylin and rk3288 + +make ARCH=arm dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210126110221.10815-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3036-kylin.dts | 2 +- + arch/arm/boot/dts/rk3288.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts +index fb3cf005cc90..2ef47ebeb0cb 100644 +--- a/arch/arm/boot/dts/rk3036-kylin.dts ++++ b/arch/arm/boot/dts/rk3036-kylin.dts +@@ -390,7 +390,7 @@ + }; + }; + +- sleep { ++ suspend { + global_pwroff: global-pwroff { + rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>; + }; +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index cc893e154fe5..a452d4ea3938 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -1575,7 +1575,7 @@ + drive-strength = <12>; + }; + +- sleep { ++ suspend { + global_pwroff: global-pwroff { + rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; + }; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch new file mode 100644 index 00000000000..007b5d4397d --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch @@ -0,0 +1,56 @@ +From 3fbc70c7baa01762e134fbe28c2fc03b0527e1fe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:38 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3066a + +From: Elaine Zhang + +[ Upstream commit f2948781a72f0d8cf2adf31758c357f2f35e6c79 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3066a.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi +index 3d1b02f45ffd..1ac9deb3bd39 100644 +--- a/arch/arm/boot/dts/rk3066a.dtsi ++++ b/arch/arm/boot/dts/rk3066a.dtsi +@@ -761,7 +761,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_vio@RK3066_PD_VIO { ++ power-domain@RK3066_PD_VIO { + reg = ; + clocks = <&cru ACLK_LCDC0>, + <&cru ACLK_LCDC1>, +@@ -788,7 +788,7 @@ + <&qos_rga>; + }; + +- pd_video@RK3066_PD_VIDEO { ++ power-domain@RK3066_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VDPU>, + <&cru ACLK_VEPU>, +@@ -797,7 +797,7 @@ + pm_qos = <&qos_vpu>; + }; + +- pd_gpu@RK3066_PD_GPU { ++ power-domain@RK3066_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-11512 b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-11512 new file mode 100644 index 00000000000..0750e7e4f0f --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-11512 @@ -0,0 +1,56 @@ +From 23601562c1ab89a7436d7c1a2b4e66b0ce5aaab5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:39 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3188 + +From: Elaine Zhang + +[ Upstream commit d3bcbcd396175ac26aa54919c0b31c7d2878fc24 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-3-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3188.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi +index 41de555df844..ee8a24a0e3cb 100644 +--- a/arch/arm/boot/dts/rk3188.dtsi ++++ b/arch/arm/boot/dts/rk3188.dtsi +@@ -701,7 +701,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_vio@RK3188_PD_VIO { ++ power-domain@RK3188_PD_VIO { + reg = ; + clocks = <&cru ACLK_LCDC0>, + <&cru ACLK_LCDC1>, +@@ -723,7 +723,7 @@ + <&qos_rga>; + }; + +- pd_video@RK3188_PD_VIDEO { ++ power-domain@RK3188_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VDPU>, + <&cru ACLK_VEPU>, +@@ -732,7 +732,7 @@ + pm_qos = <&qos_vpu>; + }; + +- pd_gpu@RK3188_PD_GPU { ++ power-domain@RK3188_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-12832 b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-12832 new file mode 100644 index 00000000000..51e5830bafc --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-power-controller-node-names-for.patch-12832 @@ -0,0 +1,65 @@ +From 335f1691c6154c987ab2234ee98a80ed2872cebf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:40 +0200 +Subject: ARM: dts: rockchip: Fix power-controller node names for rk3288 + +From: Elaine Zhang + +[ Upstream commit 970cdc53cb1afa73602028c103dbfb6a230080be ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3288.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index 6f145b82780d..658ceb96d8bd 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -771,7 +771,7 @@ + * *_HDMI HDMI + * *_MIPI_* MIPI + */ +- pd_vio@RK3288_PD_VIO { ++ power-domain@RK3288_PD_VIO { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru ACLK_ISP>, +@@ -813,7 +813,7 @@ + * Note: The following 3 are HEVC(H.265) clocks, + * and on the ACLK_HEVC_NIU (NOC). + */ +- pd_hevc@RK3288_PD_HEVC { ++ power-domain@RK3288_PD_HEVC { + reg = ; + clocks = <&cru ACLK_HEVC>, + <&cru SCLK_HEVC_CABAC>, +@@ -827,7 +827,7 @@ + * (video endecoder & decoder) clocks that on the + * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). + */ +- pd_video@RK3288_PD_VIDEO { ++ power-domain@RK3288_PD_VIDEO { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; +@@ -838,7 +838,7 @@ + * Note: ACLK_GPU is the GPU clock, + * and on the ACLK_GPU_NIU (NOC). + */ +- pd_gpu@RK3288_PD_GPU { ++ power-domain@RK3288_PD_GPU { + reg = ; + clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu_r>, +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch b/queue-5.4/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch new file mode 100644 index 00000000000..128d996dd2c --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-supply-properties-in-io-domains.patch @@ -0,0 +1,55 @@ +From 6e1a9e57bb96f2095b7307b6d041fd05a67d78c0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 6 Jun 2021 20:16:32 +0200 +Subject: ARM: dts: rockchip: fix supply properties in io-domains nodes + +From: Johan Jonker + +[ Upstream commit f07edc41220b14ce057a4e6d7161b30688ddb8a2 ] + +A test with rockchip-io-domain.yaml gives notifications +for supply properties in io-domains nodes. +Fix them all into ".*-supply$" format. + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210606181632.13371-1-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- + arch/arm/boot/dts/rk3288-vyasa.dts | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi +index 9f9e2bfd1295..7b79a21f9bbb 100644 +--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi ++++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi +@@ -218,7 +218,7 @@ + flash0-supply = <&vcc_flash>; + flash1-supply = <&vccio_pmu>; + gpio30-supply = <&vccio_pmu>; +- gpio1830 = <&vcc_io>; ++ gpio1830-supply = <&vcc_io>; + lcdc-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vcc_18>; +diff --git a/arch/arm/boot/dts/rk3288-vyasa.dts b/arch/arm/boot/dts/rk3288-vyasa.dts +index ba06e9f97ddc..acfb7dc2df56 100644 +--- a/arch/arm/boot/dts/rk3288-vyasa.dts ++++ b/arch/arm/boot/dts/rk3288-vyasa.dts +@@ -357,10 +357,10 @@ + audio-supply = <&vcc_18>; + bb-supply = <&vcc_io>; + dvp-supply = <&vcc_io>; +- flash0-suuply = <&vcc_18>; ++ flash0-supply = <&vcc_18>; + flash1-supply = <&vcc_lan>; + gpio30-supply = <&vcc_io>; +- gpio1830 = <&vcc_io>; ++ gpio1830-supply = <&vcc_io>; + lcdc-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vcc_18>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-rockchip-fix-the-timer-clocks-order.patch b/queue-5.4/arm-dts-rockchip-fix-the-timer-clocks-order.patch new file mode 100644 index 00000000000..520d5b79e5f --- /dev/null +++ b/queue-5.4/arm-dts-rockchip-fix-the-timer-clocks-order.patch @@ -0,0 +1,65 @@ +From 99846094837b405cfe622f439d8ef73f1d290507 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 May 2021 08:11:35 -0300 +Subject: ARM: dts: rockchip: Fix the timer clocks order + +From: Ezequiel Garcia + +[ Upstream commit 7b46d674ac000b101fdad92cf16cc11d90b72f86 ] + +Fixed order is the device-tree convention. +The timer driver currently gets clocks by name, +so no changes are needed there. + +Signed-off-by: Ezequiel Garcia +Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/rk3188.dtsi | 8 ++++---- + arch/arm/boot/dts/rk3288.dtsi | 4 ++-- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi +index 10ede65d90f3..41de555df844 100644 +--- a/arch/arm/boot/dts/rk3188.dtsi ++++ b/arch/arm/boot/dts/rk3188.dtsi +@@ -150,16 +150,16 @@ + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x2000e000 0x20>; + interrupts = ; +- clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>; ++ clock-names = "pclk", "timer"; + }; + + timer6: timer@200380a0 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x200380a0 0x20>; + interrupts = ; +- clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>; ++ clock-names = "pclk", "timer"; + }; + + i2s0: i2s@1011a000 { +diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi +index a452d4ea3938..6f145b82780d 100644 +--- a/arch/arm/boot/dts/rk3288.dtsi ++++ b/arch/arm/boot/dts/rk3288.dtsi +@@ -238,8 +238,8 @@ + compatible = "rockchip,rk3288-timer"; + reg = <0x0 0xff810000 0x0 0x20>; + interrupts = ; +- clocks = <&xin24m>, <&cru PCLK_TIMER>; +- clock-names = "timer", "pclk"; ++ clocks = <&cru PCLK_TIMER>, <&xin24m>; ++ clock-names = "pclk", "timer"; + }; + + display-subsystem { +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch b/queue-5.4/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch new file mode 100644 index 00000000000..c0ce30a1781 --- /dev/null +++ b/queue-5.4/arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch @@ -0,0 +1,129 @@ +From 5100bc301561acdb42b10105bbb0167557697f0a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:25 +0200 +Subject: ARM: dts: stm32: fix gpio-keys node on STM32 MCU boards + +From: Alexandre Torgue + +[ Upstream commit bf24b91f4baf7e421c770a1d9c7d381b10206ac9 ] + +Fix following warning observed with "make dtbs_check W=1" command. +It concerns f429 eval and disco boards, f769 disco board. + +Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name, +but no reg or ranges property + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32429i-eval.dts | 8 +++----- + arch/arm/boot/dts/stm32746g-eval.dts | 6 ++---- + arch/arm/boot/dts/stm32f429-disco.dts | 6 ++---- + arch/arm/boot/dts/stm32f469-disco.dts | 6 ++---- + arch/arm/boot/dts/stm32f769-disco.dts | 6 ++---- + 5 files changed, 11 insertions(+), 21 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts +index ba08624c6237..4f45e71a1e4d 100644 +--- a/arch/arm/boot/dts/stm32429i-eval.dts ++++ b/arch/arm/boot/dts/stm32429i-eval.dts +@@ -112,17 +112,15 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "Wake up"; + linux,code = ; + gpios = <&gpioa 0 0>; + }; +- button@1 { ++ button-1 { + label = "Tamper"; + linux,code = ; + gpios = <&gpioc 13 0>; +diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts +index 2b1664884ae7..8d64b52838c0 100644 +--- a/arch/arm/boot/dts/stm32746g-eval.dts ++++ b/arch/arm/boot/dts/stm32746g-eval.dts +@@ -81,12 +81,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "Wake up"; + linux,code = ; + gpios = <&gpioc 13 0>; +diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts +index e19d0fe7dbda..49ae2d72afc9 100644 +--- a/arch/arm/boot/dts/stm32f429-disco.dts ++++ b/arch/arm/boot/dts/stm32f429-disco.dts +@@ -79,12 +79,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 0>; +diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts +index c6dc6d1a051b..0ce450123dda 100644 +--- a/arch/arm/boot/dts/stm32f469-disco.dts ++++ b/arch/arm/boot/dts/stm32f469-disco.dts +@@ -104,12 +104,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts +index 6f1d0ac8c31c..a4284b761e7f 100644 +--- a/arch/arm/boot/dts/stm32f769-disco.dts ++++ b/arch/arm/boot/dts/stm32f769-disco.dts +@@ -75,12 +75,10 @@ + }; + }; + +- gpio_keys { ++ gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + autorepeat; +- button@0 { ++ button-0 { + label = "User"; + linux,code = ; + gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch b/queue-5.4/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch new file mode 100644 index 00000000000..2257a9fb40e --- /dev/null +++ b/queue-5.4/arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch @@ -0,0 +1,36 @@ +From 6d54a0d92d5503f9c66377c58591906575aec686 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:30 +0200 +Subject: ARM: dts: stm32: fix i2c node name on stm32f746 to prevent warnings + +From: Alexandre Torgue + +[ Upstream commit ad0ed10ba5792064fc3accbf8f0341152a57eecb ] + +Replace upper case by lower case in i2c nodes name. + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f746.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi +index 974dc71b2fe3..60680fcf8eb3 100644 +--- a/arch/arm/boot/dts/stm32f746.dtsi ++++ b/arch/arm/boot/dts/stm32f746.dtsi +@@ -362,9 +362,9 @@ + status = "disabled"; + }; + +- i2c3: i2c@40005C00 { ++ i2c3: i2c@40005c00 { + compatible = "st,stm32f7-i2c"; +- reg = <0x40005C00 0x400>; ++ reg = <0x40005c00 0x400>; + interrupts = <72>, + <73>; + resets = <&rcc STM32F7_APB1_RESET(I2C3)>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch b/queue-5.4/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch new file mode 100644 index 00000000000..80f98386dd2 --- /dev/null +++ b/queue-5.4/arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch @@ -0,0 +1,36 @@ +From b2c61013f85357d67c6220eb456399c2b43c2c0c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:26 +0200 +Subject: ARM: dts: stm32: fix RCC node name on stm32f429 MCU + +From: Alexandre Torgue + +[ Upstream commit e4b948415a89a219d13e454011cdcf9e63ecc529 ] + +This prevent warning observed with "make dtbs_check W=1" + +Warning (simple_bus_reg): /soc/rcc@40023810: simple-bus unit address format +error, expected "40023800" + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f429.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi +index 5c8a826b3195..1476d3eaf6fa 100644 +--- a/arch/arm/boot/dts/stm32f429.dtsi ++++ b/arch/arm/boot/dts/stm32f429.dtsi +@@ -696,7 +696,7 @@ + status = "disabled"; + }; + +- rcc: rcc@40023810 { ++ rcc: rcc@40023800 { + #reset-cells = <1>; + #clock-cells = <2>; + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch b/queue-5.4/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch new file mode 100644 index 00000000000..30e3fedf013 --- /dev/null +++ b/queue-5.4/arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch @@ -0,0 +1,128 @@ +From 80ab054640ad3b64c84ad189f9ea952eef741fca Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:27 +0200 +Subject: ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings + +From: Alexandre Torgue + +[ Upstream commit 2388f14d8747f8304e26ee870790e188c9431efd ] + +Prevent warning seen with "make dtbs_check W=1" command: + +Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary +address-cells/size-cells without "ranges" or child "reg" property + +Reviewed-by: Fabrice Gasnier +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32f429.dtsi | 8 -------- + arch/arm/boot/dts/stm32f746.dtsi | 8 -------- + arch/arm/boot/dts/stm32h743.dtsi | 4 ---- + 3 files changed, 20 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi +index 1476d3eaf6fa..dd41342ef017 100644 +--- a/arch/arm/boot/dts/stm32f429.dtsi ++++ b/arch/arm/boot/dts/stm32f429.dtsi +@@ -283,8 +283,6 @@ + }; + + timers13: timers@40001c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40001C00 0x400>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>; +@@ -299,8 +297,6 @@ + }; + + timers14: timers@40002000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40002000 0x400>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>; +@@ -623,8 +619,6 @@ + }; + + timers10: timers@40014400 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014400 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>; +@@ -639,8 +633,6 @@ + }; + + timers11: timers@40014800 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>; +diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi +index d26f93f8b9c2..974dc71b2fe3 100644 +--- a/arch/arm/boot/dts/stm32f746.dtsi ++++ b/arch/arm/boot/dts/stm32f746.dtsi +@@ -265,8 +265,6 @@ + }; + + timers13: timers@40001c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40001C00 0x400>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>; +@@ -281,8 +279,6 @@ + }; + + timers14: timers@40002000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40002000 0x400>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>; +@@ -533,8 +529,6 @@ + }; + + timers10: timers@40014400 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014400 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>; +@@ -549,8 +543,6 @@ + }; + + timers11: timers@40014800 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>; +diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi +index c065266ee377..82a234c64b8b 100644 +--- a/arch/arm/boot/dts/stm32h743.dtsi ++++ b/arch/arm/boot/dts/stm32h743.dtsi +@@ -438,8 +438,6 @@ + }; + + lptimer4: timer@58002c00 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58002c00 0x400>; + clocks = <&rcc LPTIM4_CK>; +@@ -454,8 +452,6 @@ + }; + + lptimer5: timer@58003000 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58003000 0x400>; + clocks = <&rcc LPTIM5_CK>; +-- +2.30.2 + diff --git a/queue-5.4/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch b/queue-5.4/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch new file mode 100644 index 00000000000..706ad785d71 --- /dev/null +++ b/queue-5.4/arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch @@ -0,0 +1,53 @@ +From 5df4346ec58f7fb6186037a57179780e475857e1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 15 Apr 2021 12:10:31 +0200 +Subject: ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15 + +From: Alexandre Torgue + +[ Upstream commit fb1406335c067be074eab38206cf9abfdce2fb0b ] + +It fixes the following warning seen running "make dtbs_check W=1" + +Warning (simple_bus_reg): /soc/stmmac-axi-config: missing or empty +reg/ranges property + +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/stm32mp157c.dtsi | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi +index f98e0370c0bc..eca469a64a97 100644 +--- a/arch/arm/boot/dts/stm32mp157c.dtsi ++++ b/arch/arm/boot/dts/stm32mp157c.dtsi +@@ -1311,12 +1311,6 @@ + status = "disabled"; + }; + +- stmmac_axi_config_0: stmmac-axi-config { +- snps,wr_osr_lmt = <0x7>; +- snps,rd_osr_lmt = <0x7>; +- snps,blen = <0 0 0 0 16 8 4>; +- }; +- + ethernet0: ethernet@5800a000 { + compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800a000 0x2000>; +@@ -1339,6 +1333,12 @@ + snps,axi-config = <&stmmac_axi_config_0>; + snps,tso; + status = "disabled"; ++ ++ stmmac_axi_config_0: stmmac-axi-config { ++ snps,wr_osr_lmt = <0x7>; ++ snps,rd_osr_lmt = <0x7>; ++ snps,blen = <0 0 0 0 16 8 4>; ++ }; + }; + + usbh_ohci: usbh-ohci@5800c000 { +-- +2.30.2 + diff --git a/queue-5.4/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch b/queue-5.4/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch new file mode 100644 index 00000000000..7519158e8fb --- /dev/null +++ b/queue-5.4/arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch @@ -0,0 +1,44 @@ +From 5fb7930fbef31d1c6f4fde11c47eaa361ef96072 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 24 Apr 2021 14:37:28 +0200 +Subject: ARM: imx: pm-imx5: Fix references to imx5_cpu_suspend_info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jonathan Neuschäfer + +[ Upstream commit 89b759469d525f4d5f9c29cd3b1f490311c67f85 ] + +The name of the struct, as defined in arch/arm/mach-imx/pm-imx5.c, +is imx5_cpu_suspend_info. + +Signed-off-by: Jonathan Neuschäfer +Reviewed-by: Fabio Estevam +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/mach-imx/suspend-imx53.S | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-imx/suspend-imx53.S b/arch/arm/mach-imx/suspend-imx53.S +index 41b8aad65363..46570ec2fbcf 100644 +--- a/arch/arm/mach-imx/suspend-imx53.S ++++ b/arch/arm/mach-imx/suspend-imx53.S +@@ -28,11 +28,11 @@ + * ^ + * ^ + * imx53_suspend code +- * PM_INFO structure(imx53_suspend_info) ++ * PM_INFO structure(imx5_cpu_suspend_info) + * ======================== low address ======================= + */ + +-/* Offsets of members of struct imx53_suspend_info */ ++/* Offsets of members of struct imx5_cpu_suspend_info */ + #define SUSPEND_INFO_MX53_M4IF_V_OFFSET 0x0 + #define SUSPEND_INFO_MX53_IOMUXC_V_OFFSET 0x4 + #define SUSPEND_INFO_MX53_IO_COUNT_OFFSET 0x8 +-- +2.30.2 + diff --git a/queue-5.4/arm-nsp-dts-fix-nand-nodes-names.patch b/queue-5.4/arm-nsp-dts-fix-nand-nodes-names.patch new file mode 100644 index 00000000000..ffceeb076e2 --- /dev/null +++ b/queue-5.4/arm-nsp-dts-fix-nand-nodes-names.patch @@ -0,0 +1,165 @@ +From c3a23a330165696562ba40d109864e16ca93e855 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Apr 2021 15:37:51 +0200 +Subject: ARM: NSP: dts: fix NAND nodes names +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit 0484594be733d5cdf976f55a2d4e8d887f351b69 ] + +This matches nand-controller.yaml requirements. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- + arch/arm/boot/dts/bcm958522er.dts | 4 ++-- + arch/arm/boot/dts/bcm958525er.dts | 4 ++-- + arch/arm/boot/dts/bcm958525xmc.dts | 4 ++-- + arch/arm/boot/dts/bcm958622hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958623hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958625hr.dts | 4 ++-- + arch/arm/boot/dts/bcm958625k.dts | 4 ++-- + arch/arm/boot/dts/bcm988312hr.dts | 4 ++-- + 9 files changed, 17 insertions(+), 17 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi +index 8615d89fa469..43ff85d31dc1 100644 +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -267,7 +267,7 @@ + dma-coherent; + }; + +- nand: nand@26000 { ++ nand_controller: nand-controller@26000 { + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; + reg = <0x026000 0x600>, + <0x11b408 0x600>, +diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts +index 8c388eb8a08f..e9b2d3b37ca4 100644 +--- a/arch/arm/boot/dts/bcm958522er.dts ++++ b/arch/arm/boot/dts/bcm958522er.dts +@@ -70,8 +70,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts +index c339771bb22e..dfe145a3d05a 100644 +--- a/arch/arm/boot/dts/bcm958525er.dts ++++ b/arch/arm/boot/dts/bcm958525er.dts +@@ -70,8 +70,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts +index 1c72ec8288de..17e6a683e678 100644 +--- a/arch/arm/boot/dts/bcm958525xmc.dts ++++ b/arch/arm/boot/dts/bcm958525xmc.dts +@@ -86,8 +86,8 @@ + }; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts +index 96a021cebd97..1d1bc8dbb342 100644 +--- a/arch/arm/boot/dts/bcm958622hr.dts ++++ b/arch/arm/boot/dts/bcm958622hr.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts +index b2c7f21d471e..d5d9a273bb6d 100644 +--- a/arch/arm/boot/dts/bcm958623hr.dts ++++ b/arch/arm/boot/dts/bcm958623hr.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts +index a2c9de35ddfb..670363bca917 100644 +--- a/arch/arm/boot/dts/bcm958625hr.dts ++++ b/arch/arm/boot/dts/bcm958625hr.dts +@@ -90,8 +90,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts +index 3fcca12d83c2..f15cd38c849e 100644 +--- a/arch/arm/boot/dts/bcm958625k.dts ++++ b/arch/arm/boot/dts/bcm958625k.dts +@@ -64,8 +64,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts +index edd0f630e025..16b212cc8a2a 100644 +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -74,8 +74,8 @@ + status = "okay"; + }; + +-&nand { +- nandcs@0 { ++&nand_controller { ++ nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-imx8mq-assign-pcie-clocks.patch b/queue-5.4/arm64-dts-imx8mq-assign-pcie-clocks.patch new file mode 100644 index 00000000000..5f053b3b7e3 --- /dev/null +++ b/queue-5.4/arm64-dts-imx8mq-assign-pcie-clocks.patch @@ -0,0 +1,67 @@ +From 6f127a9387d0154cb1bf214ed6474a81684bbe8c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 8 May 2021 00:12:13 +0200 +Subject: arm64: dts: imx8mq: assign PCIe clocks + +From: Lucas Stach + +[ Upstream commit 15a5261e4d052bf85c7fba24dbe0e9a7c8c05925 ] + +This fixes multiple issues with the current non-existent PCIe clock setup: + +The controller can run at up to 250MHz, so use a parent that provides this +clock. + +The PHY needs an exact 100MHz reference clock to function if the PCIe +refclock is not fed in via the refclock pads. While this mode is not +supported (yet) in the driver it doesn't hurt to make sure we are +providing a clock with the right rate. + +The AUX clock is specified to have a maximum clock rate of 10MHz. So +the current setup, which drives it straight from the 25MHz oscillator is +actually overclocking the AUX input. + +Signed-off-by: Lucas Stach +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +index f1011bcd5ed5..3dae8d7c7619 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +@@ -1056,6 +1056,14 @@ + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; ++ assigned-clocks = <&clk IMX8MQ_CLK_PCIE1_CTRL>, ++ <&clk IMX8MQ_CLK_PCIE1_PHY>, ++ <&clk IMX8MQ_CLK_PCIE1_AUX>; ++ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, ++ <&clk IMX8MQ_SYS2_PLL_100M>, ++ <&clk IMX8MQ_SYS1_PLL_80M>; ++ assigned-clock-rates = <250000000>, <100000000>, ++ <10000000>; + status = "disabled"; + }; + +@@ -1085,6 +1093,14 @@ + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; ++ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>, ++ <&clk IMX8MQ_CLK_PCIE2_PHY>, ++ <&clk IMX8MQ_CLK_PCIE2_AUX>; ++ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>, ++ <&clk IMX8MQ_SYS2_PLL_100M>, ++ <&clk IMX8MQ_SYS1_PLL_80M>; ++ assigned-clock-rates = <250000000>, <100000000>, ++ <10000000>; + status = "disabled"; + }; + +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch b/queue-5.4/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch new file mode 100644 index 00000000000..071af6c5a48 --- /dev/null +++ b/queue-5.4/arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch @@ -0,0 +1,52 @@ +From 367d4df05ac18864239bfc088e352f194b1206b3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 8 Jun 2021 15:51:33 +0100 +Subject: arm64: dts: juno: Update SCPI nodes as per the YAML schema + +From: Sudeep Holla + +[ Upstream commit 70010556b158a0fefe43415fb0c58347dcce7da0 ] + +The SCPI YAML schema expects standard node names for clocks and +power domain controllers. Fix those as per the schema for Juno +platforms. + +Link: https://lore.kernel.org/r/20210608145133.2088631-1-sudeep.holla@arm.com +Signed-off-by: Sudeep Holla +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/arm/juno-base.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi +index c47f76b01c4b..65bcdd0fe78a 100644 +--- a/arch/arm64/boot/dts/arm/juno-base.dtsi ++++ b/arch/arm64/boot/dts/arm/juno-base.dtsi +@@ -537,13 +537,13 @@ + clocks { + compatible = "arm,scpi-clocks"; + +- scpi_dvfs: scpi-dvfs { ++ scpi_dvfs: clocks-0 { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>, <1>, <2>; + clock-output-names = "atlclk", "aplclk","gpuclk"; + }; +- scpi_clk: scpi-clk { ++ scpi_clk: clocks-1 { + compatible = "arm,scpi-variable-clocks"; + #clock-cells = <1>; + clock-indices = <3>; +@@ -551,7 +551,7 @@ + }; + }; + +- scpi_devpd: scpi-power-domains { ++ scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch b/queue-5.4/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch new file mode 100644 index 00000000000..bd7b54c7ace --- /dev/null +++ b/queue-5.4/arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch @@ -0,0 +1,48 @@ +From 7e5f5fd1d7d794a354210bd0f63760cb3e681c6f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 28 Apr 2021 14:58:07 +0200 +Subject: arm64: dts: ls208xa: remove bus-num from dspi node + +From: Mian Yousaf Kaukab + +[ Upstream commit 8240c972c1798ea013cbb407722295fc826b3584 ] + +On LS2088A-RDB board, if the spi-fsl-dspi driver is built as module +then its probe fails with the following warning: + +[ 10.471363] couldn't get idr +[ 10.471381] WARNING: CPU: 4 PID: 488 at drivers/spi/spi.c:2689 spi_register_controller+0x73c/0x8d0 +... +[ 10.471651] fsl-dspi 2100000.spi: Problem registering DSPI ctlr +[ 10.471708] fsl-dspi: probe of 2100000.spi failed with error -16 + +Reason for the failure is that bus-num property is set for dspi node. +However, bus-num property is not set for the qspi node. If probe for +spi-fsl-qspi happens first then id 0 is dynamically allocated to it. +Call to spi_register_controller() from spi-fsl-dspi driver then fails. +Since commit 29d2daf2c33c ("spi: spi-fsl-dspi: Make bus-num property +optional") bus-num property is optional. Remove bus-num property from +dspi node to fix the issue. + +Signed-off-by: Mian Yousaf Kaukab +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +index 7a0be8eaa84a..cdb2fa47637d 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +@@ -501,7 +501,6 @@ + clocks = <&clockgen 4 3>; + clock-names = "dspi"; + spi-num-chipselects = <5>; +- bus-num = <0>; + }; + + esdhc: esdhc@2140000 { +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch b/queue-5.4/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch new file mode 100644 index 00000000000..a93a69aa12e --- /dev/null +++ b/queue-5.4/arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch @@ -0,0 +1,42 @@ +From 7e1c95ea86c58f018d8133ab9f712fef4f06ef2b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 26 Jan 2021 12:02:21 +0100 +Subject: arm64: dts: rockchip: fix pinctrl sleep nodename for rk3399.dtsi + +From: Johan Jonker + +[ Upstream commit a7ecfad495f8af63a5cb332c91f60ab2018897f5 ] + +A test with the command below aimed at powerpc generates +notifications in the Rockchip arm64 tree. + +Fix pinctrl "sleep" nodename by renaming it to "suspend" +for rk3399.dtsi + +make ARCH=arm64 dtbs_check +DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml + +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210126110221.10815-2-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +index 9d6ed8cda2c8..750dad0d1740 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +@@ -2317,7 +2317,7 @@ + }; + }; + +- sleep { ++ suspend { + ap_pwroff: ap-pwroff { + rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>; + }; +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch b/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch new file mode 100644 index 00000000000..2f81385a65c --- /dev/null +++ b/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch @@ -0,0 +1,97 @@ +From 75c9882b25d73704538f811b1d46e14916b0c332 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:42 +0200 +Subject: arm64: dts: rockchip: Fix power-controller node names for px30 + +From: Elaine Zhang + +[ Upstream commit d5de0d688ac6e0202674577b05d0726b8a6af401 ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/px30.dtsi | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi +index 98b014a8f916..f297601c9f71 100644 +--- a/arch/arm64/boot/dts/rockchip/px30.dtsi ++++ b/arch/arm64/boot/dts/rockchip/px30.dtsi +@@ -213,20 +213,20 @@ + #size-cells = <0>; + + /* These power domains are grouped by VD_LOGIC */ +- pd_usb@PX30_PD_USB { ++ power-domain@PX30_PD_USB { + reg = ; + clocks = <&cru HCLK_HOST>, + <&cru HCLK_OTG>, + <&cru SCLK_OTG_ADP>; + pm_qos = <&qos_usb_host>, <&qos_usb_otg>; + }; +- pd_sdcard@PX30_PD_SDCARD { ++ power-domain@PX30_PD_SDCARD { + reg = ; + clocks = <&cru HCLK_SDMMC>, + <&cru SCLK_SDMMC>; + pm_qos = <&qos_sdmmc>; + }; +- pd_gmac@PX30_PD_GMAC { ++ power-domain@PX30_PD_GMAC { + reg = ; + clocks = <&cru ACLK_GMAC>, + <&cru PCLK_GMAC>, +@@ -234,7 +234,7 @@ + <&cru SCLK_GMAC_RX_TX>; + pm_qos = <&qos_gmac>; + }; +- pd_mmc_nand@PX30_PD_MMC_NAND { ++ power-domain@PX30_PD_MMC_NAND { + reg = ; + clocks = <&cru HCLK_NANDC>, + <&cru HCLK_EMMC>, +@@ -247,14 +247,14 @@ + pm_qos = <&qos_emmc>, <&qos_nand>, + <&qos_sdio>, <&qos_sfc>; + }; +- pd_vpu@PX30_PD_VPU { ++ power-domain@PX30_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, + <&cru HCLK_VPU>, + <&cru SCLK_CORE_VPU>; + pm_qos = <&qos_vpu>, <&qos_vpu_r128>; + }; +- pd_vo@PX30_PD_VO { ++ power-domain@PX30_PD_VO { + reg = ; + clocks = <&cru ACLK_RGA>, + <&cru ACLK_VOPB>, +@@ -270,7 +270,7 @@ + pm_qos = <&qos_rga_rd>, <&qos_rga_wr>, + <&qos_vop_m0>, <&qos_vop_m1>; + }; +- pd_vi@PX30_PD_VI { ++ power-domain@PX30_PD_VI { + reg = ; + clocks = <&cru ACLK_CIF>, + <&cru ACLK_ISP>, +@@ -281,7 +281,7 @@ + <&qos_isp_wr>, <&qos_isp_m1>, + <&qos_vip>; + }; +- pd_gpu@PX30_PD_GPU { ++ power-domain@PX30_PD_GPU { + reg = ; + clocks = <&cru SCLK_GPU>; + pm_qos = <&qos_gpu>; +-- +2.30.2 + diff --git a/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-12892 b/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-12892 new file mode 100644 index 00000000000..c732ad0393c --- /dev/null +++ b/queue-5.4/arm64-dts-rockchip-fix-power-controller-node-names-f.patch-12892 @@ -0,0 +1,46 @@ +From a3f1d296585e669948b35dece9f78387e60379d6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 17 Apr 2021 13:29:43 +0200 +Subject: arm64: dts: rockchip: Fix power-controller node names for rk3328 + +From: Elaine Zhang + +[ Upstream commit 6e6a282b49c6db408d27231e3c709fbdf25e3c1b ] + +Use more generic names (as recommended in the device tree specification +or the binding documentation) + +Signed-off-by: Elaine Zhang +Reviewed-by: Enric Balletbo i Serra +Signed-off-by: Johan Jonker +Link: https://lore.kernel.org/r/20210417112952.8516-7-jbx6244@gmail.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index e0ed323935a4..44ad744c4710 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -270,13 +270,13 @@ + #address-cells = <1>; + #size-cells = <0>; + +- pd_hevc@RK3328_PD_HEVC { ++ power-domain@RK3328_PD_HEVC { + reg = ; + }; +- pd_video@RK3328_PD_VIDEO { ++ power-domain@RK3328_PD_VIDEO { + reg = ; + }; +- pd_vpu@RK3328_PD_VPU { ++ power-domain@RK3328_PD_VPU { + reg = ; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + }; +-- +2.30.2 + diff --git a/queue-5.4/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch b/queue-5.4/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch new file mode 100644 index 00000000000..77ce51e27aa --- /dev/null +++ b/queue-5.4/cifs-prevent-null-deref-in-cifs_compose_mount_option.patch @@ -0,0 +1,37 @@ +From 11184dd129c93ab884d5e15dfb3afbcd2eca223d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Jul 2021 11:50:54 -0300 +Subject: cifs: prevent NULL deref in cifs_compose_mount_options() + +From: Paulo Alcantara + +[ Upstream commit 03313d1c3a2f086bb60920607ab79ac8f8578306 ] + +The optional @ref parameter might contain an NULL node_name, so +prevent dereferencing it in cifs_compose_mount_options(). + +Addresses-Coverity: 1476408 ("Explicit null dereferenced") +Signed-off-by: Paulo Alcantara (SUSE) +Signed-off-by: Steve French +Signed-off-by: Sasha Levin +--- + fs/cifs/cifs_dfs_ref.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c +index cc3ada12848d..42125601ebb1 100644 +--- a/fs/cifs/cifs_dfs_ref.c ++++ b/fs/cifs/cifs_dfs_ref.c +@@ -151,6 +151,9 @@ char *cifs_compose_mount_options(const char *sb_mountdata, + return ERR_PTR(-EINVAL); + + if (ref) { ++ if (WARN_ON_ONCE(!ref->node_name || ref->path_consumed < 0)) ++ return ERR_PTR(-EINVAL); ++ + if (strlen(fullpath) - ref->path_consumed) { + prepath = fullpath + ref->path_consumed; + /* skip initial delimiter */ +-- +2.30.2 + diff --git a/queue-5.4/firmware-tegra-bpmp-fix-tegra234-only-builds.patch b/queue-5.4/firmware-tegra-bpmp-fix-tegra234-only-builds.patch new file mode 100644 index 00000000000..b105a2fe8f1 --- /dev/null +++ b/queue-5.4/firmware-tegra-bpmp-fix-tegra234-only-builds.patch @@ -0,0 +1,63 @@ +From 7178ccb143410548537092d40dfd9ded02a8d9d0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 14:23:35 +0200 +Subject: firmware: tegra: bpmp: Fix Tegra234-only builds + +From: Thierry Reding + +[ Upstream commit bd778b893963d67d7eb01f49d84ffcd3eaf229dd ] + +The tegra186_bpmp_ops symbol is used on Tegra234, so make sure it's +available. + +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + drivers/firmware/tegra/Makefile | 1 + + drivers/firmware/tegra/bpmp-private.h | 3 ++- + drivers/firmware/tegra/bpmp.c | 3 ++- + 3 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/firmware/tegra/Makefile b/drivers/firmware/tegra/Makefile +index 49c87e00fafb..620cf3fdd607 100644 +--- a/drivers/firmware/tegra/Makefile ++++ b/drivers/firmware/tegra/Makefile +@@ -3,6 +3,7 @@ tegra-bpmp-y = bpmp.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_210_SOC) += bpmp-tegra210.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_186_SOC) += bpmp-tegra186.o + tegra-bpmp-$(CONFIG_ARCH_TEGRA_194_SOC) += bpmp-tegra186.o ++tegra-bpmp-$(CONFIG_ARCH_TEGRA_234_SOC) += bpmp-tegra186.o + tegra-bpmp-$(CONFIG_DEBUG_FS) += bpmp-debugfs.o + obj-$(CONFIG_TEGRA_BPMP) += tegra-bpmp.o + obj-$(CONFIG_TEGRA_IVC) += ivc.o +diff --git a/drivers/firmware/tegra/bpmp-private.h b/drivers/firmware/tegra/bpmp-private.h +index 54d560c48398..182bfe396516 100644 +--- a/drivers/firmware/tegra/bpmp-private.h ++++ b/drivers/firmware/tegra/bpmp-private.h +@@ -24,7 +24,8 @@ struct tegra_bpmp_ops { + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ +- IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) ++ IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) + extern const struct tegra_bpmp_ops tegra186_bpmp_ops; + #endif + #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) +diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c +index 19c56133234b..afde06b31387 100644 +--- a/drivers/firmware/tegra/bpmp.c ++++ b/drivers/firmware/tegra/bpmp.c +@@ -808,7 +808,8 @@ static const struct dev_pm_ops tegra_bpmp_pm_ops = { + }; + + #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ +- IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) ++ IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) + static const struct tegra_bpmp_soc tegra186_soc = { + .channels = { + .cpu_tx = { +-- +2.30.2 + diff --git a/queue-5.4/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch b/queue-5.4/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch new file mode 100644 index 00000000000..baebb294544 --- /dev/null +++ b/queue-5.4/kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch @@ -0,0 +1,69 @@ +From 5dddc78e99a94c14a7c918ba7b8cf166b27aadcc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 12 Jun 2021 15:18:38 +0100 +Subject: kbuild: mkcompile_h: consider timestamp if KBUILD_BUILD_TIMESTAMP is + set + +From: Matthias Maennich + +[ Upstream commit a979522a1a88556e42a22ce61bccc58e304cb361 ] + +To avoid unnecessary recompilations, mkcompile_h does not regenerate +compile.h if just the timestamp changed. +Though, if KBUILD_BUILD_TIMESTAMP is set, an explicit timestamp for the +build was requested, in which case we should not ignore it. + +If a user follows the documentation for reproducible builds [1] and +defines KBUILD_BUILD_TIMESTAMP as the git commit timestamp, a clean +build will have the correct timestamp. A subsequent cherry-pick (or +amend) changes the commit timestamp and if an incremental build is done +with a different KBUILD_BUILD_TIMESTAMP now, that new value is not taken +into consideration. But it should for reproducibility. + +Hence, whenever KBUILD_BUILD_TIMESTAMP is explicitly set, do not ignore +UTS_VERSION when making a decision about whether the regenerated version +of compile.h should be moved into place. + +[1] https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html + +Signed-off-by: Matthias Maennich +Signed-off-by: Masahiro Yamada +Signed-off-by: Sasha Levin +--- + scripts/mkcompile_h | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h +index d1d757c6edf4..06c1e9e3bc38 100755 +--- a/scripts/mkcompile_h ++++ b/scripts/mkcompile_h +@@ -80,15 +80,23 @@ UTS_TRUNCATE="cut -b -$UTS_LEN" + # Only replace the real compile.h if the new one is different, + # in order to preserve the timestamp and avoid unnecessary + # recompilations. +-# We don't consider the file changed if only the date/time changed. ++# We don't consider the file changed if only the date/time changed, ++# unless KBUILD_BUILD_TIMESTAMP was explicitly set (e.g. for ++# reproducible builds with that value referring to a commit timestamp). + # A kernel config change will increase the generation number, thus + # causing compile.h to be updated (including date/time) due to the + # changed comment in the + # first line. + ++if [ -z "$KBUILD_BUILD_TIMESTAMP" ]; then ++ IGNORE_PATTERN="UTS_VERSION" ++else ++ IGNORE_PATTERN="NOT_A_PATTERN_TO_BE_MATCHED" ++fi ++ + if [ -r $TARGET ] && \ +- grep -v 'UTS_VERSION' $TARGET > .tmpver.1 && \ +- grep -v 'UTS_VERSION' .tmpcompile > .tmpver.2 && \ ++ grep -v $IGNORE_PATTERN $TARGET > .tmpver.1 && \ ++ grep -v $IGNORE_PATTERN .tmpcompile > .tmpver.2 && \ + cmp -s .tmpver.1 .tmpver.2; then + rm -f .tmpcompile + else +-- +2.30.2 + diff --git a/queue-5.4/kbuild-sink-stdout-from-cmd-for-silent-build.patch b/queue-5.4/kbuild-sink-stdout-from-cmd-for-silent-build.patch new file mode 100644 index 00000000000..52f9baa6e6e --- /dev/null +++ b/queue-5.4/kbuild-sink-stdout-from-cmd-for-silent-build.patch @@ -0,0 +1,99 @@ +From f268cf5e0faf747dd7dcdb32ca3c2e45b404b09e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 May 2021 16:03:13 +0900 +Subject: kbuild: sink stdout from cmd for silent build + +From: Masahiro Yamada + +[ Upstream commit 174a1dcc96429efce4ef7eb2f5c4506480da2182 ] + +When building with 'make -s', no output to stdout should be printed. + +As Arnd Bergmann reported [1], mkimage shows the detailed information +of the generated images. + +I think this should be suppressed by the 'cmd' macro instead of by +individual scripts. + +Insert 'exec >/dev/null;' in order to redirect stdout to /dev/null for +silent builds. + +[Note about this implementation] + +'exec >/dev/null;' may look somewhat tricky, but this has a reason. + +Appending '>/dev/null' at the end of command line is a common way for +redirection, so I first tried this: + + cmd = @set -e; $(echo-cmd) $(cmd_$(1)) >/dev/null + +... but it would not work if $(cmd_$(1)) itself contains a redirection. + +For example, cmd_wrap in scripts/Makefile.asm-generic redirects the +output from the 'echo' command into the target file. + +It would be expanded into: + + echo "#include " > $@ >/dev/null + +Then, the target file gets empty because the string will go to /dev/null +instead of $@. + +Next, I tried this: + + cmd = @set -e; $(echo-cmd) { $(cmd_$(1)); } >/dev/null + +The form above would be expanded into: + + { echo "#include " > $@; } >/dev/null + +This works as expected. However, it would be a syntax error if +$(cmd_$(1)) is empty. + +When CONFIG_TRIM_UNUSED_KSYMS is disabled, $(call cmd,gen_ksymdeps) in +scripts/Makefile.build would be expanded into: + + set -e; { ; } >/dev/null + +..., which causes an syntax error. + +I also tried this: + + cmd = @set -e; $(echo-cmd) ( $(cmd_$(1)) ) >/dev/null + +... but this causes a syntax error for the same reason. + +So, finally I adopted: + + cmd = @set -e; $(echo-cmd) exec >/dev/null; $(cmd_$(1)) + +[1]: https://lore.kernel.org/lkml/20210514135752.2910387-1-arnd@kernel.org/ + +Signed-off-by: Masahiro Yamada +Signed-off-by: Sasha Levin +--- + scripts/Kbuild.include | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include +index 7da10afc92c6..b14a7d4a2f05 100644 +--- a/scripts/Kbuild.include ++++ b/scripts/Kbuild.include +@@ -182,8 +182,13 @@ clean := -f $(srctree)/scripts/Makefile.clean obj + echo-cmd = $(if $($(quiet)cmd_$(1)),\ + echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';) + ++# sink stdout for 'make -s' ++ redirect := ++ quiet_redirect := ++silent_redirect := exec >/dev/null; ++ + # printing commands +-cmd = @set -e; $(echo-cmd) $(cmd_$(1)) ++cmd = @set -e; $(echo-cmd) $($(quiet)redirect) $(cmd_$(1)) + + ### + # if_changed - execute command if any prerequisite is newer than +-- +2.30.2 + diff --git a/queue-5.4/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch b/queue-5.4/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch new file mode 100644 index 00000000000..08e39324278 --- /dev/null +++ b/queue-5.4/reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch @@ -0,0 +1,43 @@ +From d2b0c3ecbe6a70e33904226b2464c507a5b8b2ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 Mar 2021 17:01:39 +0100 +Subject: reset: ti-syscon: fix to_ti_syscon_reset_data macro + +From: Philipp Zabel + +[ Upstream commit 05cf8fffcdeb47aef1203c08cbec5224fd3a0e1c ] + +The to_ti_syscon_reset_data macro currently only works if the +parameter passed into it is called 'rcdev'. + +Fixes a checkpatch --strict issue: + + CHECK: Macro argument reuse 'rcdev' - possible side-effects? + #53: FILE: drivers/reset/reset-ti-syscon.c:53: + +#define to_ti_syscon_reset_data(rcdev) \ + + container_of(rcdev, struct ti_syscon_reset_data, rcdev) + +Signed-off-by: Philipp Zabel +Signed-off-by: Sasha Levin +--- + drivers/reset/reset-ti-syscon.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c +index a2635c21db7f..ecb8873e3a19 100644 +--- a/drivers/reset/reset-ti-syscon.c ++++ b/drivers/reset/reset-ti-syscon.c +@@ -58,8 +58,8 @@ struct ti_syscon_reset_data { + unsigned int nr_controls; + }; + +-#define to_ti_syscon_reset_data(rcdev) \ +- container_of(rcdev, struct ti_syscon_reset_data, rcdev) ++#define to_ti_syscon_reset_data(_rcdev) \ ++ container_of(_rcdev, struct ti_syscon_reset_data, rcdev) + + /** + * ti_syscon_reset_assert() - assert device reset +-- +2.30.2 + diff --git a/queue-5.4/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch b/queue-5.4/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch new file mode 100644 index 00000000000..639a8b41933 --- /dev/null +++ b/queue-5.4/rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch @@ -0,0 +1,49 @@ +From 0f5594de421b1b6abf9b16434eea65fd6f08ab13 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 May 2021 13:20:34 -0400 +Subject: rtc: max77686: Do not enforce (incorrect) interrupt trigger type + +From: Krzysztof Kozlowski + +[ Upstream commit 742b0d7e15c333303daad4856de0764f4bc83601 ] + +Interrupt line can be configured on different hardware in different way, +even inverted. Therefore driver should not enforce specific trigger +type - edge falling - but instead rely on Devicetree to configure it. + +The Maxim 77686 datasheet describes the interrupt line as active low +with a requirement of acknowledge from the CPU therefore the edge +falling is not correct. + +The interrupt line is shared between PMIC and RTC driver, so using level +sensitive interrupt is here especially important to avoid races. With +an edge configuration in case if first PMIC signals interrupt followed +shortly after by the RTC, the interrupt might not be yet cleared/acked +thus the second one would not be noticed. + +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Alexandre Belloni +Link: https://lore.kernel.org/r/20210526172036.183223-6-krzysztof.kozlowski@canonical.com +Signed-off-by: Sasha Levin +--- + drivers/rtc/rtc-max77686.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/rtc/rtc-max77686.c b/drivers/rtc/rtc-max77686.c +index d5a0e27dd0a0..9e27f5a01197 100644 +--- a/drivers/rtc/rtc-max77686.c ++++ b/drivers/rtc/rtc-max77686.c +@@ -707,8 +707,8 @@ static int max77686_init_rtc_regmap(struct max77686_rtc_info *info) + + add_rtc_irq: + ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, +- IRQF_TRIGGER_FALLING | IRQF_ONESHOT | +- IRQF_SHARED, 0, info->drv_data->rtc_irq_chip, ++ IRQF_ONESHOT | IRQF_SHARED, ++ 0, info->drv_data->rtc_irq_chip, + &info->rtc_irq_data); + if (ret < 0) { + dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret); +-- +2.30.2 + diff --git a/queue-5.4/rtc-mxc_v2-add-missing-module_device_table.patch b/queue-5.4/rtc-mxc_v2-add-missing-module_device_table.patch new file mode 100644 index 00000000000..61df4e8c2d7 --- /dev/null +++ b/queue-5.4/rtc-mxc_v2-add-missing-module_device_table.patch @@ -0,0 +1,37 @@ +From 10359dffca3c737346ebb160fa0b6bf39ef63be0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 8 May 2021 11:15:09 +0800 +Subject: rtc: mxc_v2: add missing MODULE_DEVICE_TABLE + +From: Bixuan Cui + +[ Upstream commit 206e04ec7539e7bfdde9aa79a7cde656c9eb308e ] + +This patch adds missing MODULE_DEVICE_TABLE definition which generates +correct modalias for automatic loading of this driver when it is built +as an external module. + +Reported-by: Hulk Robot +Signed-off-by: Bixuan Cui +Signed-off-by: Alexandre Belloni +Link: https://lore.kernel.org/r/20210508031509.53735-1-cuibixuan@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/rtc/rtc-mxc_v2.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/rtc/rtc-mxc_v2.c b/drivers/rtc/rtc-mxc_v2.c +index 91534560fe2a..d349cef09cb7 100644 +--- a/drivers/rtc/rtc-mxc_v2.c ++++ b/drivers/rtc/rtc-mxc_v2.c +@@ -373,6 +373,7 @@ static const struct of_device_id mxc_ids[] = { + { .compatible = "fsl,imx53-rtc", }, + {} + }; ++MODULE_DEVICE_TABLE(of, mxc_ids); + + static struct platform_driver mxc_rtc_driver = { + .driver = { +-- +2.30.2 + diff --git a/queue-5.4/s390-introduce-proper-type-handling-call_on_stack-ma.patch b/queue-5.4/s390-introduce-proper-type-handling-call_on_stack-ma.patch new file mode 100644 index 00000000000..93bea309696 --- /dev/null +++ b/queue-5.4/s390-introduce-proper-type-handling-call_on_stack-ma.patch @@ -0,0 +1,146 @@ +From 0d675758f1a6c5bbfd957289ab631645bdc418e1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 5 Jul 2021 20:16:10 +0200 +Subject: s390: introduce proper type handling call_on_stack() macro + +From: Heiko Carstens + +[ Upstream commit 41d71fe59cce41237f24f3b7bdc1b414069a34ed ] + +The existing CALL_ON_STACK() macro allows for subtle bugs: + +- There is no type checking of the function that is being called. That + is: missing or too many arguments do not cause any compile error or + warning. The same is true if the return type of the called function + changes. This can lead to quite random bugs. + +- Sign and zero extension of arguments is missing. Given that the s390 + C ABI requires that the caller of a function performs proper sign + and zero extension this can also lead to subtle bugs. + +- If arguments to the CALL_ON_STACK() macros contain functions calls + register corruption can happen due to register asm constructs being + used. + +Therefore introduce a new call_on_stack() macro which is supposed to +fix all these problems. + +Reviewed-by: Sven Schnelle +Signed-off-by: Heiko Carstens +Signed-off-by: Vasily Gorbik +Signed-off-by: Sasha Levin +--- + arch/s390/include/asm/stacktrace.h | 97 ++++++++++++++++++++++++++++++ + 1 file changed, 97 insertions(+) + +diff --git a/arch/s390/include/asm/stacktrace.h b/arch/s390/include/asm/stacktrace.h +index 6836532f8d1a..e192681f83e1 100644 +--- a/arch/s390/include/asm/stacktrace.h ++++ b/arch/s390/include/asm/stacktrace.h +@@ -115,6 +115,103 @@ struct stack_frame { + r2; \ + }) + ++#define CALL_LARGS_0(...) \ ++ long dummy = 0 ++#define CALL_LARGS_1(t1, a1) \ ++ long arg1 = (long)(t1)(a1) ++#define CALL_LARGS_2(t1, a1, t2, a2) \ ++ CALL_LARGS_1(t1, a1); \ ++ long arg2 = (long)(t2)(a2) ++#define CALL_LARGS_3(t1, a1, t2, a2, t3, a3) \ ++ CALL_LARGS_2(t1, a1, t2, a2); \ ++ long arg3 = (long)(t3)(a3) ++#define CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4) \ ++ CALL_LARGS_3(t1, a1, t2, a2, t3, a3); \ ++ long arg4 = (long)(t4)(a4) ++#define CALL_LARGS_5(t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \ ++ CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4); \ ++ long arg5 = (long)(t5)(a5) ++ ++#define CALL_REGS_0 \ ++ register long r2 asm("2") = dummy ++#define CALL_REGS_1 \ ++ register long r2 asm("2") = arg1 ++#define CALL_REGS_2 \ ++ CALL_REGS_1; \ ++ register long r3 asm("3") = arg2 ++#define CALL_REGS_3 \ ++ CALL_REGS_2; \ ++ register long r4 asm("4") = arg3 ++#define CALL_REGS_4 \ ++ CALL_REGS_3; \ ++ register long r5 asm("5") = arg4 ++#define CALL_REGS_5 \ ++ CALL_REGS_4; \ ++ register long r6 asm("6") = arg5 ++ ++#define CALL_TYPECHECK_0(...) ++#define CALL_TYPECHECK_1(t, a, ...) \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_2(t, a, ...) \ ++ CALL_TYPECHECK_1(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_3(t, a, ...) \ ++ CALL_TYPECHECK_2(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_4(t, a, ...) \ ++ CALL_TYPECHECK_3(__VA_ARGS__); \ ++ typecheck(t, a) ++#define CALL_TYPECHECK_5(t, a, ...) \ ++ CALL_TYPECHECK_4(__VA_ARGS__); \ ++ typecheck(t, a) ++ ++#define CALL_PARM_0(...) void ++#define CALL_PARM_1(t, a, ...) t ++#define CALL_PARM_2(t, a, ...) t, CALL_PARM_1(__VA_ARGS__) ++#define CALL_PARM_3(t, a, ...) t, CALL_PARM_2(__VA_ARGS__) ++#define CALL_PARM_4(t, a, ...) t, CALL_PARM_3(__VA_ARGS__) ++#define CALL_PARM_5(t, a, ...) t, CALL_PARM_4(__VA_ARGS__) ++#define CALL_PARM_6(t, a, ...) t, CALL_PARM_5(__VA_ARGS__) ++ ++/* ++ * Use call_on_stack() to call a function switching to a specified ++ * stack. Proper sign and zero extension of function arguments is ++ * done. Usage: ++ * ++ * rc = call_on_stack(nr, stack, rettype, fn, t1, a1, t2, a2, ...) ++ * ++ * - nr specifies the number of function arguments of fn. ++ * - stack specifies the stack to be used. ++ * - fn is the function to be called. ++ * - rettype is the return type of fn. ++ * - t1, a1, ... are pairs, where t1 must match the type of the first ++ * argument of fn, t2 the second, etc. a1 is the corresponding ++ * first function argument (not name), etc. ++ */ ++#define call_on_stack(nr, stack, rettype, fn, ...) \ ++({ \ ++ rettype (*__fn)(CALL_PARM_##nr(__VA_ARGS__)) = fn; \ ++ unsigned long frame = current_frame_address(); \ ++ unsigned long __stack = stack; \ ++ unsigned long prev; \ ++ CALL_LARGS_##nr(__VA_ARGS__); \ ++ CALL_REGS_##nr; \ ++ \ ++ CALL_TYPECHECK_##nr(__VA_ARGS__); \ ++ asm volatile( \ ++ " lgr %[_prev],15\n" \ ++ " lg 15,%[_stack]\n" \ ++ " stg %[_frame],%[_bc](15)\n" \ ++ " brasl 14,%[_fn]\n" \ ++ " lgr 15,%[_prev]\n" \ ++ : [_prev] "=&d" (prev), CALL_FMT_##nr \ ++ : [_stack] "R" (__stack), \ ++ [_bc] "i" (offsetof(struct stack_frame, back_chain)), \ ++ [_frame] "d" (frame), \ ++ [_fn] "X" (__fn) : CALL_CLOBBER_##nr); \ ++ (rettype)r2; \ ++}) ++ + #define CALL_ON_STACK_NORETURN(fn, stack) \ + ({ \ + asm volatile( \ +-- +2.30.2 + diff --git a/queue-5.4/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch b/queue-5.4/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch new file mode 100644 index 00000000000..81a5baf0190 --- /dev/null +++ b/queue-5.4/sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch @@ -0,0 +1,53 @@ +From a54391ac57c8942054c73cf8380ec981f0c5726f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 29 Jun 2021 14:14:52 +0200 +Subject: sched/fair: Fix CFS bandwidth hrtimer expiry type + +From: Odin Ugedal + +[ Upstream commit 72d0ad7cb5bad265adb2014dbe46c4ccb11afaba ] + +The time remaining until expiry of the refresh_timer can be negative. +Casting the type to an unsigned 64-bit value will cause integer +underflow, making the runtime_refresh_within return false instead of +true. These situations are rare, but they do happen. + +This does not cause user-facing issues or errors; other than +possibly unthrottling cfs_rq's using runtime from the previous period(s), +making the CFS bandwidth enforcement less strict in those (special) +situations. + +Signed-off-by: Odin Ugedal +Signed-off-by: Peter Zijlstra (Intel) +Reviewed-by: Ben Segall +Link: https://lore.kernel.org/r/20210629121452.18429-1-odin@uged.al +Signed-off-by: Sasha Levin +--- + kernel/sched/fair.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c +index d2ba080ea742..74cb20f32f72 100644 +--- a/kernel/sched/fair.c ++++ b/kernel/sched/fair.c +@@ -4786,7 +4786,7 @@ static const u64 cfs_bandwidth_slack_period = 5 * NSEC_PER_MSEC; + static int runtime_refresh_within(struct cfs_bandwidth *cfs_b, u64 min_expire) + { + struct hrtimer *refresh_timer = &cfs_b->period_timer; +- u64 remaining; ++ s64 remaining; + + /* if the call-back is running a quota refresh is already occurring */ + if (hrtimer_callback_running(refresh_timer)) +@@ -4794,7 +4794,7 @@ static int runtime_refresh_within(struct cfs_bandwidth *cfs_b, u64 min_expire) + + /* is a quota refresh about to occur? */ + remaining = ktime_to_ns(hrtimer_expires_remaining(refresh_timer)); +- if (remaining < min_expire) ++ if (remaining < (s64)min_expire) + return 1; + + return 0; +-- +2.30.2 + diff --git a/queue-5.4/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch b/queue-5.4/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch new file mode 100644 index 00000000000..47be2128c4f --- /dev/null +++ b/queue-5.4/scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch @@ -0,0 +1,46 @@ +From 6fdc73e35a6d661a0e49257fd9ab1d1e334274e9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 21 Jun 2021 16:17:27 +0100 +Subject: scsi: aic7xxx: Fix unintentional sign extension issue on left shift + of u8 + +From: Colin Ian King + +[ Upstream commit 332a9dd1d86f1e7203fc7f0fd7e82f0b304200fe ] + +The shifting of the u8 integer returned fom ahc_inb(ahc, port+3) by 24 bits +to the left will be promoted to a 32 bit signed int and then sign-extended +to a u64. In the event that the top bit of the u8 is set then all then all +the upper 32 bits of the u64 end up as also being set because of the +sign-extension. Fix this by casting the u8 values to a u64 before the 24 +bit left shift. + +[ This dates back to 2002, I found the offending commit from the git +history git://git.kernel.org/pub/scm/linux/kernel/git/tglx/history.git, +commit f58eb66c0b0a ("Update aic7xxx driver to 6.2.10...") ] + +Link: https://lore.kernel.org/r/20210621151727.20667-1-colin.king@canonical.com +Signed-off-by: Colin Ian King +Signed-off-by: Martin K. Petersen +Addresses-Coverity: ("Unintended sign extension") +Signed-off-by: Sasha Levin +--- + drivers/scsi/aic7xxx/aic7xxx_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/scsi/aic7xxx/aic7xxx_core.c b/drivers/scsi/aic7xxx/aic7xxx_core.c +index 4190a025381a..27d85ed82977 100644 +--- a/drivers/scsi/aic7xxx/aic7xxx_core.c ++++ b/drivers/scsi/aic7xxx/aic7xxx_core.c +@@ -493,7 +493,7 @@ ahc_inq(struct ahc_softc *ahc, u_int port) + return ((ahc_inb(ahc, port)) + | (ahc_inb(ahc, port+1) << 8) + | (ahc_inb(ahc, port+2) << 16) +- | (ahc_inb(ahc, port+3) << 24) ++ | (((uint64_t)ahc_inb(ahc, port+3)) << 24) + | (((uint64_t)ahc_inb(ahc, port+4)) << 32) + | (((uint64_t)ahc_inb(ahc, port+5)) << 40) + | (((uint64_t)ahc_inb(ahc, port+6)) << 48) +-- +2.30.2 + diff --git a/queue-5.4/scsi-libfc-fix-array-index-out-of-bound-exception.patch b/queue-5.4/scsi-libfc-fix-array-index-out-of-bound-exception.patch new file mode 100644 index 00000000000..4708130cc5b --- /dev/null +++ b/queue-5.4/scsi-libfc-fix-array-index-out-of-bound-exception.patch @@ -0,0 +1,53 @@ +From 6157c86b6d2c7322778f68d84d8769590dc9060c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 15 Jun 2021 09:59:39 -0700 +Subject: scsi: libfc: Fix array index out of bound exception + +From: Javed Hasan + +[ Upstream commit b27c4577557045f1ab3cdfeabfc7f3cd24aca1fe ] + +Fix array index out of bound exception in fc_rport_prli_resp(). + +Link: https://lore.kernel.org/r/20210615165939.24327-1-jhasan@marvell.com +Signed-off-by: Javed Hasan +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/libfc/fc_rport.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c +index 64500417c22e..326bd609a3d1 100644 +--- a/drivers/scsi/libfc/fc_rport.c ++++ b/drivers/scsi/libfc/fc_rport.c +@@ -1160,6 +1160,7 @@ static void fc_rport_prli_resp(struct fc_seq *sp, struct fc_frame *fp, + resp_code = (pp->spp.spp_flags & FC_SPP_RESP_MASK); + FC_RPORT_DBG(rdata, "PRLI spp_flags = 0x%x spp_type 0x%x\n", + pp->spp.spp_flags, pp->spp.spp_type); ++ + rdata->spp_type = pp->spp.spp_type; + if (resp_code != FC_SPP_RESP_ACK) { + if (resp_code == FC_SPP_RESP_CONF) +@@ -1182,11 +1183,13 @@ static void fc_rport_prli_resp(struct fc_seq *sp, struct fc_frame *fp, + /* + * Call prli provider if we should act as a target + */ +- prov = fc_passive_prov[rdata->spp_type]; +- if (prov) { +- memset(&temp_spp, 0, sizeof(temp_spp)); +- prov->prli(rdata, pp->prli.prli_spp_len, +- &pp->spp, &temp_spp); ++ if (rdata->spp_type < FC_FC4_PROV_SIZE) { ++ prov = fc_passive_prov[rdata->spp_type]; ++ if (prov) { ++ memset(&temp_spp, 0, sizeof(temp_spp)); ++ prov->prli(rdata, pp->prli.prli_spp_len, ++ &pp->spp, &temp_spp); ++ } + } + /* + * Check if the image pair could be established +-- +2.30.2 + diff --git a/queue-5.4/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch b/queue-5.4/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch new file mode 100644 index 00000000000..5f1a4280097 --- /dev/null +++ b/queue-5.4/scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch @@ -0,0 +1,165 @@ +From 001f7f88d0e4619bc54697f9bf6d0266e7abfe97 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 22 Jun 2021 11:40:37 +0800 +Subject: scsi: libsas: Add LUN number check in .slave_alloc callback + +From: Yufen Yu + +[ Upstream commit 49da96d77938db21864dae6b7736b71e96c1d203 ] + +Offlining a SATA device connected to a hisi SAS controller and then +scanning the host will result in detecting 255 non-existent devices: + + # lsscsi + [2:0:0:0] disk ATA Samsung SSD 860 2B6Q /dev/sda + [2:0:1:0] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdb + [2:0:2:0] disk SEAGATE ST600MM0006 B001 /dev/sdc + # echo "offline" > /sys/block/sdb/device/state + # echo "- - -" > /sys/class/scsi_host/host2/scan + # lsscsi + [2:0:0:0] disk ATA Samsung SSD 860 2B6Q /dev/sda + [2:0:1:0] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdb + [2:0:1:1] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdh + ... + [2:0:1:255] disk ATA WDC WD2003FYYS-3 1D01 /dev/sdjb + +After a REPORT LUN command issued to the offline device fails, the SCSI +midlayer tries to do a sequential scan of all devices whose LUN number is +not 0. However, SATA does not support LUN numbers at all. + +Introduce a generic sas_slave_alloc() handler which will return -ENXIO for +SATA devices if the requested LUN number is larger than 0 and make libsas +drivers use this function as their .slave_alloc callback. + +Link: https://lore.kernel.org/r/20210622034037.1467088-1-yuyufen@huawei.com +Reported-by: Wu Bo +Suggested-by: John Garry +Reviewed-by: John Garry +Reviewed-by: Jason Yan +Signed-off-by: Yufen Yu +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/aic94xx/aic94xx_init.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 1 + + drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 1 + + drivers/scsi/isci/init.c | 1 + + drivers/scsi/libsas/sas_scsi_host.c | 9 +++++++++ + drivers/scsi/mvsas/mv_init.c | 1 + + drivers/scsi/pm8001/pm8001_init.c | 1 + + 8 files changed, 16 insertions(+) + +diff --git a/drivers/scsi/aic94xx/aic94xx_init.c b/drivers/scsi/aic94xx/aic94xx_init.c +index f5781e31f57c..b68dfeb952ee 100644 +--- a/drivers/scsi/aic94xx/aic94xx_init.c ++++ b/drivers/scsi/aic94xx/aic94xx_init.c +@@ -52,6 +52,7 @@ static struct scsi_host_template aic94xx_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .track_queue_depth = 1, +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +index 9f6534bd354b..1443c803d8f7 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +@@ -1768,6 +1768,7 @@ static struct scsi_host_template sht_v1_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = host_attrs_v1_hw, +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +index 8e96a257e439..11c75881bd89 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +@@ -3542,6 +3542,7 @@ static struct scsi_host_template sht_v2_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = host_attrs_v2_hw, +diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +index 916447f3c607..13f314fa757e 100644 +--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c ++++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +@@ -3064,6 +3064,7 @@ static struct scsi_host_template sht_v3_hw = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = host_attrs_v3_hw, +diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c +index 1727d0c71b12..c33bcf85fb21 100644 +--- a/drivers/scsi/isci/init.c ++++ b/drivers/scsi/isci/init.c +@@ -166,6 +166,7 @@ static struct scsi_host_template isci_sht = { + .eh_abort_handler = sas_eh_abort_handler, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = isci_host_attrs, +diff --git a/drivers/scsi/libsas/sas_scsi_host.c b/drivers/scsi/libsas/sas_scsi_host.c +index bec83eb8ab87..081f3145fe14 100644 +--- a/drivers/scsi/libsas/sas_scsi_host.c ++++ b/drivers/scsi/libsas/sas_scsi_host.c +@@ -911,6 +911,14 @@ void sas_task_abort(struct sas_task *task) + blk_abort_request(sc->request); + } + ++int sas_slave_alloc(struct scsi_device *sdev) ++{ ++ if (dev_is_sata(sdev_to_domain_dev(sdev)) && sdev->lun) ++ return -ENXIO; ++ ++ return 0; ++} ++ + void sas_target_destroy(struct scsi_target *starget) + { + struct domain_device *found_dev = starget->hostdata; +@@ -957,5 +965,6 @@ EXPORT_SYMBOL_GPL(sas_task_abort); + EXPORT_SYMBOL_GPL(sas_phy_reset); + EXPORT_SYMBOL_GPL(sas_eh_device_reset_handler); + EXPORT_SYMBOL_GPL(sas_eh_target_reset_handler); ++EXPORT_SYMBOL_GPL(sas_slave_alloc); + EXPORT_SYMBOL_GPL(sas_target_destroy); + EXPORT_SYMBOL_GPL(sas_ioctl); +diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c +index da719b0694dc..52405ce58ade 100644 +--- a/drivers/scsi/mvsas/mv_init.c ++++ b/drivers/scsi/mvsas/mv_init.c +@@ -45,6 +45,7 @@ static struct scsi_host_template mvs_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = mvst_host_attrs, +diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c +index 8882ba33ca87..1f41537d52a5 100644 +--- a/drivers/scsi/pm8001/pm8001_init.c ++++ b/drivers/scsi/pm8001/pm8001_init.c +@@ -86,6 +86,7 @@ static struct scsi_host_template pm8001_sht = { + .max_sectors = SCSI_DEFAULT_MAX_SECTORS, + .eh_device_reset_handler = sas_eh_device_reset_handler, + .eh_target_reset_handler = sas_eh_target_reset_handler, ++ .slave_alloc = sas_slave_alloc, + .target_destroy = sas_target_destroy, + .ioctl = sas_ioctl, + .shost_attrs = pm8001_host_attrs, +-- +2.30.2 + diff --git a/queue-5.4/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch b/queue-5.4/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch new file mode 100644 index 00000000000..f5f89de771b --- /dev/null +++ b/queue-5.4/scsi-qedf-add-check-to-synchronize-abort-and-flush.patch @@ -0,0 +1,98 @@ +From b6e93e9ec246d8a7cf747bd2a638c5377d837ddb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 24 Jun 2021 10:18:02 -0700 +Subject: scsi: qedf: Add check to synchronize abort and flush + +From: Javed Hasan + +[ Upstream commit df99446d5c2a63dc6e6920c8090da0e9da6539d5 ] + +A race condition was observed between qedf_cleanup_fcport() and +qedf_process_error_detect()->qedf_initiate_abts(): + + [2069091.203145] BUG: unable to handle kernel NULL pointer dereference at 0000000000000030 + [2069091.213100] IP: [] qedf_process_error_detect+0x96/0x130 [qedf] + [2069091.223391] PGD 1943049067 PUD 194304e067 PMD 0 + [2069091.233420] Oops: 0000 [#1] SMP + [2069091.361820] CPU: 1 PID: 14751 Comm: kworker/1:46 Kdump: loaded Tainted: P OE ------------ 3.10.0-1160.25.1.el7.x86_64 #1 + [2069091.388474] Hardware name: HPE Synergy 480 Gen10/Synergy 480 Gen10 Compute Module, BIOS I42 04/08/2020 + [2069091.402148] Workqueue: qedf_io_wq qedf_fp_io_handler [qedf] + [2069091.415780] task: ffff9bb9f5190000 ti: ffff9bacaef9c000 task.ti: ffff9bacaef9c000 + [2069091.429590] RIP: 0010:[] [] qedf_process_error_detect+0x96/0x130 [qedf] + [2069091.443666] RSP: 0018:ffff9bacaef9fdb8 EFLAGS: 00010246 + [2069091.457692] RAX: 0000000000000000 RBX: ffff9bbbbbfb18a0 RCX: ffffffffc0672310 + [2069091.471997] RDX: 00000000000005de RSI: ffffffffc066e7f0 RDI: ffff9beb3f4538d8 + [2069091.486130] RBP: ffff9bacaef9fdd8 R08: 0000000000006000 R09: 0000000000006000 + [2069091.500321] R10: 0000000000001551 R11: ffffb582996ffff8 R12: ffffb5829b39cc18 + [2069091.514779] R13: ffff9badab380c28 R14: ffffd5827f643900 R15: 0000000000000040 + [2069091.529472] FS: 0000000000000000(0000) GS:ffff9beb3f440000(0000) knlGS:0000000000000000 + [2069091.543926] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + [2069091.558942] CR2: 0000000000000030 CR3: 000000193b9a2000 CR4: 00000000007607e0 + [2069091.573424] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [2069091.587876] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 + [2069091.602007] PKRU: 00000000 + [2069091.616010] Call Trace: + [2069091.629902] [] qedf_process_cqe+0x109/0x2e0 [qedf] + [2069091.643941] [] qedf_fp_io_handler+0x26/0x60 [qedf] + [2069091.657948] [] process_one_work+0x17f/0x440 + [2069091.672111] [] worker_thread+0x126/0x3c0 + [2069091.686057] [] ? manage_workers.isra.26+0x2a0/0x2a0 + [2069091.700033] [] kthread+0xd1/0xe0 + [2069091.713891] [] ? insert_kthread_work+0x40/0x40 + +Add check in qedf_process_error_detect(). When flush is active, let the +cmds be completed from the cleanup contex. + +Link: https://lore.kernel.org/r/20210624171802.598-1-jhasan@marvell.com +Signed-off-by: Javed Hasan +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/qedf/qedf_io.c | 22 +++++++++++++++++++++- + 1 file changed, 21 insertions(+), 1 deletion(-) + +diff --git a/drivers/scsi/qedf/qedf_io.c b/drivers/scsi/qedf/qedf_io.c +index e749a2dcaad7..4e8a284e606c 100644 +--- a/drivers/scsi/qedf/qedf_io.c ++++ b/drivers/scsi/qedf/qedf_io.c +@@ -1504,9 +1504,19 @@ void qedf_process_error_detect(struct qedf_ctx *qedf, struct fcoe_cqe *cqe, + { + int rval; + ++ if (io_req == NULL) { ++ QEDF_INFO(NULL, QEDF_LOG_IO, "io_req is NULL.\n"); ++ return; ++ } ++ ++ if (io_req->fcport == NULL) { ++ QEDF_INFO(NULL, QEDF_LOG_IO, "fcport is NULL.\n"); ++ return; ++ } ++ + if (!cqe) { + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, +- "cqe is NULL for io_req %p\n", io_req); ++ "cqe is NULL for io_req %p\n", io_req); + return; + } + +@@ -1522,6 +1532,16 @@ void qedf_process_error_detect(struct qedf_ctx *qedf, struct fcoe_cqe *cqe, + le32_to_cpu(cqe->cqe_info.err_info.rx_buf_off), + le32_to_cpu(cqe->cqe_info.err_info.rx_id)); + ++ /* When flush is active, let the cmds be flushed out from the cleanup context */ ++ if (test_bit(QEDF_RPORT_IN_TARGET_RESET, &io_req->fcport->flags) || ++ (test_bit(QEDF_RPORT_IN_LUN_RESET, &io_req->fcport->flags) && ++ io_req->sc_cmd->device->lun == (u64)io_req->fcport->lun_reset_lun)) { ++ QEDF_ERR(&qedf->dbg_ctx, ++ "Dropping EQE for xid=0x%x as fcport is flushing", ++ io_req->xid); ++ return; ++ } ++ + if (qedf->stop_io_on_error) { + qedf_stop_all_io(qedf); + return; +-- +2.30.2 + diff --git a/queue-5.4/series b/queue-5.4/series new file mode 100644 index 00000000000..c6f925990c5 --- /dev/null +++ b/queue-5.4/series @@ -0,0 +1,49 @@ +arm-dts-gemini-rename-mdio-to-the-right-name.patch +arm-dts-gemini-add-device_type-on-pci.patch +arm-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk30.patch +arm64-dts-rockchip-fix-pinctrl-sleep-nodename-for-rk.patch +arm-dts-rockchip-fix-the-timer-clocks-order.patch +arm-dts-rockchip-fix-iommu-nodes-properties-on-rk322.patch +arm-dts-rockchip-fix-power-controller-node-names-for.patch +arm-dts-rockchip-fix-power-controller-node-names-for.patch-11512 +arm-dts-rockchip-fix-power-controller-node-names-for.patch-12832 +arm64-dts-rockchip-fix-power-controller-node-names-f.patch +arm64-dts-rockchip-fix-power-controller-node-names-f.patch-12892 +reset-ti-syscon-fix-to_ti_syscon_reset_data-macro.patch +arm-brcmstb-dts-fix-nand-nodes-names.patch +arm-cygnus-dts-fix-nand-nodes-names.patch +arm-nsp-dts-fix-nand-nodes-names.patch +arm-dts-bcm63xx-fix-nand-nodes-names.patch +arm-dts-hurricane-2-fix-nand-nodes-names.patch +arm-dts-imx6-phyflex-fix-uart-hardware-flow-control.patch +arm-imx-pm-imx5-fix-references-to-imx5_cpu_suspend_i.patch +rtc-mxc_v2-add-missing-module_device_table.patch +kbuild-sink-stdout-from-cmd-for-silent-build.patch +arm-dts-am335x-align-gpio-hog-names-with-dt-schema.patch +arm-dts-am437x-align-gpio-hog-names-with-dt-schema.patch +arm-dts-omap3-align-gpio-hog-names-with-dt-schema.patch +arm-dts-omap5-board-common-align-gpio-hog-names-with.patch +arm-dts-dra7x-evm-align-gpio-hog-names-with-dt-schem.patch +arm-dts-am57xx-cl-som-am57x-fix-ti-no-reset-on-init-.patch +arm-dts-am437x-gp-evm-fix-ti-no-reset-on-init-flag-f.patch +arm-dts-stm32-fix-gpio-keys-node-on-stm32-mcu-boards.patch +arm-dts-stm32-fix-rcc-node-name-on-stm32f429-mcu.patch +arm-dts-stm32-fix-timer-nodes-on-stm32-mcu-to-preven.patch +arm64-dts-juno-update-scpi-nodes-as-per-the-yaml-sch.patch +arm-dts-rockchip-fix-supply-properties-in-io-domains.patch +arm-dts-stm32-fix-i2c-node-name-on-stm32f746-to-prev.patch +arm-dts-stm32-move-stmmac-axi-config-in-ethernet-nod.patch +soc-tegra-fuse-fix-tegra234-only-builds.patch +firmware-tegra-bpmp-fix-tegra234-only-builds.patch +arm64-dts-ls208xa-remove-bus-num-from-dspi-node.patch +arm64-dts-imx8mq-assign-pcie-clocks.patch +thermal-core-correct-function-name-thermal_zone_devi.patch +kbuild-mkcompile_h-consider-timestamp-if-kbuild_buil.patch +rtc-max77686-do-not-enforce-incorrect-interrupt-trig.patch +scsi-aic7xxx-fix-unintentional-sign-extension-issue-.patch +scsi-libsas-add-lun-number-check-in-.slave_alloc-cal.patch +scsi-libfc-fix-array-index-out-of-bound-exception.patch +scsi-qedf-add-check-to-synchronize-abort-and-flush.patch +sched-fair-fix-cfs-bandwidth-hrtimer-expiry-type.patch +s390-introduce-proper-type-handling-call_on_stack-ma.patch +cifs-prevent-null-deref-in-cifs_compose_mount_option.patch diff --git a/queue-5.4/soc-tegra-fuse-fix-tegra234-only-builds.patch b/queue-5.4/soc-tegra-fuse-fix-tegra234-only-builds.patch new file mode 100644 index 00000000000..2fd54f74ead --- /dev/null +++ b/queue-5.4/soc-tegra-fuse-fix-tegra234-only-builds.patch @@ -0,0 +1,35 @@ +From b6b8540c537c274571405c943abe9e734830cda7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Apr 2021 14:20:57 +0200 +Subject: soc/tegra: fuse: Fix Tegra234-only builds + +From: Thierry Reding + +[ Upstream commit e2d0ee225e49a5553986f3138dd2803852a31fd5 ] + +The tegra30_fuse_read() symbol is used on Tegra234, so make sure it's +available. + +Signed-off-by: Thierry Reding +Signed-off-by: Sasha Levin +--- + drivers/soc/tegra/fuse/fuse-tegra30.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c +index 9c3ef0a02fd4..15060c847ecc 100644 +--- a/drivers/soc/tegra/fuse/fuse-tegra30.c ++++ b/drivers/soc/tegra/fuse/fuse-tegra30.c +@@ -36,7 +36,8 @@ + defined(CONFIG_ARCH_TEGRA_132_SOC) || \ + defined(CONFIG_ARCH_TEGRA_210_SOC) || \ + defined(CONFIG_ARCH_TEGRA_186_SOC) || \ +- defined(CONFIG_ARCH_TEGRA_194_SOC) ++ defined(CONFIG_ARCH_TEGRA_194_SOC) || \ ++ defined(CONFIG_ARCH_TEGRA_234_SOC) + static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset) + { + if (WARN_ON(!fuse->base)) +-- +2.30.2 + diff --git a/queue-5.4/thermal-core-correct-function-name-thermal_zone_devi.patch b/queue-5.4/thermal-core-correct-function-name-thermal_zone_devi.patch new file mode 100644 index 00000000000..3e1487b5149 --- /dev/null +++ b/queue-5.4/thermal-core-correct-function-name-thermal_zone_devi.patch @@ -0,0 +1,37 @@ +From aded390bee6452401321d721929941e2dafdddb2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 May 2021 13:10:20 +0800 +Subject: thermal/core: Correct function name thermal_zone_device_unregister() + +From: Yang Yingliang + +[ Upstream commit a052b5118f13febac1bd901fe0b7a807b9d6b51c ] + +Fix the following make W=1 kernel build warning: + + drivers/thermal/thermal_core.c:1376: warning: expecting prototype for thermal_device_unregister(). Prototype was for thermal_zone_device_unregister() instead + +Signed-off-by: Yang Yingliang +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210517051020.3463536-1-yangyingliang@huawei.com +Signed-off-by: Sasha Levin +--- + drivers/thermal/thermal_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c +index c28271817e43..f526ce31f5a2 100644 +--- a/drivers/thermal/thermal_core.c ++++ b/drivers/thermal/thermal_core.c +@@ -1368,7 +1368,7 @@ free_tz: + EXPORT_SYMBOL_GPL(thermal_zone_device_register); + + /** +- * thermal_device_unregister - removes the registered thermal zone device ++ * thermal_zone_device_unregister - removes the registered thermal zone device + * @tz: the thermal zone device to remove + */ + void thermal_zone_device_unregister(struct thermal_zone_device *tz) +-- +2.30.2 +