From: Greg Kroah-Hartman Date: Tue, 13 Oct 2015 20:39:18 +0000 (-0700) Subject: 4.2-stable patches X-Git-Tag: v3.10.91~79 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=a8ed87acc38b36d670c472866a40e847742f0dcf;p=thirdparty%2Fkernel%2Fstable-queue.git 4.2-stable patches added patches: arcv2-reduce-clk-for-smp-fpga-configs.patch arm-8401-1-perf-set-affinity-for-ppi-based-pmus.patch arm-8425-1-kgdb-don-t-try-to-stop-the-machine-when-setting-breakpoints.patch arm-8429-1-disable-gcc-sra-optimization.patch arm-dts-fix-usb-pin-control-for-imx-rex-dts.patch arm-dts-fix-wrong-clock-binding-for-sysmmu_fimd1_1-on-exynos5420.patch arm-dts-omap3-beagle-make-i2c3-ddc-and-tfp410-gpio-work-again.patch arm-dts-omap5-uevm.dts-fix-i2c5-pinctrl-offsets.patch arm-dts-sunxi-raise-minimum-cpu-voltage-for-sun7i-a20-to-meet-soc-specifications.patch arm-exynos-reset-little-cores-when-cpu-is-up.patch arm-fix-thumb2-signal-handling-when-armv6-is-enabled.patch arm-pxa-ssp-fix-build-error-by-removing-originally-incorrect-dt-binding.patch hwmon-nct6775-swap-step_up_time-and-step_down_time-registers-for-most-chips.patch locking-qspinlock-x86-fix-performance-regression-under-unaccelerated-vms.patch locking-qspinlock-x86-only-emit-the-test-and-set-fallback-when-building-guest-support.patch perf-header-fixup-reading-of-header_nrcpus-feature.patch perf-hists-update-the-column-width-for-the-srcline-sort-key.patch perf-probe-use-existing-routine-to-look-for-a-kernel-module-by-dso-short_name.patch perf-stat-get-correct-cpu-id-for-print_aggr.patch perf-tools-add-empty-build-files-for-architectures-lacking-them.patch perf-tools-add-missing-forward-declaration-of-struct-map-to-probe-event.h.patch perf-tools-fix-copying-of-proc-kcore.patch perf-tools-fix-parse_events_add_pmu-caller.patch perf-x86-intel-fix-constraint-access.patch sched-access-local-runqueue-directly-in-single_task_running.patch toshiba_acpi-fix-hotkeys-registration-on-some-toshiba-models.patch watchdog-imgpdc-unregister-restart-handler-on-remove.patch watchdog-sunxi-fix-activation-of-system-reset.patch windfarm-decrement-client-count-when-unregistering.patch --- diff --git a/queue-4.2/arcv2-reduce-clk-for-smp-fpga-configs.patch b/queue-4.2/arcv2-reduce-clk-for-smp-fpga-configs.patch new file mode 100644 index 00000000000..8ca8a27efb0 --- /dev/null +++ b/queue-4.2/arcv2-reduce-clk-for-smp-fpga-configs.patch @@ -0,0 +1,30 @@ +From 3ebb0540c20d6670396ccee9ff6794c095fa9311 Mon Sep 17 00:00:00 2001 +From: Vineet Gupta +Date: Fri, 11 Sep 2015 16:32:22 -0700 +Subject: ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs + +From: Vineet Gupta + +commit 3ebb0540c20d6670396ccee9ff6794c095fa9311 upstream. + +Newer bitfiles needs the reduced clk even for SMP builds + +Signed-off-by: Vineet Gupta +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arc/plat-axs10x/axs10x.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arc/plat-axs10x/axs10x.c ++++ b/arch/arc/plat-axs10x/axs10x.c +@@ -402,6 +402,8 @@ static void __init axs103_early_init(voi + unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; + if (num_cores > 2) + arc_set_core_freq(50 * 1000000); ++ else if (num_cores == 2) ++ arc_set_core_freq(75 * 1000000); + #endif + + switch (arc_get_core_freq()/1000000) { diff --git a/queue-4.2/arm-8401-1-perf-set-affinity-for-ppi-based-pmus.patch b/queue-4.2/arm-8401-1-perf-set-affinity-for-ppi-based-pmus.patch new file mode 100644 index 00000000000..f916838ef2f --- /dev/null +++ b/queue-4.2/arm-8401-1-perf-set-affinity-for-ppi-based-pmus.patch @@ -0,0 +1,40 @@ +From 8ded1e1a92daa96307e4b84b707fee5993bc6047 Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Tue, 7 Jul 2015 18:16:15 +0100 +Subject: ARM: 8401/1: perf: Set affinity for PPI based PMUs + +From: Stephen Boyd + +commit 8ded1e1a92daa96307e4b84b707fee5993bc6047 upstream. + +For PPI based PMUs, we bail out early in of_pmu_irq_cfg() without +setting the PMU's supported_cpus bitmap. This causes the +smp_call_function_any() in armv7_probe_num_events() to fail. Set +the bitmap to be all CPUs so that we properly probe PMUs that use +PPIs. + +Fixes: cc88116da0d1 ("arm: perf: treat PMUs as CPU affine") +Cc: Mark Rutland +Signed-off-by: Stephen Boyd +Signed-off-by: Will Deacon +Signed-off-by: Russell King +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/kernel/perf_event.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/arm/kernel/perf_event.c ++++ b/arch/arm/kernel/perf_event.c +@@ -795,8 +795,10 @@ static int of_pmu_irq_cfg(struct arm_pmu + + /* Don't bother with PPIs; they're already affine */ + irq = platform_get_irq(pdev, 0); +- if (irq >= 0 && irq_is_percpu(irq)) ++ if (irq >= 0 && irq_is_percpu(irq)) { ++ cpumask_setall(&pmu->supported_cpus); + return 0; ++ } + + irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); + if (!irqs) diff --git a/queue-4.2/arm-8425-1-kgdb-don-t-try-to-stop-the-machine-when-setting-breakpoints.patch b/queue-4.2/arm-8425-1-kgdb-don-t-try-to-stop-the-machine-when-setting-breakpoints.patch new file mode 100644 index 00000000000..49656abf71a --- /dev/null +++ b/queue-4.2/arm-8425-1-kgdb-don-t-try-to-stop-the-machine-when-setting-breakpoints.patch @@ -0,0 +1,86 @@ +From 7ae85dc7687c7e7119053d83d02c560ea217b772 Mon Sep 17 00:00:00 2001 +From: Doug Anderson +Date: Wed, 26 Aug 2015 18:26:49 +0100 +Subject: ARM: 8425/1: kgdb: Don't try to stop the machine when setting breakpoints + +From: Doug Anderson + +commit 7ae85dc7687c7e7119053d83d02c560ea217b772 upstream. + +In (23a4e40 arm: kgdb: Handle read-only text / modules) we moved to +using patch_text() to set breakpoints so that we could handle the case +when we had CONFIG_DEBUG_RODATA. That patch used patch_text(). +Unfortunately, patch_text() assumes that we're not in atomic context +when it runs since it needs to grab a mutex and also wait for other +CPUs to stop (which it does with a completion). + +This would result in a stack crawl if you had +CONFIG_DEBUG_ATOMIC_SLEEP and tried to set a breakpoint in kgdb. The +crawl looked something like: + + BUG: scheduling while atomic: swapper/0/0/0x00010007 + CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.2.0-rc7-00133-geb63b34 #1073 + Hardware name: Rockchip (Device Tree) + (unwind_backtrace) from [] (show_stack+0x20/0x24) + (show_stack) from [] (dump_stack+0x84/0xb8) + (dump_stack) from [] (__schedule_bug+0x54/0x6c) + (__schedule_bug) from [] (__schedule+0x80/0x668) + (__schedule) from [] (schedule+0xb8/0xd4) + (schedule) from [] (schedule_timeout+0x2c/0x234) + (schedule_timeout) from [] (wait_for_common+0xf4/0x188) + (wait_for_common) from [] (wait_for_completion+0x20/0x24) + (wait_for_completion) from [] (__stop_cpus+0x58/0x70) + (__stop_cpus) from [] (stop_cpus+0x3c/0x54) + (stop_cpus) from [] (__stop_machine+0xcc/0xe8) + (__stop_machine) from [] (stop_machine+0x34/0x44) + (stop_machine) from [] (patch_text+0x28/0x34) + (patch_text) from [] (kgdb_arch_set_breakpoint+0x40/0x4c) + (kgdb_arch_set_breakpoint) from [] (kgdb_validate_break_address+0x2c/0x60) + (kgdb_validate_break_address) from [] (dbg_set_sw_break+0x1c/0xdc) + (dbg_set_sw_break) from [] (gdb_serial_stub+0x9c4/0xba4) + (gdb_serial_stub) from [] (kgdb_cpu_enter+0x1f8/0x60c) + (kgdb_cpu_enter) from [] (kgdb_handle_exception+0x19c/0x1d0) + (kgdb_handle_exception) from [] (kgdb_compiled_brk_fn+0x30/0x3c) + (kgdb_compiled_brk_fn) from [] (do_undefinstr+0x1a4/0x20c) + (do_undefinstr) from [] (__und_svc_finish+0x0/0x34) + +It turns out that when we're in kgdb all the CPUs are stopped anyway +so there's no reason we should be calling patch_text(). We can +instead directly call __patch_text() which assumes that CPUs have +already been stopped. + +Fixes: 23a4e4050ba9 ("arm: kgdb: Handle read-only text / modules") +Reported-by: Aapo Vienamo +Signed-off-by: Douglas Anderson +Reviewed-by: Stephen Boyd +Acked-by: Kees Cook +Signed-off-by: Russell King +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/kernel/kgdb.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/arch/arm/kernel/kgdb.c ++++ b/arch/arm/kernel/kgdb.c +@@ -259,15 +259,17 @@ int kgdb_arch_set_breakpoint(struct kgdb + if (err) + return err; + +- patch_text((void *)bpt->bpt_addr, +- *(unsigned int *)arch_kgdb_ops.gdb_bpt_instr); ++ /* Machine is already stopped, so we can use __patch_text() directly */ ++ __patch_text((void *)bpt->bpt_addr, ++ *(unsigned int *)arch_kgdb_ops.gdb_bpt_instr); + + return err; + } + + int kgdb_arch_remove_breakpoint(struct kgdb_bkpt *bpt) + { +- patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr); ++ /* Machine is already stopped, so we can use __patch_text() directly */ ++ __patch_text((void *)bpt->bpt_addr, *(unsigned int *)bpt->saved_instr); + + return 0; + } diff --git a/queue-4.2/arm-8429-1-disable-gcc-sra-optimization.patch b/queue-4.2/arm-8429-1-disable-gcc-sra-optimization.patch new file mode 100644 index 00000000000..f0a9188cf99 --- /dev/null +++ b/queue-4.2/arm-8429-1-disable-gcc-sra-optimization.patch @@ -0,0 +1,84 @@ +From a077224fd35b2f7fbc93f14cf67074fc792fbac2 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Thu, 3 Sep 2015 13:24:40 +0100 +Subject: ARM: 8429/1: disable GCC SRA optimization + +From: Ard Biesheuvel + +commit a077224fd35b2f7fbc93f14cf67074fc792fbac2 upstream. + +While working on the 32-bit ARM port of UEFI, I noticed a strange +corruption in the kernel log. The following snprintf() statement +(in drivers/firmware/efi/efi.c:efi_md_typeattr_format()) + + snprintf(pos, size, "|%3s|%2s|%2s|%2s|%3s|%2s|%2s|%2s|%2s]", + +was producing the following output in the log: + + | | | | | |WB|WT|WC|UC] + | | | | | |WB|WT|WC|UC] + | | | | | |WB|WT|WC|UC] + |RUN| | | | |WB|WT|WC|UC]* + |RUN| | | | |WB|WT|WC|UC]* + | | | | | |WB|WT|WC|UC] + |RUN| | | | |WB|WT|WC|UC]* + | | | | | |WB|WT|WC|UC] + |RUN| | | | | | | |UC] + |RUN| | | | | | | |UC] + +As it turns out, this is caused by incorrect code being emitted for +the string() function in lib/vsprintf.c. The following code + + if (!(spec.flags & LEFT)) { + while (len < spec.field_width--) { + if (buf < end) + *buf = ' '; + ++buf; + } + } + for (i = 0; i < len; ++i) { + if (buf < end) + *buf = *s; + ++buf; ++s; + } + while (len < spec.field_width--) { + if (buf < end) + *buf = ' '; + ++buf; + } + +when called with len == 0, triggers an issue in the GCC SRA optimization +pass (Scalar Replacement of Aggregates), which handles promotion of signed +struct members incorrectly. This is a known but as yet unresolved issue. +(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932). In this particular +case, it is causing the second while loop to be executed erroneously a +single time, causing the additional space characters to be printed. + +So disable the optimization by passing -fno-ipa-sra. + +Acked-by: Nicolas Pitre +Signed-off-by: Ard Biesheuvel +Signed-off-by: Russell King +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/Makefile | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -54,6 +54,14 @@ AS += -EL + LD += -EL + endif + ++# ++# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and ++# later may result in code being generated that handles signed short and signed ++# char struct members incorrectly. So disable it. ++# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932) ++# ++KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) ++ + # This selects which instruction set is used. + # Note that GCC does not numerically define an architecture version + # macro, but instead defines a whole series of macros which makes diff --git a/queue-4.2/arm-dts-fix-usb-pin-control-for-imx-rex-dts.patch b/queue-4.2/arm-dts-fix-usb-pin-control-for-imx-rex-dts.patch new file mode 100644 index 00000000000..38060b7ad70 --- /dev/null +++ b/queue-4.2/arm-dts-fix-usb-pin-control-for-imx-rex-dts.patch @@ -0,0 +1,53 @@ +From 0af822110871400908d5b6f83a8908c45f881d8f Mon Sep 17 00:00:00 2001 +From: "Felipe F. Tonello" +Date: Wed, 16 Sep 2015 18:40:32 +0100 +Subject: ARM: dts: fix usb pin control for imx-rex dts + +From: "Felipe F. Tonello" + +commit 0af822110871400908d5b6f83a8908c45f881d8f upstream. + +This fixes a duplicated pin control causing this error: + +imx6q-pinctrl 20e0000.iomuxc: pin MX6Q_PAD_GPIO_1 already +requested by regulators:regulator@2; cannot claim for 2184000.usb +imx6q-pinctrl 20e0000.iomuxc: pin-137 (2184000.usb) status -22 +imx6q-pinctrl 20e0000.iomuxc: could not request pin 137 +(MX6Q_PAD_GPIO_1) from group usbotggrp on device 20e0000.iomuxc +imx_usb 2184000.usb: Error applying setting, reverse things +back +imx6q-pinctrl 20e0000.iomuxc: pin MX6Q_PAD_EIM_D31 already +requested by regulators:regulator@1; cannot claim for 2184200.usb +imx6q-pinctrl 20e0000.iomuxc: pin-52 (2184200.usb) status -22 +imx6q-pinctrl 20e0000.iomuxc: could not request pin 52 (MX6Q_PAD_EIM_D31) +from group usbh1grp on device 20e0000.iomuxc +imx_usb 2184200.usb: Error applying setting, reverse things +back + +Signed-off-by: Felipe F. Tonello +Fixes: e2047e33f2bd ("ARM: dts: add initial Rex Pro board support") +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/imx6qdl-rex.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi +@@ -35,7 +35,6 @@ + compatible = "regulator-fixed"; + reg = <1>; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbh1>; + regulator-name = "usbh1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +@@ -47,7 +46,6 @@ + compatible = "regulator-fixed"; + reg = <2>; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_usbotg>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; diff --git a/queue-4.2/arm-dts-fix-wrong-clock-binding-for-sysmmu_fimd1_1-on-exynos5420.patch b/queue-4.2/arm-dts-fix-wrong-clock-binding-for-sysmmu_fimd1_1-on-exynos5420.patch new file mode 100644 index 00000000000..95545394959 --- /dev/null +++ b/queue-4.2/arm-dts-fix-wrong-clock-binding-for-sysmmu_fimd1_1-on-exynos5420.patch @@ -0,0 +1,38 @@ +From c7d2ecd9f64c351cb4d551f1f472d0fc09c3cae8 Mon Sep 17 00:00:00 2001 +From: Joonyoung Shim +Date: Wed, 23 Sep 2015 16:41:55 +0900 +Subject: ARM: dts: Fix wrong clock binding for sysmmu_fimd1_1 on exynos5420 + +From: Joonyoung Shim + +commit c7d2ecd9f64c351cb4d551f1f472d0fc09c3cae8 upstream. + +The sysmmu_fimd1_1 should bind the clock CLK_SMMU_FIMD1M1, not the clock +CLK_SMMU_FIMD1M0. CLK_SMMU_FIMD1M0 is a clock for the sysmmu_fimd1_0. + +This wrong clock binding causes the problem that is blocked in iommu_map +function when IOMMU is enabled and exynos-drm driver tries to allocate +buffer via DMA mapping API on Odroid-XU3 board. + +Fixes: b70045167815 ("ARM: dts: add sysmmu nodes for exynos5420") +Signed-off-by: Joonyoung Shim +Reviewed-by: Javier Martinez Canillas +Acked-by: Marek Szyprowski +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/exynos5420.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/exynos5420.dtsi ++++ b/arch/arm/boot/dts/exynos5420.dtsi +@@ -1118,7 +1118,7 @@ + interrupt-parent = <&combiner>; + interrupts = <3 0>; + clock-names = "sysmmu", "master"; +- clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>; ++ clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>; + power-domains = <&disp_pd>; + #iommu-cells = <0>; + }; diff --git a/queue-4.2/arm-dts-omap3-beagle-make-i2c3-ddc-and-tfp410-gpio-work-again.patch b/queue-4.2/arm-dts-omap3-beagle-make-i2c3-ddc-and-tfp410-gpio-work-again.patch new file mode 100644 index 00000000000..4cf989f538b --- /dev/null +++ b/queue-4.2/arm-dts-omap3-beagle-make-i2c3-ddc-and-tfp410-gpio-work-again.patch @@ -0,0 +1,40 @@ +From 3a2fa775bd1d0579113666c1a2e37654a34018a0 Mon Sep 17 00:00:00 2001 +From: Carl Frederik Werner +Date: Wed, 2 Sep 2015 10:07:57 +0900 +Subject: ARM: dts: omap3-beagle: make i2c3, ddc and tfp410 gpio work again + +From: Carl Frederik Werner + +commit 3a2fa775bd1d0579113666c1a2e37654a34018a0 upstream. + +Let's fix pinmux address of gpio 170 used by tfp410 powerdown-gpio. + +According to the OMAP35x Technical Reference Manual + CONTROL_PADCONF_I2C3_SDA[15:0] 0x480021C4 mode0: i2c3_sda + CONTROL_PADCONF_I2C3_SDA[31:16] 0x480021C4 mode4: gpio_170 +the pinmux address of gpio 170 must be 0x480021C6. + +The former wrong address broke i2c3 (used by hdmi ddc), resulting in +kernel message: + omap_i2c 48060000.i2c: controller timed out + +Fixes: 8cecf52befd7 ("ARM: omap3-beagle.dts: add display information") +Signed-off-by: Carl Frederik Werner +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/omap3-beagle.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/omap3-beagle.dts ++++ b/arch/arm/boot/dts/omap3-beagle.dts +@@ -202,7 +202,7 @@ + + tfp410_pins: pinmux_tfp410_pins { + pinctrl-single,pins = < +- 0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ ++ 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ + >; + }; + diff --git a/queue-4.2/arm-dts-omap5-uevm.dts-fix-i2c5-pinctrl-offsets.patch b/queue-4.2/arm-dts-omap5-uevm.dts-fix-i2c5-pinctrl-offsets.patch new file mode 100644 index 00000000000..983691821ad --- /dev/null +++ b/queue-4.2/arm-dts-omap5-uevm.dts-fix-i2c5-pinctrl-offsets.patch @@ -0,0 +1,35 @@ +From 1dbdad75074d16c3e3005180f81a01cdc04a7872 Mon Sep 17 00:00:00 2001 +From: Grazvydas Ignotas +Date: Wed, 16 Sep 2015 01:34:31 +0300 +Subject: ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets + +From: Grazvydas Ignotas + +commit 1dbdad75074d16c3e3005180f81a01cdc04a7872 upstream. + +The i2c5 pinctrl offsets are wrong. If the bootloader doesn't set the +pins up, communication with tca6424a doesn't work (controller timeouts) +and it is not possible to enable HDMI. + +Fixes: 9be495c42609 ("ARM: dts: omap5-evm: Add I2c pinctrl data") +Signed-off-by: Grazvydas Ignotas +Signed-off-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/omap5-uevm.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/omap5-uevm.dts ++++ b/arch/arm/boot/dts/omap5-uevm.dts +@@ -174,8 +174,8 @@ + + i2c5_pins: pinmux_i2c5_pins { + pinctrl-single,pins = < +- 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ +- 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */ ++ 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ ++ 0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */ + >; + }; + diff --git a/queue-4.2/arm-dts-sunxi-raise-minimum-cpu-voltage-for-sun7i-a20-to-meet-soc-specifications.patch b/queue-4.2/arm-dts-sunxi-raise-minimum-cpu-voltage-for-sun7i-a20-to-meet-soc-specifications.patch new file mode 100644 index 00000000000..9f9f2237aa6 --- /dev/null +++ b/queue-4.2/arm-dts-sunxi-raise-minimum-cpu-voltage-for-sun7i-a20-to-meet-soc-specifications.patch @@ -0,0 +1,36 @@ +From eaeef1ad9b6ea6df1d1220c254d9563da60cb9d1 Mon Sep 17 00:00:00 2001 +From: Timo Sigurdsson +Date: Tue, 4 Aug 2015 23:08:01 +0200 +Subject: ARM: dts: sunxi: Raise minimum CPU voltage for sun7i-a20 to meet SoC specifications + +From: Timo Sigurdsson + +commit eaeef1ad9b6ea6df1d1220c254d9563da60cb9d1 upstream. + +sun7i-a20.dtsi contains a cpufreq operating point at 0.9 volts. The minimum +CPU voltage for the Allwinner A20 SoC, however, is 1.0 volts. Thus, raise +the voltage for the lowest operating point to 1.0 volts in order to stay +within the SoC specifications. It is an undervolted setting that isn't +stable across all SoCs and boards out there. + +Fixes: d96b7161916f ("ARM: dts: sun7i: Add cpu clock reference and operating points to dtsi") +Signed-off-by: Timo Sigurdsson +Acked-by: Iain Paton +Signed-off-by: Maxime Ripard +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/sun7i-a20.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/sun7i-a20.dtsi ++++ b/arch/arm/boot/dts/sun7i-a20.dtsi +@@ -107,7 +107,7 @@ + 720000 1200000 + 528000 1100000 + 312000 1000000 +- 144000 900000 ++ 144000 1000000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; diff --git a/queue-4.2/arm-exynos-reset-little-cores-when-cpu-is-up.patch b/queue-4.2/arm-exynos-reset-little-cores-when-cpu-is-up.patch new file mode 100644 index 00000000000..b23faa83f87 --- /dev/null +++ b/queue-4.2/arm-exynos-reset-little-cores-when-cpu-is-up.patch @@ -0,0 +1,97 @@ +From 833b5794e3303cc97a0d2d4ba97f26cc9d9b4b79 Mon Sep 17 00:00:00 2001 +From: Chanho Park +Date: Tue, 1 Sep 2015 23:17:03 +0900 +Subject: ARM: EXYNOS: reset Little cores when cpu is up + +From: Chanho Park + +commit 833b5794e3303cc97a0d2d4ba97f26cc9d9b4b79 upstream. + +The cpu booting of exynos5422 has been still broken since we discussed +it in last year[1]. This patch is inspired from Odroid XU3 +code (Actually, it was from samsung exynos vendor kernel)[2]. This weird +reset code was founded exynos5420 octa cores series SoCs and only +required for the first boot core is the Little core (Cortex A7). +Some of the exynos5420 boards and all of the exynos5422 boards will require +this code. + +There is two ways to check the little core is the first cpu. One is +checking GPG2CON[1] GPIO value and the other is checking the cluster +number of the first cpu. I selected the latter because it's more easier +than the former. + +[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html +[2] https://patchwork.kernel.org/patch/6782891/ + +Cc: Kevin Hilman +Cc: Javier Martinez Canillas +Cc: Krzysztof Kozlowski +Tested-by: Kevin Hilman +Signed-off-by: Chanho Park +[k.kozlowski: Adding stable for v4.1+, reformat comment] +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-exynos/mcpm-exynos.c | 27 ++++++++++++++++++++++++++- + arch/arm/mach-exynos/regs-pmu.h | 6 ++++++ + 2 files changed, 32 insertions(+), 1 deletion(-) + +--- a/arch/arm/mach-exynos/mcpm-exynos.c ++++ b/arch/arm/mach-exynos/mcpm-exynos.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + + #include "regs-pmu.h" + #include "common.h" +@@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned i + cluster >= EXYNOS5420_NR_CLUSTERS) + return -EINVAL; + +- exynos_cpu_power_up(cpunr); ++ if (!exynos_cpu_power_state(cpunr)) { ++ exynos_cpu_power_up(cpunr); ++ ++ /* ++ * This assumes the cluster number of the big cores(Cortex A15) ++ * is 0 and the Little cores(Cortex A7) is 1. ++ * When the system was booted from the Little core, ++ * they should be reset during power up cpu. ++ */ ++ if (cluster && ++ cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) { ++ /* ++ * Before we reset the Little cores, we should wait ++ * the SPARE2 register is set to 1 because the init ++ * codes of the iROM will set the register after ++ * initialization. ++ */ ++ while (!pmu_raw_readl(S5P_PMU_SPARE2)) ++ udelay(10); ++ ++ pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu), ++ EXYNOS_SWRESET); ++ } ++ } ++ + return 0; + } + +--- a/arch/arm/mach-exynos/regs-pmu.h ++++ b/arch/arm/mach-exynos/regs-pmu.h +@@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cp + #define SPREAD_ENABLE 0xF + #define SPREAD_USE_STANDWFI 0xF + ++#define EXYNOS5420_KFC_CORE_RESET0 BIT(8) ++#define EXYNOS5420_KFC_ETM_RESET0 BIT(20) ++ ++#define EXYNOS5420_KFC_CORE_RESET(_nr) \ ++ ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) ++ + #define EXYNOS5420_BB_CON1 0x0784 + #define EXYNOS5420_BB_SEL_EN BIT(31) + #define EXYNOS5420_BB_PMOS_EN BIT(7) diff --git a/queue-4.2/arm-fix-thumb2-signal-handling-when-armv6-is-enabled.patch b/queue-4.2/arm-fix-thumb2-signal-handling-when-armv6-is-enabled.patch new file mode 100644 index 00000000000..e27abefefcd --- /dev/null +++ b/queue-4.2/arm-fix-thumb2-signal-handling-when-armv6-is-enabled.patch @@ -0,0 +1,59 @@ +From 9b55613f42e8d40d5c9ccb8970bde6af4764b2ab Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Fri, 11 Sep 2015 16:44:02 +0100 +Subject: ARM: fix Thumb2 signal handling when ARMv6 is enabled + +From: Russell King + +commit 9b55613f42e8d40d5c9ccb8970bde6af4764b2ab upstream. + +When a kernel is built covering ARMv6 to ARMv7, we omit to clear the +IT state when entering a signal handler. This can cause the first +few instructions to be conditionally executed depending on the parent +context. + +In any case, the original test for >= ARMv7 is broken - ARMv6 can have +Thumb-2 support as well, and an ARMv6T2 specific build would omit this +code too. + +Relax the test back to ARMv6 or greater. This results in us always +clearing the IT state bits in the PSR, even on CPUs where these bits +are reserved. However, they're reserved for the IT state, so this +should cause no harm. + +Fixes: d71e1352e240 ("Clear the IT state when invoking a Thumb-2 signal handler") +Acked-by: Tony Lindgren +Tested-by: H. Nikolaus Schaller +Tested-by: Grazvydas Ignotas +Signed-off-by: Russell King +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/kernel/signal.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +--- a/arch/arm/kernel/signal.c ++++ b/arch/arm/kernel/signal.c +@@ -343,12 +343,17 @@ setup_return(struct pt_regs *regs, struc + */ + thumb = handler & 1; + +-#if __LINUX_ARM_ARCH__ >= 7 ++#if __LINUX_ARM_ARCH__ >= 6 + /* +- * Clear the If-Then Thumb-2 execution state +- * ARM spec requires this to be all 000s in ARM mode +- * Snapdragon S4/Krait misbehaves on a Thumb=>ARM +- * signal transition without this. ++ * Clear the If-Then Thumb-2 execution state. ARM spec ++ * requires this to be all 000s in ARM mode. Snapdragon ++ * S4/Krait misbehaves on a Thumb=>ARM signal transition ++ * without this. ++ * ++ * We must do this whenever we are running on a Thumb-2 ++ * capable CPU, which includes ARMv6T2. However, we elect ++ * to do this whenever we're on an ARMv6 or later CPU for ++ * simplicity. + */ + cpsr &= ~PSR_IT_MASK; + #endif diff --git a/queue-4.2/arm-pxa-ssp-fix-build-error-by-removing-originally-incorrect-dt-binding.patch b/queue-4.2/arm-pxa-ssp-fix-build-error-by-removing-originally-incorrect-dt-binding.patch new file mode 100644 index 00000000000..03ede2ea702 --- /dev/null +++ b/queue-4.2/arm-pxa-ssp-fix-build-error-by-removing-originally-incorrect-dt-binding.patch @@ -0,0 +1,39 @@ +From b692cb83b14d2f741f513221f5f78042c674c2a9 Mon Sep 17 00:00:00 2001 +From: Jarkko Nikula +Date: Mon, 7 Sep 2015 10:23:01 +0300 +Subject: ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding + +From: Jarkko Nikula + +commit b692cb83b14d2f741f513221f5f78042c674c2a9 upstream. + +Commit 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") caused +build error here because it removed the type LPSS_SSP and I didn't notice +the type was used here too. + +I believe commit a6e56c28a178 ("ARM: pxa: ssp: add DT bindings") added it +accidentally by copying all enum pxa_ssp_type types from +include/linux/pxa2xx_ssp.h even LPSS_SSP was for Intel LPSS SPI devices. + +Fix the build error by removing this incorrect binding. + +Fixes: 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") +Signed-off-by: Jarkko Nikula +Reported-by: Axel Lin +Signed-off-by: Robert Jarzmik +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/plat-pxa/ssp.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm/plat-pxa/ssp.c ++++ b/arch/arm/plat-pxa/ssp.c +@@ -107,7 +107,6 @@ static const struct of_device_id pxa_ssp + { .compatible = "mvrl,pxa168-ssp", .data = (void *) PXA168_SSP }, + { .compatible = "mrvl,pxa910-ssp", .data = (void *) PXA910_SSP }, + { .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP }, +- { .compatible = "mrvl,lpss-ssp", .data = (void *) LPSS_SSP }, + { }, + }; + MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids); diff --git a/queue-4.2/hwmon-nct6775-swap-step_up_time-and-step_down_time-registers-for-most-chips.patch b/queue-4.2/hwmon-nct6775-swap-step_up_time-and-step_down_time-registers-for-most-chips.patch new file mode 100644 index 00000000000..ac6cbe79196 --- /dev/null +++ b/queue-4.2/hwmon-nct6775-swap-step_up_time-and-step_down_time-registers-for-most-chips.patch @@ -0,0 +1,67 @@ +From 728d29400488d54974d3317fe8a232b45fdb42ee Mon Sep 17 00:00:00 2001 +From: Guenter Roeck +Date: Mon, 31 Aug 2015 16:13:47 -0700 +Subject: hwmon: (nct6775) Swap STEP_UP_TIME and STEP_DOWN_TIME registers for most chips + +From: Guenter Roeck + +commit 728d29400488d54974d3317fe8a232b45fdb42ee upstream. + +The STEP_UP_TIME and STEP_DOWN_TIME registers are swapped for all chips but +NCT6775. + +Reported-by: Grazvydas Ignotas +Reviewed-by: Jean Delvare +Signed-off-by: Guenter Roeck +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hwmon/nct6775.c | 16 ++++++++++------ + 1 file changed, 10 insertions(+), 6 deletions(-) + +--- a/drivers/hwmon/nct6775.c ++++ b/drivers/hwmon/nct6775.c +@@ -354,6 +354,10 @@ static const u16 NCT6775_REG_TEMP_CRIT[A + + /* NCT6776 specific data */ + ++/* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ ++#define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME ++#define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME ++ + static const s8 NCT6776_ALARM_BITS[] = { + 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ + 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ +@@ -3528,8 +3532,8 @@ static int nct6775_probe(struct platform + data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; + data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; + data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; +- data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; +- data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; ++ data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; ++ data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; + data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; + data->REG_PWM[0] = NCT6775_REG_PWM; + data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; +@@ -3600,8 +3604,8 @@ static int nct6775_probe(struct platform + data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; + data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; + data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; +- data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; +- data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; ++ data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; ++ data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; + data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; + data->REG_PWM[0] = NCT6775_REG_PWM; + data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; +@@ -3677,8 +3681,8 @@ static int nct6775_probe(struct platform + data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; + data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; + data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; +- data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; +- data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; ++ data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; ++ data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; + data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; + data->REG_PWM[0] = NCT6775_REG_PWM; + data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; diff --git a/queue-4.2/locking-qspinlock-x86-fix-performance-regression-under-unaccelerated-vms.patch b/queue-4.2/locking-qspinlock-x86-fix-performance-regression-under-unaccelerated-vms.patch new file mode 100644 index 00000000000..9c1556e4b3e --- /dev/null +++ b/queue-4.2/locking-qspinlock-x86-fix-performance-regression-under-unaccelerated-vms.patch @@ -0,0 +1,88 @@ +From 43b3f02899f74ae9914a39547cc5492156f0027a Mon Sep 17 00:00:00 2001 +From: Peter Zijlstra +Date: Fri, 4 Sep 2015 17:25:23 +0200 +Subject: locking/qspinlock/x86: Fix performance regression under unaccelerated VMs + +From: Peter Zijlstra + +commit 43b3f02899f74ae9914a39547cc5492156f0027a upstream. + +Dave ran into horrible performance on a VM without PARAVIRT_SPINLOCKS +set and Linus noted that the test-and-set implementation was retarded. + +One should spin on the variable with a load, not a RMW. + +While there, remove 'queued' from the name, as the lock isn't queued +at all, but a simple test-and-set. + +Suggested-by: Linus Torvalds +Reported-by: Dave Chinner +Tested-by: Dave Chinner +Signed-off-by: Peter Zijlstra (Intel) +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Cc: Waiman Long +Link: http://lkml.kernel.org/r/20150904152523.GR18673@twins.programming.kicks-ass.net +Signed-off-by: Ingo Molnar +Signed-off-by: Greg Kroah-Hartman + +diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h +index 9d51fae1cba3..8dde3bdc4a05 100644 +--- a/arch/x86/include/asm/qspinlock.h ++++ b/arch/x86/include/asm/qspinlock.h +@@ -39,15 +39,23 @@ static inline void queued_spin_unlock(struct qspinlock *lock) + } + #endif + +-#define virt_queued_spin_lock virt_queued_spin_lock ++#define virt_spin_lock virt_spin_lock + +-static inline bool virt_queued_spin_lock(struct qspinlock *lock) ++static inline bool virt_spin_lock(struct qspinlock *lock) + { + if (!static_cpu_has(X86_FEATURE_HYPERVISOR)) + return false; + +- while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0) +- cpu_relax(); ++ /* ++ * On hypervisors without PARAVIRT_SPINLOCKS support we fall ++ * back to a Test-and-Set spinlock, because fair locks have ++ * horrible lock 'holder' preemption issues. ++ */ ++ ++ do { ++ while (atomic_read(&lock->val) != 0) ++ cpu_relax(); ++ } while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0); + + return true; + } +diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinlock.h +index 83bfb87f5bf1..e2aadbc7151f 100644 +--- a/include/asm-generic/qspinlock.h ++++ b/include/asm-generic/qspinlock.h +@@ -111,8 +111,8 @@ static inline void queued_spin_unlock_wait(struct qspinlock *lock) + cpu_relax(); + } + +-#ifndef virt_queued_spin_lock +-static __always_inline bool virt_queued_spin_lock(struct qspinlock *lock) ++#ifndef virt_spin_lock ++static __always_inline bool virt_spin_lock(struct qspinlock *lock) + { + return false; + } +diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c +index 337c8818541d..87e9ce6a63c5 100644 +--- a/kernel/locking/qspinlock.c ++++ b/kernel/locking/qspinlock.c +@@ -289,7 +289,7 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) + if (pv_enabled()) + goto queue; + +- if (virt_queued_spin_lock(lock)) ++ if (virt_spin_lock(lock)) + return; + + /* diff --git a/queue-4.2/locking-qspinlock-x86-only-emit-the-test-and-set-fallback-when-building-guest-support.patch b/queue-4.2/locking-qspinlock-x86-only-emit-the-test-and-set-fallback-when-building-guest-support.patch new file mode 100644 index 00000000000..ca79969cc01 --- /dev/null +++ b/queue-4.2/locking-qspinlock-x86-only-emit-the-test-and-set-fallback-when-building-guest-support.patch @@ -0,0 +1,42 @@ +From a6b277857fd2c990bc208ca1958d3f34d26052f7 Mon Sep 17 00:00:00 2001 +From: Peter Zijlstra +Date: Sat, 5 Sep 2015 16:55:05 +0200 +Subject: locking/qspinlock/x86: Only emit the test-and-set fallback when building guest support + +From: Peter Zijlstra + +commit a6b277857fd2c990bc208ca1958d3f34d26052f7 upstream. + +Only emit the test-and-set fallback for Hypervisors lacking +PARAVIRT_SPINLOCKS support when building for guests. + +Suggested-by: Linus Torvalds +Signed-off-by: Peter Zijlstra (Intel) +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Cc: linux-kernel@vger.kernel.org +Signed-off-by: Ingo Molnar +Signed-off-by: Greg Kroah-Hartman + +diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinlock.h +index 8dde3bdc4a05..eaba08076030 100644 +--- a/arch/x86/include/asm/qspinlock.h ++++ b/arch/x86/include/asm/qspinlock.h +@@ -39,8 +39,8 @@ static inline void queued_spin_unlock(struct qspinlock *lock) + } + #endif + ++#ifdef CONFIG_PARAVIRT + #define virt_spin_lock virt_spin_lock +- + static inline bool virt_spin_lock(struct qspinlock *lock) + { + if (!static_cpu_has(X86_FEATURE_HYPERVISOR)) +@@ -59,6 +59,7 @@ static inline bool virt_spin_lock(struct qspinlock *lock) + + return true; + } ++#endif /* CONFIG_PARAVIRT */ + + #include + diff --git a/queue-4.2/perf-header-fixup-reading-of-header_nrcpus-feature.patch b/queue-4.2/perf-header-fixup-reading-of-header_nrcpus-feature.patch new file mode 100644 index 00000000000..6a9fe24416c --- /dev/null +++ b/queue-4.2/perf-header-fixup-reading-of-header_nrcpus-feature.patch @@ -0,0 +1,83 @@ +From caa470475d9b59eeff093ae650800d34612c4379 Mon Sep 17 00:00:00 2001 +From: Arnaldo Carvalho de Melo +Date: Fri, 11 Sep 2015 12:36:12 -0300 +Subject: perf header: Fixup reading of HEADER_NRCPUS feature + +From: Arnaldo Carvalho de Melo + +commit caa470475d9b59eeff093ae650800d34612c4379 upstream. + +The original patch introducing this header wrote the number of CPUs available +and online in one order and then swapped those values when reading, fix it. + +Before: + + # perf record usleep 1 + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 4 + # nrcpus avail : 4 + # echo 0 > /sys/devices/system/cpu/cpu2/online + # perf record usleep 1 + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 4 + # nrcpus avail : 3 + # echo 0 > /sys/devices/system/cpu/cpu1/online + # perf record usleep 1 + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 4 + # nrcpus avail : 2 + +After the fix, bringing back the CPUs online: + + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 2 + # nrcpus avail : 4 + # echo 1 > /sys/devices/system/cpu/cpu2/online + # perf record usleep 1 + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 3 + # nrcpus avail : 4 + # echo 1 > /sys/devices/system/cpu/cpu1/online + # perf record usleep 1 + # perf report --header-only | grep 'nrcpus \(online\|avail\)' + # nrcpus online : 4 + # nrcpus avail : 4 + +Acked-by: Namhyung Kim +Cc: Adrian Hunter +Cc: Borislav Petkov +Cc: David Ahern +Cc: Frederic Weisbecker +Cc: Jiri Olsa +Cc: Kan Liang +Cc: Stephane Eranian +Cc: Wang Nan +Fixes: fbe96f29ce4b ("perf tools: Make perf.data more self-descriptive (v8)") +Link: http://lkml.kernel.org/r/20150911153323.GP23511@kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/header.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/tools/perf/util/header.c ++++ b/tools/perf/util/header.c +@@ -1442,7 +1442,7 @@ static int process_nrcpus(struct perf_fi + if (ph->needs_swap) + nr = bswap_32(nr); + +- ph->env.nr_cpus_online = nr; ++ ph->env.nr_cpus_avail = nr; + + ret = readn(fd, &nr, sizeof(nr)); + if (ret != sizeof(nr)) +@@ -1451,7 +1451,7 @@ static int process_nrcpus(struct perf_fi + if (ph->needs_swap) + nr = bswap_32(nr); + +- ph->env.nr_cpus_avail = nr; ++ ph->env.nr_cpus_online = nr; + return 0; + } + diff --git a/queue-4.2/perf-hists-update-the-column-width-for-the-srcline-sort-key.patch b/queue-4.2/perf-hists-update-the-column-width-for-the-srcline-sort-key.patch new file mode 100644 index 00000000000..bf1181fe7d3 --- /dev/null +++ b/queue-4.2/perf-hists-update-the-column-width-for-the-srcline-sort-key.patch @@ -0,0 +1,42 @@ +From e8e6d37e73e6b950c891c780745460b87f4755b6 Mon Sep 17 00:00:00 2001 +From: Arnaldo Carvalho de Melo +Date: Mon, 10 Aug 2015 16:53:54 -0300 +Subject: perf hists: Update the column width for the "srcline" sort key + +From: Arnaldo Carvalho de Melo + +commit e8e6d37e73e6b950c891c780745460b87f4755b6 upstream. + +When we introduce a new sort key, we need to update the +hists__calc_col_len() function accordingly, otherwise the width +will be limited to strlen(header). + +We can't update it when obtaining a line value for a column (for +instance, in sort__srcline_cmp()), because we reset it all when doing a +resort (see hists__output_recalc_col_len()), so we need to, from what is +in the hist_entry fields, set each of the column widths. + +Cc: Namhyung Kim +Cc: Andi Kleen +Cc: Jiri Olsa +Fixes: 409a8be61560 ("perf tools: Add sort by src line/number") +Link: http://lkml.kernel.org/n/tip-jgbe0yx8v1gs89cslr93pvz2@git.kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/hist.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/tools/perf/util/hist.c ++++ b/tools/perf/util/hist.c +@@ -151,6 +151,9 @@ void hists__calc_col_len(struct hists *h + hists__new_col_len(hists, HISTC_LOCAL_WEIGHT, 12); + hists__new_col_len(hists, HISTC_GLOBAL_WEIGHT, 12); + ++ if (h->srcline) ++ hists__new_col_len(hists, HISTC_SRCLINE, strlen(h->srcline)); ++ + if (h->transaction) + hists__new_col_len(hists, HISTC_TRANSACTION, + hist_entry__transaction_len()); diff --git a/queue-4.2/perf-probe-use-existing-routine-to-look-for-a-kernel-module-by-dso-short_name.patch b/queue-4.2/perf-probe-use-existing-routine-to-look-for-a-kernel-module-by-dso-short_name.patch new file mode 100644 index 00000000000..84d9069c3af --- /dev/null +++ b/queue-4.2/perf-probe-use-existing-routine-to-look-for-a-kernel-module-by-dso-short_name.patch @@ -0,0 +1,73 @@ +From 266fa2b22294909ddf6e7d2f8acfe07adf9fd978 Mon Sep 17 00:00:00 2001 +From: Arnaldo Carvalho de Melo +Date: Thu, 24 Sep 2015 11:24:18 -0300 +Subject: perf probe: Use existing routine to look for a kernel module by dso->short_name + +From: Arnaldo Carvalho de Melo + +commit 266fa2b22294909ddf6e7d2f8acfe07adf9fd978 upstream. + +We have map_groups__find_by_name() to look at the list of modules that +are in place for a given machine, so use it instead of traversing the +machine dso list, which also includes DSOs for userspace. + +When merging the user and kernel DSO lists a bug was introduced where +'perf probe' stopped being able to add probes to modules using its short +name: + + # perf probe -m usbnet --add usbnet_start_xmit + usbnet_start_xmit is out of .text, skip it. + Error: Failed to add events. + # + +With this fix it works again: + + # perf probe -m usbnet --add usbnet_start_xmit + Added new event: + probe:usbnet_start_xmit (on usbnet_start_xmit in usbnet) + + You can now use it in all perf tools, such as: + + perf record -e probe:usbnet_start_xmit -aR sleep 1 + # + +Reported-by: Wang Nan +Acked-by: Masami Hiramatsu +Cc: Adrian Hunter +Cc: Borislav Petkov +Cc: David Ahern +Cc: Frederic Weisbecker +Cc: Jiri Olsa +Cc: Namhyung Kim +Cc: Stephane Eranian +Fixes: 3d39ac538629 ("perf machine: No need to have two DSOs lists") +Link: http://lkml.kernel.org/r/20150924015008.GE1897@kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/probe-event.c | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +--- a/tools/perf/util/probe-event.c ++++ b/tools/perf/util/probe-event.c +@@ -274,12 +274,13 @@ static int kernel_get_module_dso(const c + int ret = 0; + + if (module) { +- list_for_each_entry(dso, &host_machine->dsos.head, node) { +- if (!dso->kernel) +- continue; +- if (strncmp(dso->short_name + 1, module, +- dso->short_name_len - 2) == 0) +- goto found; ++ char module_name[128]; ++ ++ snprintf(module_name, sizeof(module_name), "[%s]", module); ++ map = map_groups__find_by_name(&host_machine->kmaps, MAP__FUNCTION, module_name); ++ if (map) { ++ dso = map->dso; ++ goto found; + } + pr_debug("Failed to find module %s.\n", module); + return -ENOENT; diff --git a/queue-4.2/perf-stat-get-correct-cpu-id-for-print_aggr.patch b/queue-4.2/perf-stat-get-correct-cpu-id-for-print_aggr.patch new file mode 100644 index 00000000000..36707cb50bf --- /dev/null +++ b/queue-4.2/perf-stat-get-correct-cpu-id-for-print_aggr.patch @@ -0,0 +1,78 @@ +From 601083cffb7cabdcc55b8195d732f0f7028570fa Mon Sep 17 00:00:00 2001 +From: Kan Liang +Date: Thu, 2 Jul 2015 03:08:43 -0400 +Subject: perf stat: Get correct cpu id for print_aggr + +From: Kan Liang + +commit 601083cffb7cabdcc55b8195d732f0f7028570fa upstream. + +print_aggr() fails to print per-core/per-socket statistics after commit +582ec0829b3d ("perf stat: Fix per-socket output bug for uncore events") +if events have differnt cpus. Because in print_aggr(), aggr_get_id needs +index (not cpu id) to find core/pkg id. Also, evsel cpu maps should be +used to get aggregated id. + +Here is an example: + +Counting events cycles,uncore_imc_0/cas_count_read/. (Uncore event has +cpumask 0,18) + + $ perf stat -e cycles,uncore_imc_0/cas_count_read/ -C0,18 --per-core sleep 2 + +Without this patch, it failes to get CPU 18 result. + + Performance counter stats for 'CPU(s) 0,18': + + S0-C0 1 7526851 cycles + S0-C0 1 1.05 MiB uncore_imc_0/cas_count_read/ + S1-C0 0 cycles + S1-C0 0 MiB uncore_imc_0/cas_count_read/ + +With this patch, it can get both CPU0 and CPU18 result. + + Performance counter stats for 'CPU(s) 0,18': + + S0-C0 1 6327768 cycles + S0-C0 1 0.47 MiB uncore_imc_0/cas_count_read/ + S1-C0 1 330228 cycles + S1-C0 1 0.29 MiB uncore_imc_0/cas_count_read/ + +Signed-off-by: Kan Liang +Acked-by: Jiri Olsa +Acked-by: Stephane Eranian +Cc: Adrian Hunter +Cc: Andi Kleen +Cc: David Ahern +Cc: Namhyung Kim +Cc: Peter Zijlstra +Fixes: 582ec0829b3d ("perf stat: Fix per-socket output bug for uncore events") +Link: http://lkml.kernel.org/r/1435820925-51091-1-git-send-email-kan.liang@intel.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/builtin-stat.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/tools/perf/builtin-stat.c ++++ b/tools/perf/builtin-stat.c +@@ -694,7 +694,7 @@ static void abs_printout(int id, int nr, + static void print_aggr(char *prefix) + { + struct perf_evsel *counter; +- int cpu, cpu2, s, s2, id, nr; ++ int cpu, s, s2, id, nr; + double uval; + u64 ena, run, val; + +@@ -707,8 +707,7 @@ static void print_aggr(char *prefix) + val = ena = run = 0; + nr = 0; + for (cpu = 0; cpu < perf_evsel__nr_cpus(counter); cpu++) { +- cpu2 = perf_evsel__cpus(counter)->map[cpu]; +- s2 = aggr_get_id(evsel_list->cpus, cpu2); ++ s2 = aggr_get_id(perf_evsel__cpus(counter), cpu); + if (s2 != id) + continue; + val += perf_counts(counter->counts, cpu, 0)->val; diff --git a/queue-4.2/perf-tools-add-empty-build-files-for-architectures-lacking-them.patch b/queue-4.2/perf-tools-add-empty-build-files-for-architectures-lacking-them.patch new file mode 100644 index 00000000000..a074d625145 --- /dev/null +++ b/queue-4.2/perf-tools-add-empty-build-files-for-architectures-lacking-them.patch @@ -0,0 +1,41 @@ +From 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Tue, 4 Aug 2015 17:10:27 +0100 +Subject: perf tools: Add empty Build files for architectures lacking them + +From: Ben Hutchings + +commit 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3 upstream. + +perf currently fails to build on MIPS as there is no +tools/perf/arch/mips/Build file. Adding an empty file fixes this as +there are no MIPS-specific sources to build. + +It looks like the same is needed for Alpha and PA-RISC, though I +haven't been able to test those. + +Signed-off-by: Ben Hutchings +Fixes: 5e8c0fb6a957 ("perf build: Add arch x86 objects building") +Cc: Peter Zijlstra +Link: http://lkml.kernel.org/r/1438704627.7315.2.camel@decadent.org.uk +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/arch/alpha/Build | 1 + + tools/perf/arch/mips/Build | 1 + + tools/perf/arch/parisc/Build | 1 + + 3 files changed, 3 insertions(+) + +--- /dev/null ++++ b/tools/perf/arch/alpha/Build +@@ -0,0 +1 @@ ++# empty +--- /dev/null ++++ b/tools/perf/arch/mips/Build +@@ -0,0 +1 @@ ++# empty +--- /dev/null ++++ b/tools/perf/arch/parisc/Build +@@ -0,0 +1 @@ ++# empty diff --git a/queue-4.2/perf-tools-add-missing-forward-declaration-of-struct-map-to-probe-event.h.patch b/queue-4.2/perf-tools-add-missing-forward-declaration-of-struct-map-to-probe-event.h.patch new file mode 100644 index 00000000000..58c9e8cfb8f --- /dev/null +++ b/queue-4.2/perf-tools-add-missing-forward-declaration-of-struct-map-to-probe-event.h.patch @@ -0,0 +1,47 @@ +From 5a023b57a8e96327925a39312bccc443a7c540b6 Mon Sep 17 00:00:00 2001 +From: Wang Nan +Date: Fri, 19 Jun 2015 08:42:48 +0000 +Subject: perf tools: Add missing forward declaration of struct map to probe-event.h + +From: Wang Nan + +commit 5a023b57a8e96327925a39312bccc443a7c540b6 upstream. + +Commit 7b6ff0bdbf4f7f429c2116cca92a6d171217449e ("perf probe ppc64le: +Fixup function entry if using kallsyms lookup") adds 'struct map' into +probe-event.h but not forward declares it. This patch fixes it. + +Signed-off-by: Wang Nan +Cc: Alexei Starovoitov +Cc: Brendan Gregg +Cc: Daniel Borkmann +Cc: David Ahern +Cc: He Kuang +Cc: Jiri Olsa +Cc: Kaixu Xia +Cc: Masami Hiramatsu +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Zefan Li +Cc: pi3orama@163.com +Fixes: 7b6ff0bdbf4f ("perf probe ppc64le: Fixup function entry if using kallsyms lookup") +Link: http://lkml.kernel.org/n/1436445342-1402-30-git-send-email-wangnan0@huawei.com +[ No need to include map.h, just forward declare 'struct map' ] +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/probe-event.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/tools/perf/util/probe-event.h ++++ b/tools/perf/util/probe-event.h +@@ -106,6 +106,8 @@ struct variable_list { + struct strlist *vars; /* Available variables */ + }; + ++struct map; ++ + /* Command string to events */ + extern int parse_perf_probe_command(const char *cmd, + struct perf_probe_event *pev); diff --git a/queue-4.2/perf-tools-fix-copying-of-proc-kcore.patch b/queue-4.2/perf-tools-fix-copying-of-proc-kcore.patch new file mode 100644 index 00000000000..5d2db9a780d --- /dev/null +++ b/queue-4.2/perf-tools-fix-copying-of-proc-kcore.patch @@ -0,0 +1,106 @@ +From b5cabbcbd157a4bf5a92dfc85134999a3b55342d Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Thu, 24 Sep 2015 13:05:22 +0300 +Subject: perf tools: Fix copying of /proc/kcore + +From: Adrian Hunter + +commit b5cabbcbd157a4bf5a92dfc85134999a3b55342d upstream. + +A copy of /proc/kcore containing the kernel text can be made to the +buildid cache. e.g. + + perf buildid-cache -v -k /proc/kcore + +To workaround objdump limitations, a copy is also made when annotating +against /proc/kcore. + +The copying process stops working from libelf about v1.62 onwards (the +problem was found with v1.63). + +The cause is that a call to gelf_getphdr() in kcore__add_phdr() fails +because additional validation has been added to gelf_getphdr(). + +The use of gelf_getphdr() is a misguided attempt to get default +initialization of the Gelf_Phdr structure. That should not be +necessary because every member of the Gelf_Phdr structure is +subsequently assigned. So just remove the call to gelf_getphdr(). + +Similarly, a call to gelf_getehdr() in gelf_kcore__init() can be +removed also. + +Committer notes: + +Note to stable@kernel.org, from Adrian in the cover letter for this +patchkit: + +The "Fix copying of /proc/kcore" problem goes back to v3.13 if you think +it is important enough for stable. + +Signed-off-by: Adrian Hunter +Cc: Jiri Olsa +Link: http://lkml.kernel.org/r/1443089122-19082-3-git-send-email-adrian.hunter@intel.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/symbol-elf.c | 33 ++++++++++++--------------------- + 1 file changed, 12 insertions(+), 21 deletions(-) + +--- a/tools/perf/util/symbol-elf.c ++++ b/tools/perf/util/symbol-elf.c +@@ -1260,8 +1260,6 @@ out_close: + static int kcore__init(struct kcore *kcore, char *filename, int elfclass, + bool temp) + { +- GElf_Ehdr *ehdr; +- + kcore->elfclass = elfclass; + + if (temp) +@@ -1278,9 +1276,7 @@ static int kcore__init(struct kcore *kco + if (!gelf_newehdr(kcore->elf, elfclass)) + goto out_end; + +- ehdr = gelf_getehdr(kcore->elf, &kcore->ehdr); +- if (!ehdr) +- goto out_end; ++ memset(&kcore->ehdr, 0, sizeof(GElf_Ehdr)); + + return 0; + +@@ -1337,23 +1333,18 @@ static int kcore__copy_hdr(struct kcore + static int kcore__add_phdr(struct kcore *kcore, int idx, off_t offset, + u64 addr, u64 len) + { +- GElf_Phdr gphdr; +- GElf_Phdr *phdr; +- +- phdr = gelf_getphdr(kcore->elf, idx, &gphdr); +- if (!phdr) +- return -1; +- +- phdr->p_type = PT_LOAD; +- phdr->p_flags = PF_R | PF_W | PF_X; +- phdr->p_offset = offset; +- phdr->p_vaddr = addr; +- phdr->p_paddr = 0; +- phdr->p_filesz = len; +- phdr->p_memsz = len; +- phdr->p_align = page_size; ++ GElf_Phdr phdr = { ++ .p_type = PT_LOAD, ++ .p_flags = PF_R | PF_W | PF_X, ++ .p_offset = offset, ++ .p_vaddr = addr, ++ .p_paddr = 0, ++ .p_filesz = len, ++ .p_memsz = len, ++ .p_align = page_size, ++ }; + +- if (!gelf_update_phdr(kcore->elf, idx, phdr)) ++ if (!gelf_update_phdr(kcore->elf, idx, &phdr)) + return -1; + + return 0; diff --git a/queue-4.2/perf-tools-fix-parse_events_add_pmu-caller.patch b/queue-4.2/perf-tools-fix-parse_events_add_pmu-caller.patch new file mode 100644 index 00000000000..d27bbe2e5ea --- /dev/null +++ b/queue-4.2/perf-tools-fix-parse_events_add_pmu-caller.patch @@ -0,0 +1,42 @@ +From 5ad4da4302712fba10624d28cb6c269fee592b69 Mon Sep 17 00:00:00 2001 +From: Jiri Olsa +Date: Wed, 2 Sep 2015 09:56:31 +0200 +Subject: perf tools: Fix parse_events_add_pmu caller + +From: Jiri Olsa + +commit 5ad4da4302712fba10624d28cb6c269fee592b69 upstream. + +Following commit changed parse_events_add_pmu interface: + 36adec85a86f perf tools: Change parse_events_add_pmu interface + +but forgot to change one caller. Because of lessen compilation rules for +the bison parser, the compiler did not warn on that. + +Signed-off-by: Jiri Olsa +Cc: Raphael Beamonte +Cc: David Ahern +Cc: Matt Fleming +Cc: Namhyung Kim +Cc: Peter Zijlstra +Cc: Steven Rostedt +Fixes: 36adec85a86f ("perf tools: Change parse_events_add_pmu interface") +Link: http://lkml.kernel.org/r/1441180605-24737-2-git-send-email-jolsa@kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/parse-events.y | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/tools/perf/util/parse-events.y ++++ b/tools/perf/util/parse-events.y +@@ -255,7 +255,7 @@ PE_PMU_EVENT_PRE '-' PE_PMU_EVENT_SUF se + list_add_tail(&term->list, head); + + ALLOC_LIST(list); +- ABORT_ON(parse_events_add_pmu(list, &data->idx, "cpu", head)); ++ ABORT_ON(parse_events_add_pmu(data, list, "cpu", head)); + parse_events__free_terms(head); + $$ = list; + } diff --git a/queue-4.2/perf-x86-intel-fix-constraint-access.patch b/queue-4.2/perf-x86-intel-fix-constraint-access.patch new file mode 100644 index 00000000000..7ffdfc5c500 --- /dev/null +++ b/queue-4.2/perf-x86-intel-fix-constraint-access.patch @@ -0,0 +1,42 @@ +From ebfb4988f0378e2ac3b4a0aa1ea20d724293f392 Mon Sep 17 00:00:00 2001 +From: Peter Zijlstra +Date: Thu, 10 Sep 2015 11:58:27 +0200 +Subject: perf/x86/intel: Fix constraint access + +From: Peter Zijlstra + +commit ebfb4988f0378e2ac3b4a0aa1ea20d724293f392 upstream. + +Sasha reported that we can get here with .idx==-1, and +cpuc->event_constraints unallocated. + +Suggested-by: Stephane Eranian +Reported-by: Sasha Levin +Signed-off-by: Peter Zijlstra (Intel) +Cc: Linus Torvalds +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Fixes: b371b5943178 ("perf/x86: Fix event/group validation") +Signed-off-by: Ingo Molnar +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/cpu/perf_event_intel.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/arch/x86/kernel/cpu/perf_event_intel.c ++++ b/arch/x86/kernel/cpu/perf_event_intel.c +@@ -2102,9 +2102,12 @@ static struct event_constraint * + intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx, + struct perf_event *event) + { +- struct event_constraint *c1 = cpuc->event_constraint[idx]; ++ struct event_constraint *c1 = NULL; + struct event_constraint *c2; + ++ if (idx >= 0) /* fake does < 0 */ ++ c1 = cpuc->event_constraint[idx]; ++ + /* + * first time only + * - static constraint: no change across incremental scheduling calls diff --git a/queue-4.2/sched-access-local-runqueue-directly-in-single_task_running.patch b/queue-4.2/sched-access-local-runqueue-directly-in-single_task_running.patch new file mode 100644 index 00000000000..a0bfd59c198 --- /dev/null +++ b/queue-4.2/sched-access-local-runqueue-directly-in-single_task_running.patch @@ -0,0 +1,61 @@ +From 00cc1633816de8c95f337608a1ea64e228faf771 Mon Sep 17 00:00:00 2001 +From: Dominik Dingel +Date: Fri, 18 Sep 2015 11:27:45 +0200 +Subject: sched: access local runqueue directly in single_task_running + +From: Dominik Dingel + +commit 00cc1633816de8c95f337608a1ea64e228faf771 upstream. + +Commit 2ee507c47293 ("sched: Add function single_task_running to let a task +check if it is the only task running on a cpu") referenced the current +runqueue with the smp_processor_id. When CONFIG_DEBUG_PREEMPT is enabled, +that is only allowed if preemption is disabled or the currrent task is +bound to the local cpu (e.g. kernel worker). + +With commit f78195129963 ("kvm: add halt_poll_ns module parameter") KVM +calls single_task_running. If CONFIG_DEBUG_PREEMPT is enabled that +generates a lot of kernel messages. + +To avoid adding preemption in that cases, as it would limit the usefulness, +we change single_task_running to access directly the cpu local runqueue. + +Cc: Tim Chen +Suggested-by: Peter Zijlstra +Acked-by: Peter Zijlstra (Intel) +Fixes: 2ee507c472939db4b146d545352b8a7c79ef47f8 +Signed-off-by: Dominik Dingel +Signed-off-by: Paolo Bonzini +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/sched/core.c | 15 +++++++++++---- + 1 file changed, 11 insertions(+), 4 deletions(-) + +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -2614,13 +2614,20 @@ unsigned long nr_running(void) + + /* + * Check if only the current task is running on the cpu. ++ * ++ * Caution: this function does not check that the caller has disabled ++ * preemption, thus the result might have a time-of-check-to-time-of-use ++ * race. The caller is responsible to use it correctly, for example: ++ * ++ * - from a non-preemptable section (of course) ++ * ++ * - from a thread that is bound to a single CPU ++ * ++ * - in a loop with very short iterations (e.g. a polling loop) + */ + bool single_task_running(void) + { +- if (cpu_rq(smp_processor_id())->nr_running == 1) +- return true; +- else +- return false; ++ return raw_rq()->nr_running == 1; + } + EXPORT_SYMBOL(single_task_running); + diff --git a/queue-4.2/series b/queue-4.2/series index e23f733741f..45974f6b62a 100644 --- a/queue-4.2/series +++ b/queue-4.2/series @@ -19,3 +19,32 @@ target-attach-extended_copy-local-i-o-descriptors-to-xcopy_pt_sess.patch target-fix-pr-registration-aptpl-rcu-conversion-regression.patch iser-target-remove-command-with-state-istate_remove.patch iser-target-put-the-reference-on-commands-waiting-for-unsol-data.patch +toshiba_acpi-fix-hotkeys-registration-on-some-toshiba-models.patch +perf-x86-intel-fix-constraint-access.patch +locking-qspinlock-x86-fix-performance-regression-under-unaccelerated-vms.patch +locking-qspinlock-x86-only-emit-the-test-and-set-fallback-when-building-guest-support.patch +perf-tools-fix-copying-of-proc-kcore.patch +arm-8401-1-perf-set-affinity-for-ppi-based-pmus.patch +perf-hists-update-the-column-width-for-the-srcline-sort-key.patch +perf-stat-get-correct-cpu-id-for-print_aggr.patch +perf-tools-add-missing-forward-declaration-of-struct-map-to-probe-event.h.patch +perf-tools-add-empty-build-files-for-architectures-lacking-them.patch +perf-tools-fix-parse_events_add_pmu-caller.patch +perf-header-fixup-reading-of-header_nrcpus-feature.patch +perf-probe-use-existing-routine-to-look-for-a-kernel-module-by-dso-short_name.patch +arcv2-reduce-clk-for-smp-fpga-configs.patch +watchdog-sunxi-fix-activation-of-system-reset.patch +watchdog-imgpdc-unregister-restart-handler-on-remove.patch +sched-access-local-runqueue-directly-in-single_task_running.patch +hwmon-nct6775-swap-step_up_time-and-step_down_time-registers-for-most-chips.patch +arm-fix-thumb2-signal-handling-when-armv6-is-enabled.patch +arm-8429-1-disable-gcc-sra-optimization.patch +windfarm-decrement-client-count-when-unregistering.patch +arm-8425-1-kgdb-don-t-try-to-stop-the-machine-when-setting-breakpoints.patch +arm-dts-omap5-uevm.dts-fix-i2c5-pinctrl-offsets.patch +arm-dts-omap3-beagle-make-i2c3-ddc-and-tfp410-gpio-work-again.patch +arm-pxa-ssp-fix-build-error-by-removing-originally-incorrect-dt-binding.patch +arm-exynos-reset-little-cores-when-cpu-is-up.patch +arm-dts-sunxi-raise-minimum-cpu-voltage-for-sun7i-a20-to-meet-soc-specifications.patch +arm-dts-fix-wrong-clock-binding-for-sysmmu_fimd1_1-on-exynos5420.patch +arm-dts-fix-usb-pin-control-for-imx-rex-dts.patch diff --git a/queue-4.2/toshiba_acpi-fix-hotkeys-registration-on-some-toshiba-models.patch b/queue-4.2/toshiba_acpi-fix-hotkeys-registration-on-some-toshiba-models.patch new file mode 100644 index 00000000000..b4651fe02ad --- /dev/null +++ b/queue-4.2/toshiba_acpi-fix-hotkeys-registration-on-some-toshiba-models.patch @@ -0,0 +1,49 @@ +From 53147b6cabee5e8d1997b5682fcc0c3b72ddf9c2 Mon Sep 17 00:00:00 2001 +From: Azael Avalos +Date: Wed, 9 Sep 2015 11:25:45 -0600 +Subject: toshiba_acpi: Fix hotkeys registration on some toshiba models + +From: Azael Avalos + +commit 53147b6cabee5e8d1997b5682fcc0c3b72ddf9c2 upstream. + +Commit a2b3471b5b13 ("toshiba_acpi: Use the Hotkey Event Type function +for keymap choosing") changed the *setup_keyboard function to query for +the Hotkey Event Type to help choose the correct keymap, but turns out +that here are certain Toshiba models out there not implementing this +feature, and thus, failing to continue the input device registration and +leaving such laptops without hotkey support. + +This patch changes such check, and instead of returning an error if +the Hotkey Event Type is not present, we simply inform userspace about it, +changing the message printed from err to notice, making the function +responsible for registering the input device to continue. + +This issue was found on a Toshiba Portege Z30-B, but there might be +some other models out there affected by this regression as well. + +Signed-off-by: Azael Avalos +Signed-off-by: Darren Hart +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/platform/x86/toshiba_acpi.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +--- a/drivers/platform/x86/toshiba_acpi.c ++++ b/drivers/platform/x86/toshiba_acpi.c +@@ -2408,11 +2408,9 @@ static int toshiba_acpi_setup_keyboard(s + if (error) + return error; + +- error = toshiba_hotkey_event_type_get(dev, &events_type); +- if (error) { +- pr_err("Unable to query Hotkey Event Type\n"); +- return error; +- } ++ if (toshiba_hotkey_event_type_get(dev, &events_type)) ++ pr_notice("Unable to query Hotkey Event Type\n"); ++ + dev->hotkey_event_type = events_type; + + dev->hotkey_dev = input_allocate_device(); diff --git a/queue-4.2/watchdog-imgpdc-unregister-restart-handler-on-remove.patch b/queue-4.2/watchdog-imgpdc-unregister-restart-handler-on-remove.patch new file mode 100644 index 00000000000..75faf1ec608 --- /dev/null +++ b/queue-4.2/watchdog-imgpdc-unregister-restart-handler-on-remove.patch @@ -0,0 +1,33 @@ +From 8a340dbbc4b10fe07a924e91979bfc93e966dd65 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia +Date: Thu, 23 Jul 2015 17:21:16 -0300 +Subject: watchdog: imgpdc: Unregister restart handler on remove + +From: Ezequiel Garcia + +commit 8a340dbbc4b10fe07a924e91979bfc93e966dd65 upstream. + +Commit c631f20068 ("watchdog: imgpdc: Add reboot support") introduced +a restart handler but forgot to unregister it on driver removal. Fix it. + +Fixes: c631f20068 ("watchdog: imgpdc: Add reboot support") +Reported-by: Ariel D'Alessandro +Signed-off-by: Ezequiel Garcia +Reviewed-by: Guenter Roeck +Signed-off-by: Wim Van Sebroeck +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/watchdog/imgpdc_wdt.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/watchdog/imgpdc_wdt.c ++++ b/drivers/watchdog/imgpdc_wdt.c +@@ -316,6 +316,7 @@ static int pdc_wdt_remove(struct platfor + { + struct pdc_wdt_dev *pdc_wdt = platform_get_drvdata(pdev); + ++ unregister_restart_handler(&pdc_wdt->restart_handler); + pdc_wdt_stop(&pdc_wdt->wdt_dev); + watchdog_unregister_device(&pdc_wdt->wdt_dev); + clk_disable_unprepare(pdc_wdt->wdt_clk); diff --git a/queue-4.2/watchdog-sunxi-fix-activation-of-system-reset.patch b/queue-4.2/watchdog-sunxi-fix-activation-of-system-reset.patch new file mode 100644 index 00000000000..7a461fd5df1 --- /dev/null +++ b/queue-4.2/watchdog-sunxi-fix-activation-of-system-reset.patch @@ -0,0 +1,37 @@ +From 0919e4445190da18496d31aac08b90828a47d45f Mon Sep 17 00:00:00 2001 +From: Francesco Lavra +Date: Sat, 25 Jul 2015 08:25:18 +0200 +Subject: watchdog: sunxi: fix activation of system reset + +From: Francesco Lavra + +commit 0919e4445190da18496d31aac08b90828a47d45f upstream. + +Commit f2147de33470 ("watchdog: sunxi: support parameterized compatible +strings") introduced a regression in sunxi_wdt_start(), by which +the system reset function of the watchdog is not enabled upon +starting the watchdog. As a result, the system is not reset when the +watchdog expires. Fix it. + +Fixes: f2147de33470 ("watchdog: sunxi: support parameterized compatible strings") +Signed-off-by: Francesco Lavra +Acked-by: Maxime Ripard +Reviewed-by: Guenter Roeck +Signed-off-by: Wim Van Sebroeck +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/watchdog/sunxi_wdt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/watchdog/sunxi_wdt.c ++++ b/drivers/watchdog/sunxi_wdt.c +@@ -184,7 +184,7 @@ static int sunxi_wdt_start(struct watchd + /* Set system reset function */ + reg = readl(wdt_base + regs->wdt_cfg); + reg &= ~(regs->wdt_reset_mask); +- reg |= ~(regs->wdt_reset_val); ++ reg |= regs->wdt_reset_val; + writel(reg, wdt_base + regs->wdt_cfg); + + /* Enable watchdog */ diff --git a/queue-4.2/windfarm-decrement-client-count-when-unregistering.patch b/queue-4.2/windfarm-decrement-client-count-when-unregistering.patch new file mode 100644 index 00000000000..1991674c027 --- /dev/null +++ b/queue-4.2/windfarm-decrement-client-count-when-unregistering.patch @@ -0,0 +1,34 @@ +From fe2b592173ff0274e70dc44d1d28c19bb995aa7c Mon Sep 17 00:00:00 2001 +From: Paul Bolle +Date: Fri, 31 Jul 2015 14:08:58 +0200 +Subject: windfarm: decrement client count when unregistering + +From: Paul Bolle + +commit fe2b592173ff0274e70dc44d1d28c19bb995aa7c upstream. + +wf_unregister_client() increments the client count when a client +unregisters. That is obviously incorrect. Decrement that client count +instead. + +Fixes: 75722d3992f5 ("[PATCH] ppc64: Thermal control for SMU based machines") + +Signed-off-by: Paul Bolle +Signed-off-by: Michael Ellerman +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/macintosh/windfarm_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/macintosh/windfarm_core.c ++++ b/drivers/macintosh/windfarm_core.c +@@ -435,7 +435,7 @@ int wf_unregister_client(struct notifier + { + mutex_lock(&wf_lock); + blocking_notifier_chain_unregister(&wf_client_list, nb); +- wf_client_count++; ++ wf_client_count--; + if (wf_client_count == 0) + wf_stop_thread(); + mutex_unlock(&wf_lock);