From: Greg Kroah-Hartman Date: Fri, 25 May 2012 05:31:02 +0000 (+0900) Subject: 3.0-stable patches X-Git-Tag: v3.0.33~17 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=a91067750a6fe0bf0747c5f9303636ff4e0cf3ac;p=thirdparty%2Fkernel%2Fstable-queue.git 3.0-stable patches added patches: drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch --- diff --git a/queue-3.0/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch b/queue-3.0/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch new file mode 100644 index 00000000000..b9ebcfff54e --- /dev/null +++ b/queue-3.0/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch @@ -0,0 +1,49 @@ +From a9dcf84b14ef4e9a609910367576995e6f32f3dc Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Sun, 13 May 2012 22:29:25 +0200 +Subject: drm/i915: don't clobber the pipe param in sanitize_modesetting + +From: Daniel Vetter + +commit a9dcf84b14ef4e9a609910367576995e6f32f3dc upstream. + +... we need it later on in the function to clean up pipe <-> plane +associations. This regression has been introduced in + +commit f47166d2b0001fcb752b40c5a2d4db986dfbea68 +Author: Chris Wilson +Date: Thu Mar 22 15:00:50 2012 +0000 + + drm/i915: Sanitize BIOS debugging bits from PIPECONF + +Spotted by staring at debug output of an (as it turns out) totally +unrelated bug. + +v2: I've totally failed to do the s/pipe/i/ correctly, spotted by +Chris Wilson. + +Reviewed-by: Chris Wilson +Reviewed-by: Eugeni Dodonov +Signed-Off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -6579,10 +6579,11 @@ static void intel_sanitize_modesetting(s + { + struct drm_i915_private *dev_priv = dev->dev_private; + u32 reg, val; ++ int i; + + /* Clear any frame start delays used for debugging left by the BIOS */ +- for_each_pipe(pipe) { +- reg = PIPECONF(pipe); ++ for_each_pipe(i) { ++ reg = PIPECONF(i); + I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); + } + diff --git a/queue-3.0/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch b/queue-3.0/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch new file mode 100644 index 00000000000..21b7c8a191c --- /dev/null +++ b/queue-3.0/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch @@ -0,0 +1,95 @@ +From a1e969e0332de7a430e62822cee8f2ec8d83cd7c Mon Sep 17 00:00:00 2001 +From: Ben Widawsky +Date: Sat, 14 Apr 2012 18:41:32 -0700 +Subject: drm/i915: [GEN7] Use HW scheduler for fixed function shaders + +From: Ben Widawsky + +commit a1e969e0332de7a430e62822cee8f2ec8d83cd7c upstream. + +This originally started as a patch from Bernard as a way of simply +setting the VS scheduler. After submitting the RFC patch, we decided to +also modify the DS scheduler. To be most explicit, I've made the patch +explicitly set all scheduler modes, and included the defines for other +modes (in case someone feels frisky later). + +The rest of the story gets a bit weird. The first version of the patch +showed an almost unbelievable performance improvement. Since rebasing my +branch it appears the performance improvement has gone, unfortunately. +But setting these bits seem to be the right thing to do given that the +docs describe corruption that can occur with the default settings. + +In summary, I am seeing no more perf improvements (or regressions) in my +limited testing, but we believe this should be set to prevent rendering +corruption, therefore cc stable. + +v1: Clear bit 4 also (Ken + Eugeni) +Do a full clear + set of the bits we want (Me). + +Cc: Bernard Kilarski +Reviewed-by (RFC): Kenneth Graunke +Signed-off-by: Ben Widawsky +Reviewed-by: Eugeni Dodonov +Reviewed-by: Kenneth Graunke +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_reg.h | 15 +++++++++++++++ + drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++++ + 2 files changed, 29 insertions(+) + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -537,6 +537,21 @@ + + #define GEN6_BSD_RNCID 0x12198 + ++#define GEN7_FF_THREAD_MODE 0x20a0 ++#define GEN7_FF_SCHED_MASK 0x0077070 ++#define GEN7_FF_TS_SCHED_HS1 (0x5<<16) ++#define GEN7_FF_TS_SCHED_HS0 (0x3<<16) ++#define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) ++#define GEN7_FF_TS_SCHED_HW (0x0<<16) /* Default */ ++#define GEN7_FF_VS_SCHED_HS1 (0x5<<12) ++#define GEN7_FF_VS_SCHED_HS0 (0x3<<12) ++#define GEN7_FF_VS_SCHED_LOAD_BALANCE (0x1<<12) /* Default */ ++#define GEN7_FF_VS_SCHED_HW (0x0<<12) ++#define GEN7_FF_DS_SCHED_HS1 (0x5<<4) ++#define GEN7_FF_DS_SCHED_HS0 (0x3<<4) ++#define GEN7_FF_DS_SCHED_LOAD_BALANCE (0x1<<4) /* Default */ ++#define GEN7_FF_DS_SCHED_HW (0x0<<4) ++ + /* + * Framebuffer compression (915+ only) + */ +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -7451,6 +7451,18 @@ static void gen6_init_clock_gating(struc + DISPPLANE_TRICKLE_FEED_DISABLE); + } + ++static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) ++{ ++ uint32_t reg = I915_READ(GEN7_FF_THREAD_MODE); ++ ++ reg &= ~GEN7_FF_SCHED_MASK; ++ reg |= GEN7_FF_TS_SCHED_HW; ++ reg |= GEN7_FF_VS_SCHED_HW; ++ reg |= GEN7_FF_DS_SCHED_HW; ++ ++ I915_WRITE(GEN7_FF_THREAD_MODE, reg); ++} ++ + static void ivybridge_init_clock_gating(struct drm_device *dev) + { + struct drm_i915_private *dev_priv = dev->dev_private; +@@ -7597,6 +7609,8 @@ static void ironlake_teardown_rc6(struct + drm_gem_object_unreference(&dev_priv->pwrctx->base); + dev_priv->pwrctx = NULL; + } ++ ++ gen7_setup_fixed_func_scheduler(dev_priv); + } + + static void ironlake_disable_rc6(struct drm_device *dev) diff --git a/queue-3.0/series b/queue-3.0/series index 6b4e61a28a4..21029573ee4 100644 --- a/queue-3.0/series +++ b/queue-3.0/series @@ -44,3 +44,5 @@ xhci-reset-reserved-command-ring-trbs-on-cleanup.patch xhci-add-new-short-tx-quirk-for-fresco-logic-host.patch usbcore-enable-usb2-lpm-if-port-suspend-fails.patch drm-i915-avoid-a-double-read-of-pch_iir-during-interrupt-handling.patch +drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch +drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch