From: Jian Shen Date: Sat, 19 Oct 2019 08:03:56 +0000 (+0800) Subject: net: hns3: log and clear hardware error after reset complete X-Git-Tag: v5.4.7~270 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=ac3c43145dc876e9af31ca63aa47057c8b575691;p=thirdparty%2Fkernel%2Fstable.git net: hns3: log and clear hardware error after reset complete [ Upstream commit 4fdd0bca6152aa201898454e63cbb255a18ae6e9 ] When device is resetting, the CMDQ service may be stopped until reset completed. If a new RAS error occurs at this moment, it will no be able to clear the RAS source. This patch fixes it by clear the RAS source after reset complete. Signed-off-by: Jian Shen Signed-off-by: Huazhong Tan Signed-off-by: David S. Miller Signed-off-by: Sasha Levin --- diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index c052bb33b3d34..162881005a6df 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -9443,6 +9443,9 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) return ret; } + /* Log and clear the hw errors those already occurred */ + hclge_handle_all_hns_hw_errors(ae_dev); + /* Re-enable the hw error interrupts because * the interrupts get disabled on global reset. */