From: Alexandre Oliva <oliva@adacore.com>
Date: Sat, 14 Jan 2023 00:15:41 +0000 (-0300)
Subject: [PR40457] [arm] expand SI-aligned movdi into pair of movsi
X-Git-Tag: basepoints/gcc-14~2047
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=acddf6665f067bc98a2529a699b1d4509a7387cb;p=thirdparty%2Fgcc.git

[PR40457] [arm] expand SI-aligned movdi into pair of movsi

When expanding a misaligned DImode move, emit aligned SImode moves if
the parts are sufficiently aligned.  This enables neighboring stores
to be peephole-combined into stm, as expected by the PR40457 testcase,
even after SLP vectorizes the originally aligned SImode stores into a
misaligned DImode store.


for  gcc/ChangeLog

	PR target/40457
	* config/arm/arm.md (movmisaligndi): Prefer aligned SImode
	moves.
---

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 31dfea10af12..3710c5cac56b 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12783,8 +12783,16 @@
   rtx hi_op0 = gen_highpart_mode (SImode, DImode, operands[0]);
   rtx hi_op1 = gen_highpart_mode (SImode, DImode, operands[1]);
 
-  emit_insn (gen_movmisalignsi (lo_op0, lo_op1));
-  emit_insn (gen_movmisalignsi (hi_op0, hi_op1));
+  if (aligned_operand (lo_op0, SImode) && aligned_operand (lo_op1, SImode))
+    {
+      emit_move_insn (lo_op0, lo_op1);
+      emit_move_insn (hi_op0, hi_op1);
+    }
+  else
+    {
+      emit_insn (gen_movmisalignsi (lo_op0, lo_op1));
+      emit_insn (gen_movmisalignsi (hi_op0, hi_op1));
+    }
   DONE;
 })