From: Greg Kroah-Hartman Date: Tue, 5 Mar 2024 11:30:23 +0000 (+0000) Subject: drop riscv patch from 5.10 and 5.15 X-Git-Tag: v4.19.309~2 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=b6dba5d17333eb8b7b308b45ca4ed4f3c0ab84e6;p=thirdparty%2Fkernel%2Fstable-queue.git drop riscv patch from 5.10 and 5.15 --- diff --git a/queue-5.10/riscv-add-caller_addrx-support.patch b/queue-5.10/riscv-add-caller_addrx-support.patch deleted file mode 100644 index 1b922edbb3a..00000000000 --- a/queue-5.10/riscv-add-caller_addrx-support.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 680341382da56bd192ebfa4e58eaf4fec2e5bca7 Mon Sep 17 00:00:00 2001 -From: Zong Li -Date: Fri, 2 Feb 2024 01:51:02 +0000 -Subject: riscv: add CALLER_ADDRx support - -From: Zong Li - -commit 680341382da56bd192ebfa4e58eaf4fec2e5bca7 upstream. - -CALLER_ADDRx returns caller's address at specified level, they are used -for several tracers. These macros eventually use -__builtin_return_address(n) to get the caller's address if arch doesn't -define their own implementation. - -In RISC-V, __builtin_return_address(n) only works when n == 0, we need -to walk the stack frame to get the caller's address at specified level. - -data.level started from 'level + 3' due to the call flow of getting -caller's address in RISC-V implementation. If we don't have additional -three iteration, the level is corresponding to follows: - -callsite -> return_address -> arch_stack_walk -> walk_stackframe -| | | | -level 3 level 2 level 1 level 0 - -Fixes: 10626c32e382 ("riscv/ftrace: Add basic support") -Cc: stable@vger.kernel.org -Reviewed-by: Alexandre Ghiti -Signed-off-by: Zong Li -Link: https://lore.kernel.org/r/20240202015102.26251-1-zong.li@sifive.com -Signed-off-by: Palmer Dabbelt -Signed-off-by: Greg Kroah-Hartman ---- - arch/riscv/include/asm/ftrace.h | 5 +++ - arch/riscv/kernel/Makefile | 2 + - arch/riscv/kernel/return_address.c | 48 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 55 insertions(+) - create mode 100644 arch/riscv/kernel/return_address.c - ---- a/arch/riscv/include/asm/ftrace.h -+++ b/arch/riscv/include/asm/ftrace.h -@@ -25,6 +25,11 @@ - - #define ARCH_SUPPORTS_FTRACE_OPS 1 - #ifndef __ASSEMBLY__ -+ -+extern void *return_address(unsigned int level); -+ -+#define ftrace_return_address(n) return_address(n) -+ - void MCOUNT_NAME(void); - static inline unsigned long ftrace_call_adjust(unsigned long addr) - { ---- a/arch/riscv/kernel/Makefile -+++ b/arch/riscv/kernel/Makefile -@@ -7,6 +7,7 @@ ifdef CONFIG_FTRACE - CFLAGS_REMOVE_ftrace.o = $(CC_FLAGS_FTRACE) - CFLAGS_REMOVE_patch.o = $(CC_FLAGS_FTRACE) - CFLAGS_REMOVE_sbi.o = $(CC_FLAGS_FTRACE) -+CFLAGS_REMOVE_return_address.o = $(CC_FLAGS_FTRACE) - endif - - extra-y += head.o -@@ -20,6 +21,7 @@ obj-y += irq.o - obj-y += process.o - obj-y += ptrace.o - obj-y += reset.o -+obj-y += return_address.o - obj-y += setup.o - obj-y += signal.o - obj-y += syscall_table.o ---- /dev/null -+++ b/arch/riscv/kernel/return_address.c -@@ -0,0 +1,48 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * This code come from arch/arm64/kernel/return_address.c -+ * -+ * Copyright (C) 2023 SiFive. -+ */ -+ -+#include -+#include -+#include -+ -+struct return_address_data { -+ unsigned int level; -+ void *addr; -+}; -+ -+static bool save_return_addr(void *d, unsigned long pc) -+{ -+ struct return_address_data *data = d; -+ -+ if (!data->level) { -+ data->addr = (void *)pc; -+ return false; -+ } -+ -+ --data->level; -+ -+ return true; -+} -+NOKPROBE_SYMBOL(save_return_addr); -+ -+noinline void *return_address(unsigned int level) -+{ -+ struct return_address_data data; -+ -+ data.level = level + 3; -+ data.addr = NULL; -+ -+ arch_stack_walk(save_return_addr, &data, current, NULL); -+ -+ if (!data.level) -+ return data.addr; -+ else -+ return NULL; -+ -+} -+EXPORT_SYMBOL_GPL(return_address); -+NOKPROBE_SYMBOL(return_address); diff --git a/queue-5.10/series b/queue-5.10/series index bd261a5fc8b..e0211579791 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -28,7 +28,6 @@ dmaengine-fsl-qdma-init-irq-after-reg-initialization.patch mmc-core-fix-emmc-initialization-with-1-bit-bus-connection.patch mmc-sdhci-xenon-add-timeout-for-phy-init-complete.patch mmc-sdhci-xenon-fix-phy-init-clock-stability.patch -riscv-add-caller_addrx-support.patch pmdomain-qcom-rpmhpd-fix-enabled_corner-aggregation.patch x86-cpu-intel-detect-tme-keyid-bits-before-setting-mtrr-mask-registers.patch mptcp-fix-possible-deadlock-in-subflow-diag.patch diff --git a/queue-5.15/riscv-add-caller_addrx-support.patch b/queue-5.15/riscv-add-caller_addrx-support.patch deleted file mode 100644 index 6cc3e9779be..00000000000 --- a/queue-5.15/riscv-add-caller_addrx-support.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 680341382da56bd192ebfa4e58eaf4fec2e5bca7 Mon Sep 17 00:00:00 2001 -From: Zong Li -Date: Fri, 2 Feb 2024 01:51:02 +0000 -Subject: riscv: add CALLER_ADDRx support - -From: Zong Li - -commit 680341382da56bd192ebfa4e58eaf4fec2e5bca7 upstream. - -CALLER_ADDRx returns caller's address at specified level, they are used -for several tracers. These macros eventually use -__builtin_return_address(n) to get the caller's address if arch doesn't -define their own implementation. - -In RISC-V, __builtin_return_address(n) only works when n == 0, we need -to walk the stack frame to get the caller's address at specified level. - -data.level started from 'level + 3' due to the call flow of getting -caller's address in RISC-V implementation. If we don't have additional -three iteration, the level is corresponding to follows: - -callsite -> return_address -> arch_stack_walk -> walk_stackframe -| | | | -level 3 level 2 level 1 level 0 - -Fixes: 10626c32e382 ("riscv/ftrace: Add basic support") -Cc: stable@vger.kernel.org -Reviewed-by: Alexandre Ghiti -Signed-off-by: Zong Li -Link: https://lore.kernel.org/r/20240202015102.26251-1-zong.li@sifive.com -Signed-off-by: Palmer Dabbelt -Signed-off-by: Greg Kroah-Hartman ---- - arch/riscv/include/asm/ftrace.h | 5 +++ - arch/riscv/kernel/Makefile | 2 + - arch/riscv/kernel/return_address.c | 48 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 55 insertions(+) - create mode 100644 arch/riscv/kernel/return_address.c - ---- a/arch/riscv/include/asm/ftrace.h -+++ b/arch/riscv/include/asm/ftrace.h -@@ -25,6 +25,11 @@ - - #define ARCH_SUPPORTS_FTRACE_OPS 1 - #ifndef __ASSEMBLY__ -+ -+extern void *return_address(unsigned int level); -+ -+#define ftrace_return_address(n) return_address(n) -+ - void MCOUNT_NAME(void); - static inline unsigned long ftrace_call_adjust(unsigned long addr) - { ---- a/arch/riscv/kernel/Makefile -+++ b/arch/riscv/kernel/Makefile -@@ -7,6 +7,7 @@ ifdef CONFIG_FTRACE - CFLAGS_REMOVE_ftrace.o = $(CC_FLAGS_FTRACE) - CFLAGS_REMOVE_patch.o = $(CC_FLAGS_FTRACE) - CFLAGS_REMOVE_sbi.o = $(CC_FLAGS_FTRACE) -+CFLAGS_REMOVE_return_address.o = $(CC_FLAGS_FTRACE) - endif - CFLAGS_syscall_table.o += $(call cc-option,-Wno-override-init,) - -@@ -25,6 +26,7 @@ obj-y += irq.o - obj-y += process.o - obj-y += ptrace.o - obj-y += reset.o -+obj-y += return_address.o - obj-y += setup.o - obj-y += signal.o - obj-y += syscall_table.o ---- /dev/null -+++ b/arch/riscv/kernel/return_address.c -@@ -0,0 +1,48 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * This code come from arch/arm64/kernel/return_address.c -+ * -+ * Copyright (C) 2023 SiFive. -+ */ -+ -+#include -+#include -+#include -+ -+struct return_address_data { -+ unsigned int level; -+ void *addr; -+}; -+ -+static bool save_return_addr(void *d, unsigned long pc) -+{ -+ struct return_address_data *data = d; -+ -+ if (!data->level) { -+ data->addr = (void *)pc; -+ return false; -+ } -+ -+ --data->level; -+ -+ return true; -+} -+NOKPROBE_SYMBOL(save_return_addr); -+ -+noinline void *return_address(unsigned int level) -+{ -+ struct return_address_data data; -+ -+ data.level = level + 3; -+ data.addr = NULL; -+ -+ arch_stack_walk(save_return_addr, &data, current, NULL); -+ -+ if (!data.level) -+ return data.addr; -+ else -+ return NULL; -+ -+} -+EXPORT_SYMBOL_GPL(return_address); -+NOKPROBE_SYMBOL(return_address); diff --git a/queue-5.15/series b/queue-5.15/series index 7a50e463290..6b2b8eb570d 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -55,7 +55,6 @@ dmaengine-fsl-qdma-init-irq-after-reg-initialization.patch mmc-core-fix-emmc-initialization-with-1-bit-bus-connection.patch mmc-sdhci-xenon-add-timeout-for-phy-init-complete.patch mmc-sdhci-xenon-fix-phy-init-clock-stability.patch -riscv-add-caller_addrx-support.patch pmdomain-qcom-rpmhpd-fix-enabled_corner-aggregation.patch x86-cpu-intel-detect-tme-keyid-bits-before-setting-mtrr-mask-registers.patch mptcp-move-__mptcp_error_report-in-protocol.c.patch