From: Greg Kroah-Hartman Date: Sat, 13 Aug 2022 14:40:24 +0000 (+0200) Subject: 5.10-stable patches X-Git-Tag: v5.15.61~151 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=b7c73f1662fda09d935baf8d9882f4c3c168f562;p=thirdparty%2Fkernel%2Fstable-queue.git 5.10-stable patches added patches: mips-cpuinfo-fix-a-warning-for-config_cpumask_offstack.patch powerpc-fsl-pci-fix-class-code-of-pcie-root-port.patch powerpc-powernv-avoid-crashing-if-rng-is-null.patch powerpc-ptdump-fix-display-of-rw-pages-on-fsl_book3e.patch --- diff --git a/queue-5.10/mips-cpuinfo-fix-a-warning-for-config_cpumask_offstack.patch b/queue-5.10/mips-cpuinfo-fix-a-warning-for-config_cpumask_offstack.patch new file mode 100644 index 00000000000..903e71e619d --- /dev/null +++ b/queue-5.10/mips-cpuinfo-fix-a-warning-for-config_cpumask_offstack.patch @@ -0,0 +1,63 @@ +From e1a534f5d074db45ae5cbac41d8912b98e96a006 Mon Sep 17 00:00:00 2001 +From: Huacai Chen +Date: Thu, 14 Jul 2022 16:41:34 +0800 +Subject: MIPS: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK + +From: Huacai Chen + +commit e1a534f5d074db45ae5cbac41d8912b98e96a006 upstream. + +When CONFIG_CPUMASK_OFFSTACK and CONFIG_DEBUG_PER_CPU_MAPS is selected, +cpu_max_bits_warn() generates a runtime warning similar as below while +we show /proc/cpuinfo. Fix this by using nr_cpu_ids (the runtime limit) +instead of NR_CPUS to iterate CPUs. + +[ 3.052463] ------------[ cut here ]------------ +[ 3.059679] WARNING: CPU: 3 PID: 1 at include/linux/cpumask.h:108 show_cpuinfo+0x5e8/0x5f0 +[ 3.070072] Modules linked in: efivarfs autofs4 +[ 3.076257] CPU: 0 PID: 1 Comm: systemd Not tainted 5.19-rc5+ #1052 +[ 3.084034] Hardware name: Loongson Loongson-3A4000-7A1000-1w-V0.1-CRB/Loongson-LS3A4000-7A1000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V2.0.04082-beta7 04/27 +[ 3.099465] Stack : 9000000100157b08 9000000000f18530 9000000000cf846c 9000000100154000 +[ 3.109127] 9000000100157a50 0000000000000000 9000000100157a58 9000000000ef7430 +[ 3.118774] 90000001001578e8 0000000000000040 0000000000000020 ffffffffffffffff +[ 3.128412] 0000000000aaaaaa 1ab25f00eec96a37 900000010021de80 900000000101c890 +[ 3.138056] 0000000000000000 0000000000000000 0000000000000000 0000000000aaaaaa +[ 3.147711] ffff8000339dc220 0000000000000001 0000000006ab4000 0000000000000000 +[ 3.157364] 900000000101c998 0000000000000004 9000000000ef7430 0000000000000000 +[ 3.167012] 0000000000000009 000000000000006c 0000000000000000 0000000000000000 +[ 3.176641] 9000000000d3de08 9000000001639390 90000000002086d8 00007ffff0080286 +[ 3.186260] 00000000000000b0 0000000000000004 0000000000000000 0000000000071c1c +[ 3.195868] ... +[ 3.199917] Call Trace: +[ 3.203941] [<98000000002086d8>] show_stack+0x38/0x14c +[ 3.210666] [<9800000000cf846c>] dump_stack_lvl+0x60/0x88 +[ 3.217625] [<980000000023d268>] __warn+0xd0/0x100 +[ 3.223958] [<9800000000cf3c90>] warn_slowpath_fmt+0x7c/0xcc +[ 3.231150] [<9800000000210220>] show_cpuinfo+0x5e8/0x5f0 +[ 3.238080] [<98000000004f578c>] seq_read_iter+0x354/0x4b4 +[ 3.245098] [<98000000004c2e90>] new_sync_read+0x17c/0x1c4 +[ 3.252114] [<98000000004c5174>] vfs_read+0x138/0x1d0 +[ 3.258694] [<98000000004c55f8>] ksys_read+0x70/0x100 +[ 3.265265] [<9800000000cfde9c>] do_syscall+0x7c/0x94 +[ 3.271820] [<9800000000202fe4>] handle_syscall+0xc4/0x160 +[ 3.281824] ---[ end trace 8b484262b4b8c24c ]--- + +Cc: stable@vger.kernel.org +Signed-off-by: Huacai Chen +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/kernel/proc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/kernel/proc.c ++++ b/arch/mips/kernel/proc.c +@@ -172,7 +172,7 @@ static void *c_start(struct seq_file *m, + { + unsigned long i = *pos; + +- return i < NR_CPUS ? (void *) (i + 1) : NULL; ++ return i < nr_cpu_ids ? (void *) (i + 1) : NULL; + } + + static void *c_next(struct seq_file *m, void *v, loff_t *pos) diff --git a/queue-5.10/powerpc-fsl-pci-fix-class-code-of-pcie-root-port.patch b/queue-5.10/powerpc-fsl-pci-fix-class-code-of-pcie-root-port.patch new file mode 100644 index 00000000000..766e7182ea0 --- /dev/null +++ b/queue-5.10/powerpc-fsl-pci-fix-class-code-of-pcie-root-port.patch @@ -0,0 +1,86 @@ +From 0c551abfa004ce154d487d91777bf221c808a64f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Wed, 6 Jul 2022 12:10:43 +0200 +Subject: powerpc/fsl-pci: Fix Class Code of PCIe Root Port +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Pali Rohár + +commit 0c551abfa004ce154d487d91777bf221c808a64f upstream. + +By default old pre-3.0 Freescale PCIe controllers reports invalid PCI Class +Code 0x0b20 for PCIe Root Port. It can be seen by lspci -b output on P2020 +board which has this pre-3.0 controller: + + $ lspci -bvnn + 00:00.0 Power PC [0b20]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) + !!! Invalid class 0b20 for header type 01 + Capabilities: [4c] Express Root Port (Slot-), MSI 00 + +Fix this issue by programming correct PCI Class Code 0x0604 for PCIe Root +Port to the Freescale specific PCIe register 0x474. + +With this change lspci -b output is: + + $ lspci -bvnn + 00:00.0 PCI bridge [0604]: Freescale Semiconductor Inc P2020E [1957:0070] (rev 21) (prog-if 00 [Normal decode]) + Capabilities: [4c] Express Root Port (Slot-), MSI 00 + +Without any "Invalid class" error. So class code was properly reflected +into standard (read-only) PCI register 0x08. + +Same fix is already implemented in U-Boot pcie_fsl.c driver in commit: +http://source.denx.de/u-boot/u-boot/-/commit/d18d06ac35229345a0af80977a408cfbe1d1015b + +Fix activated by U-Boot stay active also after booting Linux kernel. +But boards which use older U-Boot version without that fix are affected and +still require this fix. + +So implement this class code fix also in kernel fsl_pci.c driver. + +Cc: stable@vger.kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/20220706101043.4867-1-pali@kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/powerpc/sysdev/fsl_pci.c | 8 ++++++++ + arch/powerpc/sysdev/fsl_pci.h | 1 + + 2 files changed, 9 insertions(+) + +--- a/arch/powerpc/sysdev/fsl_pci.c ++++ b/arch/powerpc/sysdev/fsl_pci.c +@@ -520,6 +520,7 @@ int fsl_add_bridge(struct platform_devic + struct resource rsrc; + const int *bus_range; + u8 hdr_type, progif; ++ u32 class_code; + struct device_node *dev; + struct ccsr_pci __iomem *pci; + u16 temp; +@@ -593,6 +594,13 @@ int fsl_add_bridge(struct platform_devic + PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; + if (fsl_pcie_check_link(hose)) + hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; ++ /* Fix Class Code to PCI_CLASS_BRIDGE_PCI_NORMAL for pre-3.0 controller */ ++ if (in_be32(&pci->block_rev1) < PCIE_IP_REV_3_0) { ++ early_read_config_dword(hose, 0, 0, PCIE_FSL_CSR_CLASSCODE, &class_code); ++ class_code &= 0xff; ++ class_code |= PCI_CLASS_BRIDGE_PCI_NORMAL << 8; ++ early_write_config_dword(hose, 0, 0, PCIE_FSL_CSR_CLASSCODE, class_code); ++ } + } else { + /* + * Set PBFR(PCI Bus Function Register)[10] = 1 to +--- a/arch/powerpc/sysdev/fsl_pci.h ++++ b/arch/powerpc/sysdev/fsl_pci.h +@@ -18,6 +18,7 @@ struct platform_device; + + #define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */ + #define PCIE_LTSSM_L0 0x16 /* L0 state */ ++#define PCIE_FSL_CSR_CLASSCODE 0x474 /* FSL GPEX CSR */ + #define PCIE_IP_REV_2_2 0x02080202 /* PCIE IP block version Rev2.2 */ + #define PCIE_IP_REV_3_0 0x02080300 /* PCIE IP block version Rev3.0 */ + #define PIWAR_EN 0x80000000 /* Enable */ diff --git a/queue-5.10/powerpc-powernv-avoid-crashing-if-rng-is-null.patch b/queue-5.10/powerpc-powernv-avoid-crashing-if-rng-is-null.patch new file mode 100644 index 00000000000..dc86abf844d --- /dev/null +++ b/queue-5.10/powerpc-powernv-avoid-crashing-if-rng-is-null.patch @@ -0,0 +1,39 @@ +From 90b5d4fe0b3ba7f589c6723c6bfb559d9e83956a Mon Sep 17 00:00:00 2001 +From: Michael Ellerman +Date: Thu, 28 Jul 2022 00:32:17 +1000 +Subject: powerpc/powernv: Avoid crashing if rng is NULL + +From: Michael Ellerman + +commit 90b5d4fe0b3ba7f589c6723c6bfb559d9e83956a upstream. + +On a bare-metal Power8 system that doesn't have an "ibm,power-rng", a +malicious QEMU and guest that ignore the absence of the +KVM_CAP_PPC_HWRNG flag, and calls H_RANDOM anyway, will dereference a +NULL pointer. + +In practice all Power8 machines have an "ibm,power-rng", but let's not +rely on that, add a NULL check and early return in +powernv_get_random_real_mode(). + +Fixes: e928e9cb3601 ("KVM: PPC: Book3S HV: Add fast real-mode H_RANDOM implementation.") +Cc: stable@vger.kernel.org # v4.1+ +Signed-off-by: Jason A. Donenfeld +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/20220727143219.2684192-1-mpe@ellerman.id.au +Signed-off-by: Greg Kroah-Hartman +--- + arch/powerpc/platforms/powernv/rng.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/powerpc/platforms/powernv/rng.c ++++ b/arch/powerpc/platforms/powernv/rng.c +@@ -63,6 +63,8 @@ int powernv_get_random_real_mode(unsigne + struct powernv_rng *rng; + + rng = raw_cpu_read(powernv_rng); ++ if (!rng) ++ return 0; + + *v = rng_whiten(rng, __raw_rm_readq(rng->regs_real)); + diff --git a/queue-5.10/powerpc-ptdump-fix-display-of-rw-pages-on-fsl_book3e.patch b/queue-5.10/powerpc-ptdump-fix-display-of-rw-pages-on-fsl_book3e.patch new file mode 100644 index 00000000000..e56ded282a9 --- /dev/null +++ b/queue-5.10/powerpc-ptdump-fix-display-of-rw-pages-on-fsl_book3e.patch @@ -0,0 +1,46 @@ +From dd8de84b57b02ba9c1fe530a6d916c0853f136bd Mon Sep 17 00:00:00 2001 +From: Christophe Leroy +Date: Tue, 28 Jun 2022 16:43:35 +0200 +Subject: powerpc/ptdump: Fix display of RW pages on FSL_BOOK3E + +From: Christophe Leroy + +commit dd8de84b57b02ba9c1fe530a6d916c0853f136bd upstream. + +On FSL_BOOK3E, _PAGE_RW is defined with two bits, one for user and one +for supervisor. As soon as one of the two bits is set, the page has +to be display as RW. But the way it is implemented today requires both +bits to be set in order to display it as RW. + +Instead of display RW when _PAGE_RW bits are set and R otherwise, +reverse the logic and display R when _PAGE_RW bits are all 0 and +RW otherwise. + +This change has no impact on other platforms as _PAGE_RW is a single +bit on all of them. + +Fixes: 8eb07b187000 ("powerpc/mm: Dump linux pagetables") +Cc: stable@vger.kernel.org +Signed-off-by: Christophe Leroy +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/0c33b96317811edf691e81698aaee8fa45ec3449.1656427391.git.christophe.leroy@csgroup.eu +Signed-off-by: Greg Kroah-Hartman +--- + arch/powerpc/mm/ptdump/shared.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/powerpc/mm/ptdump/shared.c ++++ b/arch/powerpc/mm/ptdump/shared.c +@@ -17,9 +17,9 @@ static const struct flag_info flag_array + .clear = " ", + }, { + .mask = _PAGE_RW, +- .val = _PAGE_RW, +- .set = "rw", +- .clear = "r ", ++ .val = 0, ++ .set = "r ", ++ .clear = "rw", + }, { + .mask = _PAGE_EXEC, + .val = _PAGE_EXEC, diff --git a/queue-5.10/series b/queue-5.10/series index a9a63cd788a..f9963b88f5b 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -58,3 +58,7 @@ mbcache-don-t-reclaim-used-entries.patch mbcache-add-functions-to-delete-entry-if-unused.patch media-pci-atomisp_cmd-fix-three-missing-checks-on-list-iterator.patch ia64-processor-fix-wincompatible-pointer-types-in-ia64_get_irr.patch +powerpc-fsl-pci-fix-class-code-of-pcie-root-port.patch +powerpc-ptdump-fix-display-of-rw-pages-on-fsl_book3e.patch +powerpc-powernv-avoid-crashing-if-rng-is-null.patch +mips-cpuinfo-fix-a-warning-for-config_cpumask_offstack.patch