From: Uros Bizjak <ubizjak@gmail.com>
Date: Tue, 23 Sep 2025 06:13:13 +0000 (+0200)
Subject: x86_64: Fix number of operands mismatch for `vdivss'
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=b8254a047fe0e2f8f0221f67339d8bcdb637fdda;p=thirdparty%2Fglibc.git

x86_64: Fix number of operands mismatch for `vdivss'

Fixes commit ff8be6152bcd1048283663aef2da6a458f27832a
('x86: Use "%v" to emit VEX encoded instructions for AVX targets')

Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
---

diff --git a/sysdeps/x86_64/fpu/fraiseexcpt.c b/sysdeps/x86_64/fpu/fraiseexcpt.c
index a97f8f0b95..da3a31f4c2 100644
--- a/sysdeps/x86_64/fpu/fraiseexcpt.c
+++ b/sysdeps/x86_64/fpu/fraiseexcpt.c
@@ -33,7 +33,7 @@ __feraiseexcept (int excepts)
       /* One example of an invalid operation is 0.0 / 0.0.  */
       float f = 0.0;
 
-      __asm__ __volatile__ ("%vdivss %0, %0 " : "+x" (f));
+      __asm__ __volatile__ ("%vdivss %0, %d0 " : "+x" (f));
       (void) &f;
     }
 
@@ -43,7 +43,7 @@ __feraiseexcept (int excepts)
       float f = 1.0;
       float g = 0.0;
 
-      __asm__ __volatile__ ("%vdivss %1, %0" : "+x" (f) : "x" (g));
+      __asm__ __volatile__ ("%vdivss %1, %d0" : "+x" (f) : "x" (g));
       (void) &f;
     }