From: Zhenqiang Chen <zhenqiang.chen@arm.com>
Date: Thu, 7 Aug 2014 04:54:06 +0000 (+0000)
Subject: tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
X-Git-Tag: releases/gcc-5.1.0~5623
X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=b88fe5e9188827935065546825e686e9486caf0d;p=thirdparty%2Fgcc.git

tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.

ChangeLog
2014-08-07  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.

testsuite/ChangeLog
2014-08-07  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.

From-SVN: r213691
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d54b5b8c13a9..81ab71454254 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2014-08-07  Zhenqiang Chen  <zhenqiang.chen@arm.com>
+
+	* tree-ssa-loop-ivopts.c (get_address_cost): Try aligned offset.
+
 2014-08-06  Vladimir Makarov  <vmakarov@redhat.com>
 
 	PR debug/61923
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0c5c386032cd..e0af2ab77b74 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-08-07  Zhenqiang Chen  <zhenqiang.chen@arm.com>
+
+	* gcc.target/arm/get_address_cost_aligned_max_offset.c: New test.
+
 2014-08-06  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/43906
diff --git a/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c b/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c
new file mode 100644
index 000000000000..cc3e2f778321
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/get_address_cost_aligned_max_offset.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mthumb -O2" }  */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+unsigned int
+test (const short p16[6 * 64])
+{
+  unsigned int i = 6;
+  unsigned int ret = 0;
+
+  do
+    {
+      unsigned long long *p64 = (unsigned long long*) p16;
+      unsigned int *p32 = (unsigned int*) p16;
+      ret += ret;
+      if (p16[1] || p32[1])
+	ret++;
+      else if (p64[1] | p64[2] | p64[3])
+	ret++;
+      p16 += 64;
+      i--;
+    } while (i != 0);
+
+  return ret;
+}
+
+/* { dg-final { scan-assembler-not "#22" } } */
+/* { dg-final { scan-assembler-not "#14" } } */
diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c
index 134a51b3abf5..98b60abdcb52 100644
--- a/gcc/tree-ssa-loop-ivopts.c
+++ b/gcc/tree-ssa-loop-ivopts.c
@@ -3309,6 +3309,18 @@ get_address_cost (bool symbol_present, bool var_present,
 	  XEXP (addr, 1) = gen_int_mode (off, address_mode);
 	  if (memory_address_addr_space_p (mem_mode, addr, as))
 	    break;
+	  /* For some TARGET, like ARM THUMB1, the offset should be nature
+	     aligned.  Try an aligned offset if address_mode is not QImode.  */
+	  off = (address_mode == QImode)
+		? 0
+		: ((unsigned HOST_WIDE_INT) 1 << i)
+		    - GET_MODE_SIZE (address_mode);
+	  if (off > 0)
+	    {
+	      XEXP (addr, 1) = gen_int_mode (off, address_mode);
+	      if (memory_address_addr_space_p (mem_mode, addr, as))
+		break;
+	    }
 	}
       if (i == -1)
         off = 0;