From: Michael Meissner <2019-02-12 Michael Meissner meissner@linux.ibm.com> Date: Thu, 16 Apr 2020 16:49:22 +0000 (-0400) Subject: Fix target/94557 PowerPC regression on GCC 9 (variable vec_extract) X-Git-Tag: misc/first-auto-changelog-9~122 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=baf3a5a94244b4a260810825870be6ecc15fa35a;p=thirdparty%2Fgcc.git Fix target/94557 PowerPC regression on GCC 9 (variable vec_extract) 2020-04-16 Michael Meissner PR target/94557 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Fix regression caused by PR target/93932 backport. Mask variable vector extract index so it does not go beyond the vector when extracting a vector element from memory. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f90fe0d47180..a7949385573b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2020-04-16 Michael Meissner + + PR target/94557 + * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Fix + regression caused by PR target/93932 backport. Mask variable + vector extract index so it does not go beyond the vector when + extracting a vector element from memory. + 2020-04-16 Richard Biener Backport from mainline diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8e63249d4ba9..f7c538c4d54e 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -7047,18 +7047,25 @@ rs6000_adjust_vec_address (rtx scalar_reg, element_offset = GEN_INT (INTVAL (element) * scalar_size); else { + /* Mask the element to make sure the element number is between 0 and the + maximum number of elements - 1 so that we don't generate an address + outside the vector. */ + rtx num_ele_m1 = GEN_INT (GET_MODE_NUNITS (GET_MODE (mem)) - 1); + rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1); + emit_insn (gen_rtx_SET (base_tmp, and_op)); + int byte_shift = exact_log2 (scalar_size); gcc_assert (byte_shift >= 0); if (byte_shift == 0) - element_offset = element; + element_offset = base_tmp; else { if (TARGET_POWERPC64) - emit_insn (gen_ashldi3 (base_tmp, element, GEN_INT (byte_shift))); + emit_insn (gen_ashldi3 (base_tmp, base_tmp, GEN_INT (byte_shift))); else - emit_insn (gen_ashlsi3 (base_tmp, element, GEN_INT (byte_shift))); + emit_insn (gen_ashlsi3 (base_tmp, base_tmp, GEN_INT (byte_shift))); element_offset = base_tmp; }