From: Vladimir N. Makarov Date: Tue, 23 Mar 2021 21:51:21 +0000 (-0400) Subject: [PR99581] Use relaxed memory for more aarch64 memory constraints X-Git-Tag: basepoints/gcc-12~450 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=be70bb5e4babdf9d3d33e8f4658452038407fa8e;p=thirdparty%2Fgcc.git [PR99581] Use relaxed memory for more aarch64 memory constraints The original patch for PR99581 resulted in GCC testsuite regression as some constraints were not declared as relaxed memory ones. This patch fixes this. gcc/ChangeLog: PR target/99581 * config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty): Use define_relaxed_memory_constraint for them. --- diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md index f08eea8bcaee..fd3e925e9a35 100644 --- a/gcc/config/aarch64/constraints.md +++ b/gcc/config/aarch64/constraints.md @@ -323,7 +323,7 @@ (and (match_code "mem") (match_test "aarch64_simd_mem_operand_p (op)"))) -(define_memory_constraint "Utq" +(define_relaxed_memory_constraint "Utq" "@internal An address valid for loading or storing a 128-bit AdvSIMD register" (and (match_code "mem") @@ -336,32 +336,32 @@ (and (match_code "mem") (match_test "aarch64_sve_ld1rq_operand_p (op)"))) -(define_memory_constraint "UOb" +(define_relaxed_memory_constraint "UOb" "@internal An address valid for SVE LD1ROH." (and (match_code "mem") (match_test "aarch64_sve_ld1ro_operand_p (op, QImode)"))) -(define_memory_constraint "UOh" +(define_relaxed_memory_constraint "UOh" "@internal An address valid for SVE LD1ROH." (and (match_code "mem") (match_test "aarch64_sve_ld1ro_operand_p (op, HImode)"))) -(define_memory_constraint "UOw" +(define_relaxed_memory_constraint "UOw" "@internal An address valid for SVE LD1ROW." (and (match_code "mem") (match_test "aarch64_sve_ld1ro_operand_p (op, SImode)"))) -(define_memory_constraint "UOd" +(define_relaxed_memory_constraint "UOd" "@internal An address valid for SVE LD1ROD." (and (match_code "mem") (match_test "aarch64_sve_ld1ro_operand_p (op, DImode)"))) -(define_memory_constraint "Uty" +(define_relaxed_memory_constraint "Uty" "@internal An address valid for SVE LD1Rs." (and (match_code "mem")