From: Greg Kroah-Hartman Date: Mon, 24 Jul 2023 17:18:23 +0000 (+0200) Subject: move the queues back X-Git-Tag: v5.4.251~10 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=c028001970d6db2c3e83dd3377f9f9073206f0ce;p=thirdparty%2Fkernel%2Fstable-queue.git move the queues back and remove the patches in the last round of releases. --- diff --git a/tmp-4.19/add-module_firmware-for-firmware_tg357766.patch b/queue-4.19/add-module_firmware-for-firmware_tg357766.patch similarity index 100% rename from tmp-4.19/add-module_firmware-for-firmware_tg357766.patch rename to queue-4.19/add-module_firmware-for-firmware_tg357766.patch diff --git a/tmp-4.19/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch b/queue-4.19/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch similarity index 100% rename from tmp-4.19/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch rename to queue-4.19/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch diff --git 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b/queue-5.10/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch similarity index 100% rename from tmp-5.10/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch rename to queue-5.10/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch diff --git a/tmp-5.10/serial-atmel-don-t-enable-irqs-prematurely.patch b/queue-5.10/serial-atmel-don-t-enable-irqs-prematurely.patch similarity index 100% rename from tmp-5.10/serial-atmel-don-t-enable-irqs-prematurely.patch rename to queue-5.10/serial-atmel-don-t-enable-irqs-prematurely.patch diff --git a/tmp-5.10/series b/queue-5.10/series similarity index 99% rename from tmp-5.10/series rename to queue-5.10/series index cd224b7ef1d..21f0a9b8f83 100644 --- a/tmp-5.10/series +++ b/queue-5.10/series @@ -1,5 +1,4 @@ media-atomisp-fix-variable-dereferenced-before-check-asd.patch -x86-microcode-amd-load-late-on-both-threads-too.patch x86-smp-use-dedicated-cache-line-for-mwait_play_dead.patch can-isotp-isotp_sendmsg-fix-return-error-fix-on-tx-path.patch video-imsttfb-check-for-ioremap-failures.patch @@ -508,5 +507,3 @@ tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list tracing-fix-memory-leak-of-iter-temp-when-reading-trace_pipe.patch ftrace-store-the-order-of-pages-allocated-in-ftrace_page.patch ftrace-fix-possible-warning-on-checking-all-pages-used-in-ftrace_process_locs.patch -x86-cpu-amd-move-the-errata-checking-functionality-up.patch -x86-cpu-amd-add-a-zenbleed-fix.patch diff --git a/tmp-5.10/sfc-fix-crash-when-reading-stats-while-nic-is-resett.patch b/queue-5.10/sfc-fix-crash-when-reading-stats-while-nic-is-resett.patch similarity index 100% rename from tmp-5.10/sfc-fix-crash-when-reading-stats-while-nic-is-resett.patch rename to queue-5.10/sfc-fix-crash-when-reading-stats-while-nic-is-resett.patch diff --git a/tmp-5.10/sh-dma-fix-dma-channel-offset-calculation.patch b/queue-5.10/sh-dma-fix-dma-channel-offset-calculation.patch similarity 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tmp-5.15/net-ethernet-mtk_eth_soc-handle-probe-deferral.patch rename to queue-5.15/net-ethernet-mtk_eth_soc-handle-probe-deferral.patch diff --git a/tmp-5.15/net-ethernet-ti-cpsw_ale-fix-cpsw_ale_get_field-cpsw.patch b/queue-5.15/net-ethernet-ti-cpsw_ale-fix-cpsw_ale_get_field-cpsw.patch similarity index 100% rename from tmp-5.15/net-ethernet-ti-cpsw_ale-fix-cpsw_ale_get_field-cpsw.patch rename to queue-5.15/net-ethernet-ti-cpsw_ale-fix-cpsw_ale_get_field-cpsw.patch diff --git a/tmp-5.15/net-ipv4-use-kfree_sensitive-instead-of-kfree.patch b/queue-5.15/net-ipv4-use-kfree_sensitive-instead-of-kfree.patch similarity index 100% rename from tmp-5.15/net-ipv4-use-kfree_sensitive-instead-of-kfree.patch rename to queue-5.15/net-ipv4-use-kfree_sensitive-instead-of-kfree.patch diff --git a/tmp-5.15/net-ipv6-check-return-value-of-pskb_trim.patch b/queue-5.15/net-ipv6-check-return-value-of-pskb_trim.patch similarity index 100% rename from tmp-5.15/net-ipv6-check-return-value-of-pskb_trim.patch rename to queue-5.15/net-ipv6-check-return-value-of-pskb_trim.patch diff --git a/tmp-5.15/net-phy-prevent-stale-pointer-dereference-in-phy_ini.patch b/queue-5.15/net-phy-prevent-stale-pointer-dereference-in-phy_ini.patch similarity index 100% rename from tmp-5.15/net-phy-prevent-stale-pointer-dereference-in-phy_ini.patch rename to queue-5.15/net-phy-prevent-stale-pointer-dereference-in-phy_ini.patch diff --git a/tmp-5.15/net-sched-cls_bpf-undo-tcf_bind_filter-in-case-of-an.patch b/queue-5.15/net-sched-cls_bpf-undo-tcf_bind_filter-in-case-of-an.patch similarity index 100% rename from tmp-5.15/net-sched-cls_bpf-undo-tcf_bind_filter-in-case-of-an.patch rename to queue-5.15/net-sched-cls_bpf-undo-tcf_bind_filter-in-case-of-an.patch diff --git a/tmp-5.15/netfilter-nf_tables-fix-spurious-set-element-inserti.patch b/queue-5.15/netfilter-nf_tables-fix-spurious-set-element-inserti.patch similarity index 100% rename from tmp-5.15/netfilter-nf_tables-fix-spurious-set-element-inserti.patch rename to queue-5.15/netfilter-nf_tables-fix-spurious-set-element-inserti.patch diff --git a/tmp-5.15/netfilter-nf_tables-skip-bound-chain-in-netns-releas.patch b/queue-5.15/netfilter-nf_tables-skip-bound-chain-in-netns-releas.patch similarity index 100% rename from tmp-5.15/netfilter-nf_tables-skip-bound-chain-in-netns-releas.patch rename to queue-5.15/netfilter-nf_tables-skip-bound-chain-in-netns-releas.patch diff --git a/tmp-5.15/netfilter-nf_tables-skip-bound-chain-on-rule-flush.patch b/queue-5.15/netfilter-nf_tables-skip-bound-chain-on-rule-flush.patch similarity index 100% rename from tmp-5.15/netfilter-nf_tables-skip-bound-chain-on-rule-flush.patch rename to queue-5.15/netfilter-nf_tables-skip-bound-chain-on-rule-flush.patch diff --git a/tmp-5.15/netfilter-nft_set_pipapo-fix-improper-element-remova.patch b/queue-5.15/netfilter-nft_set_pipapo-fix-improper-element-remova.patch similarity index 100% rename from tmp-5.15/netfilter-nft_set_pipapo-fix-improper-element-remova.patch rename to queue-5.15/netfilter-nft_set_pipapo-fix-improper-element-remova.patch diff --git a/tmp-5.15/octeontx2-pf-dont-allocate-bpids-for-lbk-interfaces.patch b/queue-5.15/octeontx2-pf-dont-allocate-bpids-for-lbk-interfaces.patch similarity index 100% rename from tmp-5.15/octeontx2-pf-dont-allocate-bpids-for-lbk-interfaces.patch rename to queue-5.15/octeontx2-pf-dont-allocate-bpids-for-lbk-interfaces.patch diff --git a/tmp-5.15/of-net-add-a-helper-for-loading-netdev-dev_addr.patch b/queue-5.15/of-net-add-a-helper-for-loading-netdev-dev_addr.patch similarity index 100% rename from tmp-5.15/of-net-add-a-helper-for-loading-netdev-dev_addr.patch rename to queue-5.15/of-net-add-a-helper-for-loading-netdev-dev_addr.patch diff --git a/tmp-5.15/perf-build-fix-library-not-found-error-when-using-cs.patch b/queue-5.15/perf-build-fix-library-not-found-error-when-using-cs.patch similarity index 100% rename from tmp-5.15/perf-build-fix-library-not-found-error-when-using-cs.patch rename to queue-5.15/perf-build-fix-library-not-found-error-when-using-cs.patch diff --git a/tmp-5.15/perf-probe-add-test-for-regression-introduced-by-switch-to-die_get_decl_file.patch b/queue-5.15/perf-probe-add-test-for-regression-introduced-by-switch-to-die_get_decl_file.patch similarity index 100% rename from tmp-5.15/perf-probe-add-test-for-regression-introduced-by-switch-to-die_get_decl_file.patch rename to queue-5.15/perf-probe-add-test-for-regression-introduced-by-switch-to-die_get_decl_file.patch diff --git a/tmp-5.15/pinctrl-amd-use-amd_pinconf_set-for-all-config-optio.patch b/queue-5.15/pinctrl-amd-use-amd_pinconf_set-for-all-config-optio.patch similarity index 100% rename from tmp-5.15/pinctrl-amd-use-amd_pinconf_set-for-all-config-optio.patch rename to queue-5.15/pinctrl-amd-use-amd_pinconf_set-for-all-config-optio.patch diff --git a/tmp-5.15/quota-fix-warning-in-dqgrab.patch b/queue-5.15/quota-fix-warning-in-dqgrab.patch similarity index 100% rename from tmp-5.15/quota-fix-warning-in-dqgrab.patch rename to queue-5.15/quota-fix-warning-in-dqgrab.patch diff --git a/tmp-5.15/quota-properly-disable-quotas-when-add_dquot_ref-fai.patch b/queue-5.15/quota-properly-disable-quotas-when-add_dquot_ref-fai.patch similarity index 100% rename from tmp-5.15/quota-properly-disable-quotas-when-add_dquot_ref-fai.patch rename to queue-5.15/quota-properly-disable-quotas-when-add_dquot_ref-fai.patch diff --git a/tmp-5.15/regmap-account-for-register-length-in-smbus-i-o-limits.patch b/queue-5.15/regmap-account-for-register-length-in-smbus-i-o-limits.patch similarity index 100% rename from tmp-5.15/regmap-account-for-register-length-in-smbus-i-o-limits.patch rename to queue-5.15/regmap-account-for-register-length-in-smbus-i-o-limits.patch diff --git a/tmp-5.15/regmap-drop-initial-version-of-maximum-transfer-length-fixes.patch b/queue-5.15/regmap-drop-initial-version-of-maximum-transfer-length-fixes.patch similarity index 100% rename from tmp-5.15/regmap-drop-initial-version-of-maximum-transfer-length-fixes.patch rename to queue-5.15/regmap-drop-initial-version-of-maximum-transfer-length-fixes.patch diff --git a/tmp-5.15/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch b/queue-5.15/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch similarity index 100% rename from tmp-5.15/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch rename to queue-5.15/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch diff --git a/tmp-5.15/security-keys-modify-mismatched-function-name.patch b/queue-5.15/security-keys-modify-mismatched-function-name.patch similarity index 100% rename from tmp-5.15/security-keys-modify-mismatched-function-name.patch rename to queue-5.15/security-keys-modify-mismatched-function-name.patch diff --git a/tmp-5.15/selftests-tc-add-conntrack-procfs-kconfig.patch b/queue-5.15/selftests-tc-add-conntrack-procfs-kconfig.patch similarity index 100% rename from tmp-5.15/selftests-tc-add-conntrack-procfs-kconfig.patch rename to queue-5.15/selftests-tc-add-conntrack-procfs-kconfig.patch diff --git a/tmp-5.15/selftests-tc-add-ct-action-kconfig-dep.patch b/queue-5.15/selftests-tc-add-ct-action-kconfig-dep.patch similarity index 100% rename from tmp-5.15/selftests-tc-add-ct-action-kconfig-dep.patch rename to queue-5.15/selftests-tc-add-ct-action-kconfig-dep.patch diff --git a/tmp-5.15/selftests-tc-set-timeout-to-15-minutes.patch b/queue-5.15/selftests-tc-set-timeout-to-15-minutes.patch similarity index 100% rename from tmp-5.15/selftests-tc-set-timeout-to-15-minutes.patch rename to queue-5.15/selftests-tc-set-timeout-to-15-minutes.patch diff --git a/tmp-5.15/series b/queue-5.15/series similarity index 97% rename from tmp-5.15/series rename to queue-5.15/series index 372a82e750c..4d2cf93273f 100644 --- a/tmp-5.15/series +++ b/queue-5.15/series @@ -76,5 +76,3 @@ tcp-annotate-data-races-around-fastopenq.max_qlen.patch net-phy-prevent-stale-pointer-dereference-in-phy_ini.patch jbd2-recheck-chechpointing-non-dirty-buffer.patch tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch -x86-cpu-amd-move-the-errata-checking-functionality-up.patch -x86-cpu-amd-add-a-zenbleed-fix.patch diff --git a/tmp-5.15/spi-bcm63xx-fix-max-prepend-length.patch b/queue-5.15/spi-bcm63xx-fix-max-prepend-length.patch similarity index 100% rename from tmp-5.15/spi-bcm63xx-fix-max-prepend-length.patch rename to queue-5.15/spi-bcm63xx-fix-max-prepend-length.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-fastopenq.max_qlen.patch b/queue-5.15/tcp-annotate-data-races-around-fastopenq.max_qlen.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-fastopenq.max_qlen.patch rename to queue-5.15/tcp-annotate-data-races-around-fastopenq.max_qlen.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch b/queue-5.15/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch rename to queue-5.15/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch b/queue-5.15/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch rename to queue-5.15/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-rskq_defer_accept.patch b/queue-5.15/tcp-annotate-data-races-around-rskq_defer_accept.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-rskq_defer_accept.patch rename to queue-5.15/tcp-annotate-data-races-around-rskq_defer_accept.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch b/queue-5.15/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch rename to queue-5.15/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_intvl.patch b/queue-5.15/tcp-annotate-data-races-around-tp-keepalive_intvl.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_intvl.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-keepalive_intvl.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_probes.patch b/queue-5.15/tcp-annotate-data-races-around-tp-keepalive_probes.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_probes.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-keepalive_probes.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_time.patch b/queue-5.15/tcp-annotate-data-races-around-tp-keepalive_time.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-keepalive_time.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-keepalive_time.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-linger2.patch b/queue-5.15/tcp-annotate-data-races-around-tp-linger2.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-linger2.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-linger2.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-notsent_lowat.patch b/queue-5.15/tcp-annotate-data-races-around-tp-notsent_lowat.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-notsent_lowat.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-notsent_lowat.patch diff --git a/tmp-5.15/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch b/queue-5.15/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch similarity index 100% rename from tmp-5.15/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch rename to queue-5.15/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch diff --git a/tmp-5.15/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch b/queue-5.15/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch similarity index 100% rename from tmp-5.15/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch rename to queue-5.15/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch diff --git a/tmp-5.15/udf-fix-uninitialized-array-access-for-some-pathname.patch b/queue-5.15/udf-fix-uninitialized-array-access-for-some-pathname.patch similarity index 100% rename from tmp-5.15/udf-fix-uninitialized-array-access-for-some-pathname.patch rename to queue-5.15/udf-fix-uninitialized-array-access-for-some-pathname.patch diff --git a/tmp-5.4/add-module_firmware-for-firmware_tg357766.patch b/queue-5.4/add-module_firmware-for-firmware_tg357766.patch similarity index 100% rename from tmp-5.4/add-module_firmware-for-firmware_tg357766.patch rename to queue-5.4/add-module_firmware-for-firmware_tg357766.patch diff --git a/tmp-5.4/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch b/queue-5.4/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch similarity index 100% rename from tmp-5.4/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch rename to queue-5.4/alsa-ac97-fix-possible-null-dereference-in-snd_ac97_.patch diff --git a/tmp-5.4/alsa-jack-fix-mutex-call-in-snd_jack_report.patch b/queue-5.4/alsa-jack-fix-mutex-call-in-snd_jack_report.patch similarity index 100% rename from tmp-5.4/alsa-jack-fix-mutex-call-in-snd_jack_report.patch rename to queue-5.4/alsa-jack-fix-mutex-call-in-snd_jack_report.patch diff --git a/tmp-5.4/arc-define-asm_nl-and-__align-_str-outside-ifdef-__a.patch b/queue-5.4/arc-define-asm_nl-and-__align-_str-outside-ifdef-__a.patch similarity index 100% rename from tmp-5.4/arc-define-asm_nl-and-__align-_str-outside-ifdef-__a.patch rename to queue-5.4/arc-define-asm_nl-and-__align-_str-outside-ifdef-__a.patch diff --git a/tmp-5.4/arm-9303-1-kprobes-avoid-missing-declaration-warning.patch b/queue-5.4/arm-9303-1-kprobes-avoid-missing-declaration-warning.patch similarity index 100% rename from tmp-5.4/arm-9303-1-kprobes-avoid-missing-declaration-warning.patch rename to queue-5.4/arm-9303-1-kprobes-avoid-missing-declaration-warning.patch diff --git a/tmp-5.4/arm-dts-bcm5301x-drop-clock-names-from-the-spi-node.patch b/queue-5.4/arm-dts-bcm5301x-drop-clock-names-from-the-spi-node.patch similarity index 100% rename from tmp-5.4/arm-dts-bcm5301x-drop-clock-names-from-the-spi-node.patch rename to queue-5.4/arm-dts-bcm5301x-drop-clock-names-from-the-spi-node.patch diff --git a/tmp-5.4/arm-dts-gta04-move-model-property-out-of-pinctrl-nod.patch b/queue-5.4/arm-dts-gta04-move-model-property-out-of-pinctrl-nod.patch similarity index 100% rename from tmp-5.4/arm-dts-gta04-move-model-property-out-of-pinctrl-nod.patch rename to queue-5.4/arm-dts-gta04-move-model-property-out-of-pinctrl-nod.patch diff --git a/tmp-5.4/arm-ep93xx-fix-missing-prototype-warnings.patch b/queue-5.4/arm-ep93xx-fix-missing-prototype-warnings.patch similarity index 100% rename from tmp-5.4/arm-ep93xx-fix-missing-prototype-warnings.patch rename to queue-5.4/arm-ep93xx-fix-missing-prototype-warnings.patch diff --git a/tmp-5.4/arm-orion5x-fix-d2net-gpio-initialization.patch b/queue-5.4/arm-orion5x-fix-d2net-gpio-initialization.patch similarity index 100% rename from tmp-5.4/arm-orion5x-fix-d2net-gpio-initialization.patch rename to queue-5.4/arm-orion5x-fix-d2net-gpio-initialization.patch diff --git a/tmp-5.4/arm64-dts-qcom-msm8916-correct-camss-unit-address.patch b/queue-5.4/arm64-dts-qcom-msm8916-correct-camss-unit-address.patch similarity index 100% rename from tmp-5.4/arm64-dts-qcom-msm8916-correct-camss-unit-address.patch rename to queue-5.4/arm64-dts-qcom-msm8916-correct-camss-unit-address.patch diff --git a/tmp-5.4/arm64-dts-renesas-ulcb-kf-remove-flow-control-for-sc.patch b/queue-5.4/arm64-dts-renesas-ulcb-kf-remove-flow-control-for-sc.patch similarity index 100% rename from tmp-5.4/arm64-dts-renesas-ulcb-kf-remove-flow-control-for-sc.patch rename to queue-5.4/arm64-dts-renesas-ulcb-kf-remove-flow-control-for-sc.patch diff --git a/tmp-5.4/arm64-mm-fix-va-range-sanity-check.patch b/queue-5.4/arm64-mm-fix-va-range-sanity-check.patch similarity index 100% rename from tmp-5.4/arm64-mm-fix-va-range-sanity-check.patch rename to queue-5.4/arm64-mm-fix-va-range-sanity-check.patch diff --git a/tmp-5.4/asoc-es8316-do-not-set-rate-constraints-for-unsuppor.patch b/queue-5.4/asoc-es8316-do-not-set-rate-constraints-for-unsuppor.patch similarity index 100% rename from tmp-5.4/asoc-es8316-do-not-set-rate-constraints-for-unsuppor.patch rename to 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a/tmp-5.4/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch b/queue-5.4/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch similarity index 100% rename from tmp-5.4/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch rename to queue-5.4/serial-8250_omap-use-force_suspend-and-resume-for-sy.patch diff --git a/tmp-5.4/serial-atmel-don-t-enable-irqs-prematurely.patch b/queue-5.4/serial-atmel-don-t-enable-irqs-prematurely.patch similarity index 100% rename from tmp-5.4/serial-atmel-don-t-enable-irqs-prematurely.patch rename to queue-5.4/serial-atmel-don-t-enable-irqs-prematurely.patch diff --git a/tmp-5.4/series b/queue-5.4/series similarity index 99% rename from tmp-5.4/series rename to queue-5.4/series index 1e762abf70a..f2fbf95ae38 100644 --- a/tmp-5.4/series +++ b/queue-5.4/series @@ -1,5 +1,4 @@ gfs2-don-t-deref-jdesc-in-evict.patch -x86-microcode-amd-load-late-on-both-threads-too.patch x86-smp-use-dedicated-cache-line-for-mwait_play_dead.patch video-imsttfb-check-for-ioremap-failures.patch fbdev-imsttfb-fix-use-after-free-bug-in-imsttfb_probe.patch @@ -312,5 +311,3 @@ tcp-annotate-data-races-around-rskq_defer_accept.patch tcp-annotate-data-races-around-tp-notsent_lowat.patch tcp-annotate-data-races-around-fastopenq.max_qlen.patch tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch -x86-cpu-amd-move-the-errata-checking-functionality-up.patch -x86-cpu-amd-add-a-zenbleed-fix.patch diff --git a/tmp-5.4/sh-dma-fix-dma-channel-offset-calculation.patch b/queue-5.4/sh-dma-fix-dma-channel-offset-calculation.patch similarity index 100% rename from tmp-5.4/sh-dma-fix-dma-channel-offset-calculation.patch rename to queue-5.4/sh-dma-fix-dma-channel-offset-calculation.patch diff --git a/tmp-5.4/sh-j2-use-ioremap-to-translate-device-tree-address-i.patch b/queue-5.4/sh-j2-use-ioremap-to-translate-device-tree-address-i.patch similarity index 100% rename from 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queue-6.4/revert-r8169-disable-aspm-during-napi-poll.patch diff --git a/tmp-6.4/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch b/queue-6.4/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch similarity index 100% rename from tmp-6.4/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch rename to queue-6.4/revert-tcp-avoid-the-lookup-process-failing-to-get-s.patch diff --git a/tmp-6.4/s390-zcrypt-fix-reply-buffer-calculations-for-cca-replies.patch b/queue-6.4/s390-zcrypt-fix-reply-buffer-calculations-for-cca-replies.patch similarity index 100% rename from tmp-6.4/s390-zcrypt-fix-reply-buffer-calculations-for-cca-replies.patch rename to queue-6.4/s390-zcrypt-fix-reply-buffer-calculations-for-cca-replies.patch diff --git a/tmp-6.4/sched-fair-don-t-balance-task-to-its-current-running.patch b/queue-6.4/sched-fair-don-t-balance-task-to-its-current-running.patch similarity index 100% rename from tmp-6.4/sched-fair-don-t-balance-task-to-its-current-running.patch rename to queue-6.4/sched-fair-don-t-balance-task-to-its-current-running.patch diff --git a/tmp-6.4/sched-fair-use-recent_used_cpu-to-test-p-cpus_ptr.patch b/queue-6.4/sched-fair-use-recent_used_cpu-to-test-p-cpus_ptr.patch similarity index 100% rename from tmp-6.4/sched-fair-use-recent_used_cpu-to-test-p-cpus_ptr.patch rename to queue-6.4/sched-fair-use-recent_used_cpu-to-test-p-cpus_ptr.patch diff --git a/tmp-6.4/sched-psi-use-kernfs-polling-functions-for-psi-trigg.patch b/queue-6.4/sched-psi-use-kernfs-polling-functions-for-psi-trigg.patch similarity index 100% rename from tmp-6.4/sched-psi-use-kernfs-polling-functions-for-psi-trigg.patch rename to queue-6.4/sched-psi-use-kernfs-polling-functions-for-psi-trigg.patch diff --git a/tmp-6.4/scsi-sg-don-t-grab-scsi-host-module-reference.patch b/queue-6.4/scsi-sg-don-t-grab-scsi-host-module-reference.patch similarity index 100% rename from tmp-6.4/scsi-sg-don-t-grab-scsi-host-module-reference.patch rename to queue-6.4/scsi-sg-don-t-grab-scsi-host-module-reference.patch diff --git a/tmp-6.4/scsi-sg-fix-blktrace-debugfs-entries-leakage.patch b/queue-6.4/scsi-sg-fix-blktrace-debugfs-entries-leakage.patch similarity index 100% rename from tmp-6.4/scsi-sg-fix-blktrace-debugfs-entries-leakage.patch rename to queue-6.4/scsi-sg-fix-blktrace-debugfs-entries-leakage.patch diff --git a/tmp-6.4/security-keys-modify-mismatched-function-name.patch b/queue-6.4/security-keys-modify-mismatched-function-name.patch similarity index 100% rename from tmp-6.4/security-keys-modify-mismatched-function-name.patch rename to queue-6.4/security-keys-modify-mismatched-function-name.patch diff --git a/tmp-6.4/selftests-mm-mkdirty-fix-incorrect-position-of-endif.patch b/queue-6.4/selftests-mm-mkdirty-fix-incorrect-position-of-endif.patch similarity index 100% rename from tmp-6.4/selftests-mm-mkdirty-fix-incorrect-position-of-endif.patch rename to queue-6.4/selftests-mm-mkdirty-fix-incorrect-position-of-endif.patch diff --git a/tmp-6.4/selftests-tc-add-conntrack-procfs-kconfig.patch b/queue-6.4/selftests-tc-add-conntrack-procfs-kconfig.patch similarity index 100% rename from tmp-6.4/selftests-tc-add-conntrack-procfs-kconfig.patch rename to queue-6.4/selftests-tc-add-conntrack-procfs-kconfig.patch diff --git a/tmp-6.4/selftests-tc-add-ct-action-kconfig-dep.patch b/queue-6.4/selftests-tc-add-ct-action-kconfig-dep.patch similarity index 100% rename from tmp-6.4/selftests-tc-add-ct-action-kconfig-dep.patch rename to queue-6.4/selftests-tc-add-ct-action-kconfig-dep.patch diff --git a/tmp-6.4/selftests-tc-set-timeout-to-15-minutes.patch b/queue-6.4/selftests-tc-set-timeout-to-15-minutes.patch similarity index 100% rename from tmp-6.4/selftests-tc-set-timeout-to-15-minutes.patch rename to queue-6.4/selftests-tc-set-timeout-to-15-minutes.patch diff --git a/tmp-6.4/series b/queue-6.4/series similarity index 99% rename from tmp-6.4/series rename to queue-6.4/series index 30521451c7f..206b76bad0a 100644 --- a/tmp-6.4/series +++ b/queue-6.4/series @@ -223,5 +223,3 @@ tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list drm-ttm-fix-bulk_move-corruption-when-adding-a-entry.patch spi-dw-remove-misleading-comment-for-mount-evans-soc.patch scsi-sg-don-t-grab-scsi-host-module-reference.patch -x86-cpu-amd-move-the-errata-checking-functionality-up.patch -x86-cpu-amd-add-a-zenbleed-fix.patch diff --git a/tmp-6.4/smb-client-fix-missed-ses-refcounting.patch b/queue-6.4/smb-client-fix-missed-ses-refcounting.patch similarity index 100% rename from tmp-6.4/smb-client-fix-missed-ses-refcounting.patch rename to queue-6.4/smb-client-fix-missed-ses-refcounting.patch diff --git a/tmp-6.4/spi-bcm63xx-fix-max-prepend-length.patch b/queue-6.4/spi-bcm63xx-fix-max-prepend-length.patch similarity index 100% rename from tmp-6.4/spi-bcm63xx-fix-max-prepend-length.patch rename to queue-6.4/spi-bcm63xx-fix-max-prepend-length.patch diff --git a/tmp-6.4/spi-cadence-quadspi-add-compatible-for-amd-pensando-.patch b/queue-6.4/spi-cadence-quadspi-add-compatible-for-amd-pensando-.patch similarity index 100% rename from tmp-6.4/spi-cadence-quadspi-add-compatible-for-amd-pensando-.patch rename to queue-6.4/spi-cadence-quadspi-add-compatible-for-amd-pensando-.patch diff --git a/tmp-6.4/spi-dw-add-compatible-for-intel-mount-evans-soc.patch b/queue-6.4/spi-dw-add-compatible-for-intel-mount-evans-soc.patch similarity index 100% rename from tmp-6.4/spi-dw-add-compatible-for-intel-mount-evans-soc.patch rename to queue-6.4/spi-dw-add-compatible-for-intel-mount-evans-soc.patch diff --git a/tmp-6.4/spi-dw-remove-misleading-comment-for-mount-evans-soc.patch b/queue-6.4/spi-dw-remove-misleading-comment-for-mount-evans-soc.patch similarity index 100% rename from tmp-6.4/spi-dw-remove-misleading-comment-for-mount-evans-soc.patch rename to queue-6.4/spi-dw-remove-misleading-comment-for-mount-evans-soc.patch diff --git a/tmp-6.4/spi-s3c64xx-clear-loopback-bit-after-loopback-test.patch b/queue-6.4/spi-s3c64xx-clear-loopback-bit-after-loopback-test.patch similarity index 100% rename from tmp-6.4/spi-s3c64xx-clear-loopback-bit-after-loopback-test.patch rename to queue-6.4/spi-s3c64xx-clear-loopback-bit-after-loopback-test.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-fastopenq.max_qlen.patch b/queue-6.4/tcp-annotate-data-races-around-fastopenq.max_qlen.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-fastopenq.max_qlen.patch rename to queue-6.4/tcp-annotate-data-races-around-fastopenq.max_qlen.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch b/queue-6.4/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch rename to queue-6.4/tcp-annotate-data-races-around-icsk-icsk_syn_retries.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch b/queue-6.4/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch rename to queue-6.4/tcp-annotate-data-races-around-icsk-icsk_user_timeou.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-rskq_defer_accept.patch b/queue-6.4/tcp-annotate-data-races-around-rskq_defer_accept.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-rskq_defer_accept.patch rename to queue-6.4/tcp-annotate-data-races-around-rskq_defer_accept.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch b/queue-6.4/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch rename to queue-6.4/tcp-annotate-data-races-around-tcp_rsk-req-ts_recent.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tcp_rsk-req-txhash.patch b/queue-6.4/tcp-annotate-data-races-around-tcp_rsk-req-txhash.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tcp_rsk-req-txhash.patch rename to queue-6.4/tcp-annotate-data-races-around-tcp_rsk-req-txhash.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_intvl.patch b/queue-6.4/tcp-annotate-data-races-around-tp-keepalive_intvl.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_intvl.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-keepalive_intvl.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_probes.patch b/queue-6.4/tcp-annotate-data-races-around-tp-keepalive_probes.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_probes.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-keepalive_probes.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_time.patch b/queue-6.4/tcp-annotate-data-races-around-tp-keepalive_time.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-keepalive_time.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-keepalive_time.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-linger2.patch b/queue-6.4/tcp-annotate-data-races-around-tp-linger2.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-linger2.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-linger2.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-notsent_lowat.patch b/queue-6.4/tcp-annotate-data-races-around-tp-notsent_lowat.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-notsent_lowat.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-notsent_lowat.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch b/queue-6.4/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-tcp_tx_delay.patch diff --git a/tmp-6.4/tcp-annotate-data-races-around-tp-tsoffset.patch b/queue-6.4/tcp-annotate-data-races-around-tp-tsoffset.patch similarity index 100% rename from tmp-6.4/tcp-annotate-data-races-around-tp-tsoffset.patch rename to queue-6.4/tcp-annotate-data-races-around-tp-tsoffset.patch diff --git a/tmp-6.4/tools-nolibc-ensure-stack-protector-guard-is-never-z.patch b/queue-6.4/tools-nolibc-ensure-stack-protector-guard-is-never-z.patch similarity index 100% rename from tmp-6.4/tools-nolibc-ensure-stack-protector-guard-is-never-z.patch rename to queue-6.4/tools-nolibc-ensure-stack-protector-guard-is-never-z.patch diff --git a/tmp-6.4/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch b/queue-6.4/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch similarity index 100% rename from tmp-6.4/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch rename to queue-6.4/tracing-histograms-return-an-error-if-we-fail-to-add-histogram-to-hist_vars-list.patch diff --git a/tmp-6.4/udf-fix-uninitialized-array-access-for-some-pathname.patch b/queue-6.4/udf-fix-uninitialized-array-access-for-some-pathname.patch similarity index 100% rename from tmp-6.4/udf-fix-uninitialized-array-access-for-some-pathname.patch rename to queue-6.4/udf-fix-uninitialized-array-access-for-some-pathname.patch diff --git a/tmp-6.4/vrf-fix-lockdep-splat-in-output-path.patch b/queue-6.4/vrf-fix-lockdep-splat-in-output-path.patch similarity index 100% rename from tmp-6.4/vrf-fix-lockdep-splat-in-output-path.patch rename to queue-6.4/vrf-fix-lockdep-splat-in-output-path.patch diff --git a/tmp-6.4/wifi-ath11k-add-support-default-regdb-while-searchin.patch b/queue-6.4/wifi-ath11k-add-support-default-regdb-while-searchin.patch similarity index 100% rename from tmp-6.4/wifi-ath11k-add-support-default-regdb-while-searchin.patch rename to queue-6.4/wifi-ath11k-add-support-default-regdb-while-searchin.patch diff --git a/tmp-6.4/wifi-ath11k-fix-memory-leak-in-wmi-firmware-stats.patch b/queue-6.4/wifi-ath11k-fix-memory-leak-in-wmi-firmware-stats.patch similarity index 100% rename from tmp-6.4/wifi-ath11k-fix-memory-leak-in-wmi-firmware-stats.patch rename to queue-6.4/wifi-ath11k-fix-memory-leak-in-wmi-firmware-stats.patch diff --git a/tmp-6.4/wifi-ath11k-fix-registration-of-6ghz-only-phy-withou.patch b/queue-6.4/wifi-ath11k-fix-registration-of-6ghz-only-phy-withou.patch similarity index 100% rename from tmp-6.4/wifi-ath11k-fix-registration-of-6ghz-only-phy-withou.patch rename to queue-6.4/wifi-ath11k-fix-registration-of-6ghz-only-phy-withou.patch diff --git a/tmp-6.4/wifi-ath12k-avoid-null-pointer-access-during-managem.patch b/queue-6.4/wifi-ath12k-avoid-null-pointer-access-during-managem.patch similarity index 100% rename from tmp-6.4/wifi-ath12k-avoid-null-pointer-access-during-managem.patch rename to queue-6.4/wifi-ath12k-avoid-null-pointer-access-during-managem.patch diff --git a/tmp-6.4/wifi-iwlwifi-add-support-for-new-pci-id.patch b/queue-6.4/wifi-iwlwifi-add-support-for-new-pci-id.patch similarity index 100% rename from tmp-6.4/wifi-iwlwifi-add-support-for-new-pci-id.patch rename to queue-6.4/wifi-iwlwifi-add-support-for-new-pci-id.patch diff --git a/tmp-6.4/wifi-iwlwifi-mvm-add-null-check-before-dereferencing.patch b/queue-6.4/wifi-iwlwifi-mvm-add-null-check-before-dereferencing.patch similarity index 100% rename from tmp-6.4/wifi-iwlwifi-mvm-add-null-check-before-dereferencing.patch rename to queue-6.4/wifi-iwlwifi-mvm-add-null-check-before-dereferencing.patch diff --git a/tmp-6.4/wifi-iwlwifi-mvm-avoid-baid-size-integer-overflow.patch b/queue-6.4/wifi-iwlwifi-mvm-avoid-baid-size-integer-overflow.patch similarity index 100% rename from tmp-6.4/wifi-iwlwifi-mvm-avoid-baid-size-integer-overflow.patch rename to queue-6.4/wifi-iwlwifi-mvm-avoid-baid-size-integer-overflow.patch diff --git a/tmp-6.4/wifi-iwlwifi-mvm-fix-potential-array-out-of-bounds-a.patch b/queue-6.4/wifi-iwlwifi-mvm-fix-potential-array-out-of-bounds-a.patch similarity index 100% rename from tmp-6.4/wifi-iwlwifi-mvm-fix-potential-array-out-of-bounds-a.patch rename to queue-6.4/wifi-iwlwifi-mvm-fix-potential-array-out-of-bounds-a.patch diff --git a/tmp-6.4/wifi-iwlwifi-pcie-add-device-id-51f1-for-killer-1675.patch b/queue-6.4/wifi-iwlwifi-pcie-add-device-id-51f1-for-killer-1675.patch similarity index 100% rename from tmp-6.4/wifi-iwlwifi-pcie-add-device-id-51f1-for-killer-1675.patch rename to queue-6.4/wifi-iwlwifi-pcie-add-device-id-51f1-for-killer-1675.patch diff --git a/tmp-6.4/wifi-mac80211_hwsim-fix-possible-null-dereference.patch b/queue-6.4/wifi-mac80211_hwsim-fix-possible-null-dereference.patch similarity index 100% rename from tmp-6.4/wifi-mac80211_hwsim-fix-possible-null-dereference.patch rename to queue-6.4/wifi-mac80211_hwsim-fix-possible-null-dereference.patch diff --git a/tmp-6.4/wifi-rtw88-sdio-check-the-hisr-rx_request-bit-in-rtw.patch b/queue-6.4/wifi-rtw88-sdio-check-the-hisr-rx_request-bit-in-rtw.patch similarity index 100% rename from tmp-6.4/wifi-rtw88-sdio-check-the-hisr-rx_request-bit-in-rtw.patch rename to queue-6.4/wifi-rtw88-sdio-check-the-hisr-rx_request-bit-in-rtw.patch diff --git a/tmp-6.4/wifi-wext-core-fix-wstringop-overflow-warning-in-ioc.patch b/queue-6.4/wifi-wext-core-fix-wstringop-overflow-warning-in-ioc.patch similarity index 100% rename from tmp-6.4/wifi-wext-core-fix-wstringop-overflow-warning-in-ioc.patch rename to queue-6.4/wifi-wext-core-fix-wstringop-overflow-warning-in-ioc.patch diff --git a/tmp-4.19/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-4.19/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index a84874a5024..00000000000 --- a/tmp-4.19/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From b2d362e150f1a48e95b4224e6ad860948f48c158 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: "Borislav Petkov (AMD)" - -Upstream commit: 522b1d69219d8f083173819fde04f994aa051a98 - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -407,6 +407,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -66,6 +66,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -971,6 +976,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1073,6 +1119,8 @@ static void init_amd(struct cpuinfo_x86 - msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT); - - check_null_seg_clears_base(c); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1186,3 +1234,15 @@ void set_dr_addr_mask(unsigned long mask - break; - } - } -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2077,6 +2077,8 @@ void microcode_check(void) - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - /* Reload CPUID max function as it might've changed. */ - info.cpuid_level = cpuid_eax(0); - diff --git a/tmp-4.19/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-4.19/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index 78a4e9bba1c..00000000000 --- a/tmp-4.19/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 334baad709246598bfd30587a0e98b0d90f3f596 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: "Borislav Petkov (AMD)" - -Upstream commit: 8b6f687743dacce83dbb0c7cfacf88bab00f808a - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -23,11 +23,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -35,6 +30,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1106,73 +1168,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - void set_dr_addr_mask(unsigned long mask, int dr) - { - if (!boot_cpu_has(X86_FEATURE_BPEXT)) diff --git a/tmp-4.19/x86-microcode-amd-load-late-on-both-threads-too.patch b/tmp-4.19/x86-microcode-amd-load-late-on-both-threads-too.patch deleted file mode 100644 index e53a68b05d3..00000000000 --- a/tmp-4.19/x86-microcode-amd-load-late-on-both-threads-too.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Tue, 2 May 2023 19:53:50 +0200 -Subject: x86/microcode/AMD: Load late on both threads too - -From: Borislav Petkov (AMD) - -commit a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d upstream. - -Do the same as early loading - load on both threads. - -Signed-off-by: Borislav Petkov (AMD) -Cc: -Link: https://lore.kernel.org/r/20230605141332.25948-1-bp@alien8.de -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/microcode/amd.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/x86/kernel/cpu/microcode/amd.c -+++ b/arch/x86/kernel/cpu/microcode/amd.c -@@ -532,7 +532,7 @@ static enum ucode_state apply_microcode_ - rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - - /* need to apply patch? */ -- if (rev >= mc_amd->hdr.patch_id) { -+ if (rev > mc_amd->hdr.patch_id) { - ret = UCODE_OK; - goto out; - } diff --git a/tmp-5.10/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-5.10/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index e718d1b3f5a..00000000000 --- a/tmp-5.10/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From b2d362e150f1a48e95b4224e6ad860948f48c158 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: "Borislav Petkov (AMD)" - -Upstream commit: 522b1d69219d8f083173819fde04f994aa051a98 - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -497,6 +497,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -71,6 +71,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -1030,6 +1035,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1120,6 +1166,8 @@ static void init_amd(struct cpuinfo_x86 - msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT); - - check_null_seg_clears_base(c); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1233,3 +1281,15 @@ void set_dr_addr_mask(unsigned long mask - break; - } - } -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2165,6 +2165,8 @@ void microcode_check(struct cpuinfo_x86 - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - store_cpu_caps(&curr_info); - - if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability, diff --git a/tmp-5.10/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-5.10/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index 0fe43e3d8a4..00000000000 --- a/tmp-5.10/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 334baad709246598bfd30587a0e98b0d90f3f596 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: "Borislav Petkov (AMD)" - -Upstream commit: 8b6f687743dacce83dbb0c7cfacf88bab00f808a - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -28,11 +28,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -40,6 +35,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1153,73 +1215,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - void set_dr_addr_mask(unsigned long mask, int dr) - { - if (!boot_cpu_has(X86_FEATURE_BPEXT)) diff --git a/tmp-5.10/x86-microcode-amd-load-late-on-both-threads-too.patch b/tmp-5.10/x86-microcode-amd-load-late-on-both-threads-too.patch deleted file mode 100644 index 6348e1be3de..00000000000 --- a/tmp-5.10/x86-microcode-amd-load-late-on-both-threads-too.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Tue, 2 May 2023 19:53:50 +0200 -Subject: x86/microcode/AMD: Load late on both threads too - -From: Borislav Petkov (AMD) - -commit a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d upstream. - -Do the same as early loading - load on both threads. - -Signed-off-by: Borislav Petkov (AMD) -Cc: -Link: https://lore.kernel.org/r/20230605141332.25948-1-bp@alien8.de -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/microcode/amd.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/x86/kernel/cpu/microcode/amd.c -+++ b/arch/x86/kernel/cpu/microcode/amd.c -@@ -700,7 +700,7 @@ static enum ucode_state apply_microcode_ - rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - - /* need to apply patch? */ -- if (rev >= mc_amd->hdr.patch_id) { -+ if (rev > mc_amd->hdr.patch_id) { - ret = UCODE_OK; - goto out; - } diff --git a/tmp-5.15/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-5.15/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index f85b27c48b1..00000000000 --- a/tmp-5.15/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From b2d362e150f1a48e95b4224e6ad860948f48c158 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: "Borislav Petkov (AMD)" - -Upstream commit: 522b1d69219d8f083173819fde04f994aa051a98 - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -503,6 +503,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -70,6 +70,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -1002,6 +1007,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1092,6 +1138,8 @@ static void init_amd(struct cpuinfo_x86 - msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT); - - check_null_seg_clears_base(c); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1221,3 +1269,15 @@ u32 amd_get_highest_perf(void) - return 255; - } - EXPORT_SYMBOL_GPL(amd_get_highest_perf); -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2185,6 +2185,8 @@ void microcode_check(struct cpuinfo_x86 - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - store_cpu_caps(&curr_info); - - if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability, diff --git a/tmp-5.15/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-5.15/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index 0134ed8ec25..00000000000 --- a/tmp-5.15/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 334baad709246598bfd30587a0e98b0d90f3f596 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: "Borislav Petkov (AMD)" - -Upstream commit: 8b6f687743dacce83dbb0c7cfacf88bab00f808a - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -27,11 +27,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -39,6 +34,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1125,73 +1187,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - void set_dr_addr_mask(unsigned long mask, int dr) - { - if (!boot_cpu_has(X86_FEATURE_BPEXT)) diff --git a/tmp-5.4/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-5.4/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index 781910d72f9..00000000000 --- a/tmp-5.4/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From b2d362e150f1a48e95b4224e6ad860948f48c158 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: "Borislav Petkov (AMD)" - -Upstream commit: 522b1d69219d8f083173819fde04f994aa051a98 - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -462,6 +462,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -69,6 +69,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -980,6 +985,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1067,6 +1113,8 @@ static void init_amd(struct cpuinfo_x86 - msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT); - - check_null_seg_clears_base(c); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1180,3 +1228,15 @@ void set_dr_addr_mask(unsigned long mask - break; - } - } -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2125,6 +2125,8 @@ void microcode_check(void) - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - /* Reload CPUID max function as it might've changed. */ - info.cpuid_level = cpuid_eax(0); - diff --git a/tmp-5.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-5.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index 26d7baf7bdf..00000000000 --- a/tmp-5.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 334baad709246598bfd30587a0e98b0d90f3f596 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: "Borislav Petkov (AMD)" - -Upstream commit: 8b6f687743dacce83dbb0c7cfacf88bab00f808a - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -26,11 +26,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -38,6 +33,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1100,73 +1162,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - void set_dr_addr_mask(unsigned long mask, int dr) - { - if (!boot_cpu_has(X86_FEATURE_BPEXT)) diff --git a/tmp-5.4/x86-microcode-amd-load-late-on-both-threads-too.patch b/tmp-5.4/x86-microcode-amd-load-late-on-both-threads-too.patch deleted file mode 100644 index 6348e1be3de..00000000000 --- a/tmp-5.4/x86-microcode-amd-load-late-on-both-threads-too.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Tue, 2 May 2023 19:53:50 +0200 -Subject: x86/microcode/AMD: Load late on both threads too - -From: Borislav Petkov (AMD) - -commit a32b0f0db3f396f1c9be2fe621e77c09ec3d8e7d upstream. - -Do the same as early loading - load on both threads. - -Signed-off-by: Borislav Petkov (AMD) -Cc: -Link: https://lore.kernel.org/r/20230605141332.25948-1-bp@alien8.de -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/microcode/amd.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/x86/kernel/cpu/microcode/amd.c -+++ b/arch/x86/kernel/cpu/microcode/amd.c -@@ -700,7 +700,7 @@ static enum ucode_state apply_microcode_ - rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); - - /* need to apply patch? */ -- if (rev >= mc_amd->hdr.patch_id) { -+ if (rev > mc_amd->hdr.patch_id) { - ret = UCODE_OK; - goto out; - } diff --git a/tmp-6.1/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-6.1/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index ed032cd09c6..00000000000 --- a/tmp-6.1/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From b2d362e150f1a48e95b4224e6ad860948f48c158 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: "Borislav Petkov (AMD)" - -Upstream commit: 522b1d69219d8f083173819fde04f994aa051a98 - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -543,6 +543,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -70,6 +70,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -978,6 +983,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1067,6 +1113,8 @@ static void init_amd(struct cpuinfo_x86 - msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT); - - check_null_seg_clears_base(c); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1196,3 +1244,15 @@ u32 amd_get_highest_perf(void) - return 255; - } - EXPORT_SYMBOL_GPL(amd_get_highest_perf); -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2346,6 +2346,8 @@ void microcode_check(struct cpuinfo_x86 - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - store_cpu_caps(&curr_info); - - if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability, diff --git a/tmp-6.1/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-6.1/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index a760fd54216..00000000000 --- a/tmp-6.1/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 334baad709246598bfd30587a0e98b0d90f3f596 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: "Borislav Petkov (AMD)" - -Upstream commit: 8b6f687743dacce83dbb0c7cfacf88bab00f808a - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -27,11 +27,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -39,6 +34,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1100,73 +1162,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - void set_dr_addr_mask(unsigned long mask, int dr) - { - if (!boot_cpu_has(X86_FEATURE_BPEXT)) diff --git a/tmp-6.4/x86-cpu-amd-add-a-zenbleed-fix.patch b/tmp-6.4/x86-cpu-amd-add-a-zenbleed-fix.patch deleted file mode 100644 index 79557d7bc5b..00000000000 --- a/tmp-6.4/x86-cpu-amd-add-a-zenbleed-fix.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 522b1d69219d8f083173819fde04f994aa051a98 Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:41:28 +0200 -Subject: x86/cpu/amd: Add a Zenbleed fix - -From: Borislav Petkov (AMD) - -commit 522b1d69219d8f083173819fde04f994aa051a98 upstream. - -Add a fix for the Zen2 VZEROUPPER data corruption bug where under -certain circumstances executing VZEROUPPER can cause register -corruption or leak data. - -The optimal fix is through microcode but in the case the proper -microcode revision has not been applied, enable a fallback fix using -a chicken bit. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/include/asm/microcode.h | 1 - arch/x86/include/asm/microcode_amd.h | 2 + - arch/x86/include/asm/msr-index.h | 1 - arch/x86/kernel/cpu/amd.c | 60 +++++++++++++++++++++++++++++++++++ - arch/x86/kernel/cpu/common.c | 2 + - 5 files changed, 66 insertions(+) - ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - struct ucode_patch { - struct list_head plist; ---- a/arch/x86/include/asm/microcode_amd.h -+++ b/arch/x86/include/asm/microcode_amd.h -@@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(un - extern void load_ucode_amd_ap(unsigned int family); - extern int __init save_microcode_in_initrd_amd(unsigned int family); - void reload_ucode_amd(unsigned int cpu); -+extern void amd_check_microcode(void); - #else - static inline void __init load_ucode_amd_bsp(unsigned int family) {} - static inline void load_ucode_amd_ap(unsigned int family) {} - static inline int __init - save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } - static inline void reload_ucode_amd(unsigned int cpu) {} -+static inline void amd_check_microcode(void) {} - #endif - #endif /* _ASM_X86_MICROCODE_AMD_H */ ---- a/arch/x86/include/asm/msr-index.h -+++ b/arch/x86/include/asm/msr-index.h -@@ -545,6 +545,7 @@ - #define MSR_AMD64_DE_CFG 0xc0011029 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 - #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT) -+#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9 - - #define MSR_AMD64_BU_CFG2 0xc001102a - #define MSR_AMD64_IBSFETCHCTL 0xc0011030 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -70,6 +70,11 @@ static const int amd_erratum_383[] = - static const int amd_erratum_1054[] = - AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); - -+static const int amd_zenbleed[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf), -+ AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf)); -+ - static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) - { - int osvw_id = *erratum++; -@@ -978,6 +983,47 @@ static void init_amd_zn(struct cpuinfo_x - } - } - -+static bool cpu_has_zenbleed_microcode(void) -+{ -+ u32 good_rev = 0; -+ -+ switch (boot_cpu_data.x86_model) { -+ case 0x30 ... 0x3f: good_rev = 0x0830107a; break; -+ case 0x60 ... 0x67: good_rev = 0x0860010b; break; -+ case 0x68 ... 0x6f: good_rev = 0x08608105; break; -+ case 0x70 ... 0x7f: good_rev = 0x08701032; break; -+ case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; -+ -+ default: -+ return false; -+ break; -+ } -+ -+ if (boot_cpu_data.microcode < good_rev) -+ return false; -+ -+ return true; -+} -+ -+static void zenbleed_check(struct cpuinfo_x86 *c) -+{ -+ if (!cpu_has_amd_erratum(c, amd_zenbleed)) -+ return; -+ -+ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) -+ return; -+ -+ if (!cpu_has(c, X86_FEATURE_AVX)) -+ return; -+ -+ if (!cpu_has_zenbleed_microcode()) { -+ pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n"); -+ msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } else { -+ msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT); -+ } -+} -+ - static void init_amd(struct cpuinfo_x86 *c) - { - early_init_amd(c); -@@ -1082,6 +1128,8 @@ static void init_amd(struct cpuinfo_x86 - if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && - cpu_has(c, X86_FEATURE_AUTOIBRS)) - WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS)); -+ -+ zenbleed_check(c); - } - - #ifdef CONFIG_X86_32 -@@ -1230,3 +1278,15 @@ u32 amd_get_highest_perf(void) - return 255; - } - EXPORT_SYMBOL_GPL(amd_get_highest_perf); -+ -+static void zenbleed_check_cpu(void *unused) -+{ -+ struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -+ -+ zenbleed_check(c); -+} -+ -+void amd_check_microcode(void) -+{ -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); -+} ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -2341,6 +2341,8 @@ void microcode_check(struct cpuinfo_x86 - - perf_check_microcode(); - -+ amd_check_microcode(); -+ - store_cpu_caps(&curr_info); - - if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability, diff --git a/tmp-6.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch b/tmp-6.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch deleted file mode 100644 index c124bc89b36..00000000000 --- a/tmp-6.4/x86-cpu-amd-move-the-errata-checking-functionality-up.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 8b6f687743dacce83dbb0c7cfacf88bab00f808a Mon Sep 17 00:00:00 2001 -From: "Borislav Petkov (AMD)" -Date: Sat, 15 Jul 2023 13:31:32 +0200 -Subject: x86/cpu/amd: Move the errata checking functionality up - -From: Borislav Petkov (AMD) - -commit 8b6f687743dacce83dbb0c7cfacf88bab00f808a upstream. - -Avoid new and remove old forward declarations. - -No functional changes. - -Signed-off-by: Borislav Petkov (AMD) -Signed-off-by: Greg Kroah-Hartman ---- - arch/x86/kernel/cpu/amd.c | 139 ++++++++++++++++++++++------------------------ - 1 file changed, 67 insertions(+), 72 deletions(-) - ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -27,11 +27,6 @@ - - #include "cpu.h" - --static const int amd_erratum_383[]; --static const int amd_erratum_400[]; --static const int amd_erratum_1054[]; --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum); -- - /* - * nodes_per_socket: Stores the number of nodes per socket. - * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX -@@ -39,6 +34,73 @@ static bool cpu_has_amd_erratum(struct c - */ - static u32 nodes_per_socket = 1; - -+/* -+ * AMD errata checking -+ * -+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -+ * have an OSVW id assigned, which it takes as first argument. Both take a -+ * variable number of family-specific model-stepping ranges created by -+ * AMD_MODEL_RANGE(). -+ * -+ * Example: -+ * -+ * const int amd_erratum_319[] = -+ * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -+ * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -+ * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -+ */ -+ -+#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } -+#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } -+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -+ ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) -+#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) -+#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) -+#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -+ -+static const int amd_erratum_400[] = -+ AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -+ AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -+ -+static const int amd_erratum_383[] = -+ AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -+ -+/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ -+static const int amd_erratum_1054[] = -+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -+ -+static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) -+{ -+ int osvw_id = *erratum++; -+ u32 range; -+ u32 ms; -+ -+ if (osvw_id >= 0 && osvw_id < 65536 && -+ cpu_has(cpu, X86_FEATURE_OSVW)) { -+ u64 osvw_len; -+ -+ rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -+ if (osvw_id < osvw_len) { -+ u64 osvw_bits; -+ -+ rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -+ osvw_bits); -+ return osvw_bits & (1ULL << (osvw_id & 0x3f)); -+ } -+ } -+ -+ /* OSVW unavailable or ID unknown, match family-model-stepping range */ -+ ms = (cpu->x86_model << 4) | cpu->x86_stepping; -+ while ((range = *erratum++)) -+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -+ (ms >= AMD_MODEL_RANGE_START(range)) && -+ (ms <= AMD_MODEL_RANGE_END(range))) -+ return true; -+ -+ return false; -+} -+ - static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) - { - u32 gprs[8] = { 0 }; -@@ -1115,73 +1177,6 @@ static const struct cpu_dev amd_cpu_dev - - cpu_dev_register(amd_cpu_dev); - --/* -- * AMD errata checking -- * -- * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or -- * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that -- * have an OSVW id assigned, which it takes as first argument. Both take a -- * variable number of family-specific model-stepping ranges created by -- * AMD_MODEL_RANGE(). -- * -- * Example: -- * -- * const int amd_erratum_319[] = -- * AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2), -- * AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0), -- * AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0)); -- */ -- --#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 } --#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 } --#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ -- ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) --#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) --#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) --#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff) -- --static const int amd_erratum_400[] = -- AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf), -- AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf)); -- --static const int amd_erratum_383[] = -- AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf)); -- --/* #1054: Instructions Retired Performance Counter May Be Inaccurate */ --static const int amd_erratum_1054[] = -- AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf)); -- --static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) --{ -- int osvw_id = *erratum++; -- u32 range; -- u32 ms; -- -- if (osvw_id >= 0 && osvw_id < 65536 && -- cpu_has(cpu, X86_FEATURE_OSVW)) { -- u64 osvw_len; -- -- rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); -- if (osvw_id < osvw_len) { -- u64 osvw_bits; -- -- rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), -- osvw_bits); -- return osvw_bits & (1ULL << (osvw_id & 0x3f)); -- } -- } -- -- /* OSVW unavailable or ID unknown, match family-model-stepping range */ -- ms = (cpu->x86_model << 4) | cpu->x86_stepping; -- while ((range = *erratum++)) -- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && -- (ms >= AMD_MODEL_RANGE_START(range)) && -- (ms <= AMD_MODEL_RANGE_END(range))) -- return true; -- -- return false; --} -- - static DEFINE_PER_CPU_READ_MOSTLY(unsigned long[4], amd_dr_addr_mask); - - static unsigned int amd_msr_dr_addr_masks[] = {